| #
155ebf23 |
| 21-Nov-2024 |
Pascal Paillet <p.paillet@foss.st.com> |
drivers: add stm32 CPU DVFS driver
drivers/cpu_opp.c implements dynamic voltage and frequency
scaling for the CPU.
It is used at boot time to set an higher operating point than
the one used to boot.
drivers: add stm32 CPU DVFS driver
drivers/cpu_opp.c implements dynamic voltage and frequency
scaling for the CPU.
It is used at boot time to set an higher operating point than
the one used to boot.
It will be used by the SCMI performance service.
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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|
| #
23f9bd99 |
| 02-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: regulator: IO domain regulators for STM32MP13
Add STM32MP13 IO domains regulators allowing a consumer to
manage IO domains are voltage regulators.
Acked-by: Patrick Delaunay <patrick.delau
drivers: regulator: IO domain regulators for STM32MP13
Add STM32MP13 IO domains regulators allowing a consumer to
manage IO domains are voltage regulators.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Co-developed-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| #
94dfdd29 |
| 23-Jun-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: stm32mp1_pwr: register regulators
Changes stm32mp1_pwr driver to be probed on from dt_driver framework
and register PWR regulators to the regulator framework.
Acked-by: Gatien Cheval
plat-stm32mp1: stm32mp1_pwr: register regulators
Changes stm32mp1_pwr driver to be probed on from dt_driver framework
and register PWR regulators to the regulator framework.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| #
b787ecb7 |
| 08-Oct-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: introduce PWR regulators
Introduce a voltage regulator driver for the voltage controllers
driven through PWR interface of stm32mp1 SoCs.
Signed-off-by: Etienne Carriere <etienne.carr
plat-stm32mp1: introduce PWR regulators
Introduce a voltage regulator driver for the voltage controllers
driven through PWR interface of stm32mp1 SoCs.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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|
| #
9b39d0fa |
| 15-Feb-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
stm32mp1: prefer vaddr_t to uintptr_t
Use vaddr_t and paddr_t instead of uintptr_t where applicable.
This change also simplifies some platform get-base-address functions
to use io_pa_or_va().
Sign
stm32mp1: prefer vaddr_t to uintptr_t
Use vaddr_t and paddr_t instead of uintptr_t where applicable.
This change also simplifies some platform get-base-address functions
to use io_pa_or_va().
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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|
| #
0ae6974b |
| 06-Feb-2019 |
etienne carriere <etienne.carriere@st.com> |
stm32mp1: PWR support
PWR is a memory mapped SoC interface for power control. This change
maps and defines the interface for the stm32mp1 platform.
Signed-off-by: Etienne Carriere <etienne.carriere
stm32mp1: PWR support
PWR is a memory mapped SoC interface for power control. This change
maps and defines the interface for the stm32mp1 platform.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
show more ...
|