| #
faaa1735 |
| 02-Feb-2022 |
Nicolas Toromanoff <nicolas.toromanoff@foss.st.com> |
plat-stm32mp1: add new API to erase SRAM3
Add new API TEE_Result stm32mp_syscfg_erase_sram3(void); to be able to erase SRAM3 by hardware request.
Signed-off-by: Nicolas Toromanoff <nicolas.toromano
plat-stm32mp1: add new API to erase SRAM3
Add new API TEE_Result stm32mp_syscfg_erase_sram3(void); to be able to erase SRAM3 by hardware request.
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
fd6434ee |
| 11-May-2023 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
plat-stm32mp1: syscfg: add dsb in syscfg driver
Add dsb in syscfg driver to guarantee that the request operations are performed in SYSCFG register when the external API are called and before to retu
plat-stm32mp1: syscfg: add dsb in syscfg driver
Add dsb in syscfg driver to guarantee that the request operations are performed in SYSCFG register when the external API are called and before to return to caller: - stm32mp1_iocomp() in init sequence - stm32mp_set_vddsd_comp_state() and stm32mp_set_hslv_state() called by PWR driver
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| #
161f5876 |
| 13-Feb-2025 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
plat-stm32mp1: syscfg: set SYSCFG_CMPCR_READY_TIMEOUT_US to 10ms
CHange timeout to 10 ms instead of 1 ms. On stm32mp13 we measure 1.5ms delay to have CMPCR_READY equal to 1. Use 10 ms to be aligned
plat-stm32mp1: syscfg: set SYSCFG_CMPCR_READY_TIMEOUT_US to 10ms
CHange timeout to 10 ms instead of 1 ms. On stm32mp13 we measure 1.5ms delay to have CMPCR_READY equal to 1. Use 10 ms to be aligned with TF-A timeout.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
61491a0c |
| 21-Nov-2024 |
Pascal Paillet <p.paillet@foss.st.com> |
plat-stm32mp1: retrieve chip id from syscfg
Chip ID is read from SYSCFG. Add the associated read function and new CHIP IDs.
Use the chip id to dynamically detect the CRYPTO hardware support, the se
plat-stm32mp1: retrieve chip id from syscfg
Chip ID is read from SYSCFG. Add the associated read function and new CHIP IDs.
Use the chip id to dynamically detect the CRYPTO hardware support, the second CPU core, and CPU OPP.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Pascal Paillet <p.paillet@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
43e0957a |
| 02-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: syscfg: HLSV mode for IO domains
Add platform API functions stm32mp_set_hslv_state() and stm32mp_enable_fixed_vdd_hslv() to configure High Speed Low Voltage mode of IO domains.
Platf
plat-stm32mp1: syscfg: HLSV mode for IO domains
Add platform API functions stm32mp_set_hslv_state() and stm32mp_enable_fixed_vdd_hslv() to configure High Speed Low Voltage mode of IO domains.
Platform function stm32mp_enable_fixed_vdd_hslv() is designed for fixed voltage IO domains that need to be enable at boot time only since the supply voltage level never changes.
On STM32MP13 variants, SDMMC IO domains may not be supplied by fixed voltage VDD but rather by a supply which voltage level can change at runtime for example to support SD/MMC normative 1.8V and 3.3V voltage modes. Therefore these IO domains require a runtime configuration function implemented by stm32mp_set_hslv_state().
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Co-developed-by: Pascal Paillet <p.paillet@foss.st.com> Signed-off-by: Pascal Paillet <p.paillet@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
5611e846 |
| 03-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: syscfg: STM32MP13 dynamic IO compensation
Replace IO compensation API functions stm32mp_syscfg_enable_io_compensation() and stm32mp_syscfg_disable_io_compensation() with a new API fun
plat-stm32mp1: syscfg: STM32MP13 dynamic IO compensation
Replace IO compensation API functions stm32mp_syscfg_enable_io_compensation() and stm32mp_syscfg_disable_io_compensation() with a new API function stm32mp_set_io_comp_by_index() dedicated to runtime configuration of STM32MP13 SDMMC's domains IO compensation only.
On STM32MP15 variant, the configuration is enabled only during initialization. On STM32MP13 variant, the same feature is also enabled during initialization but the device embeds 2 more IO domains (SDMMC1 and SDMMC2) for which the new API function allow runtime reconfiguration support.
For sake of simplicity, keep related clocks always on.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Co-developed-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
649c864c |
| 03-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: syscfg: compute base address once
Compute SYSCFG virtual address only once.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@f
plat-stm32mp1: syscfg: compute base address once
Compute SYSCFG virtual address only once.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
e287ddde |
| 02-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: syscfg: use U() macro
Use U() macro where applicable in stm32mp1_syscfg.c driver.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.cheval
plat-stm32mp1: syscfg: use U() macro
Use U() macro where applicable in stm32mp1_syscfg.c driver.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
aacd5509 |
| 05-Jun-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: add missing braces in IO compensation function
Adds missing braces in stm32mp_syscfg_enable_io_compensation().
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Gati
plat-stm32mp1: add missing braces in IO compensation function
Adds missing braces in stm32mp_syscfg_enable_io_compensation().
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
37010ab7 |
| 07-Jun-2022 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
plat-stm32mp1: use helper header file stm32mp_dt_bindings.h
Changes plat-stm32mp1 and its drivers to rely on stm32mp_dt_bindings.h which simplifies support of both variants STM32MP15 and STM32MP13 t
plat-stm32mp1: use helper header file stm32mp_dt_bindings.h
Changes plat-stm32mp1 and its drivers to rely on stm32mp_dt_bindings.h which simplifies support of both variants STM32MP15 and STM32MP13 that will use each specific DT bindings.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
488c73c0 |
| 08-Jun-2022 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: clk: remove stm32_clock_*() helpers
Removes function that were deprecated: stm32_clock_is_enabled(), stm32_clock_enable(), stm32_clock_disable() and stm32_clock_get_rate().
Signed-off-by:
drivers: clk: remove stm32_clock_*() helpers
Removes function that were deprecated: stm32_clock_is_enabled(), stm32_clock_enable(), stm32_clock_disable() and stm32_clock_get_rate().
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| #
c2e4eb43 |
| 23-May-2021 |
Anton Rybakov <a.rybakov@omp.ru> |
core_mmu: fix phys_to_virt() to check length
phys_to_virt() function without length parameter doesn`t always have ability to find the correct mapping for requested physical address. This is because
core_mmu: fix phys_to_virt() to check length
phys_to_virt() function without length parameter doesn`t always have ability to find the correct mapping for requested physical address. This is because physical address can be mapped in the same time in different virtual regions with different length. So the first found region which contains the requested physical address possibly doesn`t have enough mapped data. This is fixed by adding the length parameter to phys_to_virt() function. Length parameter can be set to 1 if caller knows that requested (pa + len) doesn`t cross mapping granule boundary.
core_mmu_get_va() and io_pa_or_va() functions now are take length parameter too as they based on phys_to_virt() in case of MMU enabled.
Signed-off-by: Anton Rybakov <a.rybakov@omp.ru> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek)
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| #
7718c20f |
| 01-May-2020 |
Etienne Carriere <etienne.carriere@st.com> |
plat-stm32mp1: enable IO compensation at boot time
Implement platform functions stm32mp_syscfg_enable_io_compensation() and stm32mp_syscfg_disable_io_compensation() to enable/disable STM23MP1 IO com
plat-stm32mp1: enable IO compensation at boot time
Implement platform functions stm32mp_syscfg_enable_io_compensation() and stm32mp_syscfg_disable_io_compensation() to enable/disable STM23MP1 IO compensation. Enable IO compensation when platform boots.
This change defines SYSCFG clock that is needed and moves definition of the RCC compatible string DT_RCC_CLK_COMPAT to RCC header file so that it can be shared with stm32mp1_syscfg.c.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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