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Searched refs:_CIDCFGR_CFEN (Results 1 – 12 of 12) sorted by relevance

/optee_os/core/drivers/
H A Dstm32_hsem.c32 #define HSEM_CnCIDCFGR_CONF_MASK (_CIDCFGR_CFEN | \
41 #define HSEM_GpCIDCFGR_CONF_MASK (_CIDCFGR_CFEN | \
116 _CIDCFGR_CFEN | hsem_d->rif_proc_conf[i]); in apply_rif_config()
141 if (!(group_cid_value & _CIDCFGR_CFEN)) in apply_rif_config()
165 _CIDCFGR_CFEN | sem_wlist_c); in apply_rif_config()
H A Dstm32_hpdma.c44 #define _HPDMA_CIDCFGR_CONF_MASK (_CIDCFGR_CFEN | \
185 (!(cid_conf & _CIDCFGR_CFEN) || in apply_rif_config()
H A Dstm32_ipcc.c38 #define IPCC_CIDCFGR_CONF_MASK (_CIDCFGR_CFEN | \
H A Dstm32_fmc.c45 #define _FMC_CIDCFGR_CONF_MASK (_CIDCFGR_CFEN | \
H A Dstm32_rtc.c156 #define RTC_CIDCFGR_CONF_MASK (_CIDCFGR_CFEN | \
279 return !(cidcfgr & _CIDCFGR_CFEN) || in cid1_has_access()
H A Dstm32_gpio.c58 #define GPIO_CIDCFGR_CONF_MASK (_CIDCFGR_CFEN | _CIDCFGR_SEMEN | \
462 if (!(cidcfgr & _CIDCFGR_CFEN)) { in pin_is_accessible()
H A Dstm32_tamp.c219 #define _TAMP_CIDCFGR_CONF_MASK (_CIDCFGR_CFEN | \
/optee_os/core/include/drivers/
H A Dstm32_rif.h17 #define _CIDCFGR_CFEN BIT(0) macro
91 return (cidcfgr & _CIDCFGR_CFEN) && (cidcfgr & _CIDCFGR_SEMEN) && in stm32_rif_semaphore_enabled_and_ok()
/optee_os/core/drivers/firewall/
H A Dstm32_rif.c44 if (!(cidcfgr & _CIDCFGR_CFEN)) in stm32_rif_check_access()
H A Dstm32_rifsc.c779 if (!(cidcfgr & _CIDCFGR_CFEN)) in stm32_rifsc_check_access()
828 if (!(cidcfgr & _CIDCFGR_CFEN)) in stm32_rifsc_acquire_access()
/optee_os/core/drivers/clk/
H A Dclk-stm32mp21.c72 #define RCC_CIDCFGR_CONF_MASK (_CIDCFGR_CFEN | \
H A Dclk-stm32mp25.c70 #define RCC_CIDCFGR_CONF_MASK (_CIDCFGR_CFEN | \