drivers: stm32_hsem: fix HSEM group CID filtering configuration

Move the check on HSEM group CID filtering configuration consistency
before the continuing if the CID filtering is disabled for the fi

drivers: stm32_hsem: fix HSEM group CID filtering configuration

Move the check on HSEM group CID filtering configuration consistency
before the continuing if the CID filtering is disabled for the first
semaphore of the group.

The HSEM group CID filtering was also broken as it didn't allow more
than one CID to access a semaphore group. Fix this by using the semaphore
bit-field in the RIFPROT macro to determine what are the processors that
should be authorized to take the semaphores.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Fixes: ec9aa1a4114f ("drivers: add RIF support driver for HSEM")

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drivers: stm32_hsem: fix unfreed memory

Free hsem_d if parse_dt() fails.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com

drivers: stm32_hsem: fix unfreed memory

Free hsem_d if parse_dt() fails.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Fixes: ec9aa1a4114f ("drivers: add RIF support driver for HSEM")

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drivers: stm32_rif: update and fix RIF configuration parsing

Fix the parsing of the RIF configuration by using device tree bindings,
when necessary. Generalize RIF bit fields and use them when deali

drivers: stm32_rif: update and fix RIF configuration parsing

Fix the parsing of the RIF configuration by using device tree bindings,
when necessary. Generalize RIF bit fields and use them when dealing
with generic RIF functions. Update drivers that use stm32_rif_parse_cfg()
accordingly.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Fixes: 1506f47af917 ("drivers: firewall: add stm32_rif driver for common RIF features")

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drivers: add RIF support driver for HSEM

This driver implements RIF configuration for HSEM, which is a RIF
aware IP. It means that the HSEM driver is in charge of configuring its
own RIF restriction

drivers: add RIF support driver for HSEM

This driver implements RIF configuration for HSEM, which is a RIF
aware IP. It means that the HSEM driver is in charge of configuring its
own RIF restrictions and that the HSEM has dedicated RIF configuration
registers.

HSEM has two types of CID filtering registers.
-For processor filtering : HSEM_CnCIDCFGR
When CFEN is enabled: processor[n] CID filtering enabled for HSEM_(S)CnIER,
HSEM_(S)CnICR, HSEM_(S)CnISR, and HSEM_(S)CnMISR registers and for allowed
list filter usage in HSEM_GpCIDCFGR.SEM_WLIST_Cn. The CID is put in the
CID bitfield.

-For semaphore group filtering : HSEM_GpCIDCFGR
Used to apply CID filtering over a group of semaphore. The same policy
applies to all semaphores present in the group. This register handles
what are the processor's CID who are white-listed for the group in the
SEM_WLIST_C bitfield.

Therefore, both these registers are interconnected.

Security and privilege configuration granularity expands to each individual
semaphore.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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