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Searched refs:wp (Results 1 – 25 of 771) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/gpu/drm/omapdrm/dss/
H A Dhdmi_wp.c20 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s) in hdmi_wp_dump() argument
22 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r)) in hdmi_wp_dump()
44 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp) in hdmi_wp_get_irqstatus() argument
46 return hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_get_irqstatus()
49 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus) in hdmi_wp_set_irqstatus() argument
51 hdmi_write_reg(wp->base, HDMI_WP_IRQSTATUS, irqstatus); in hdmi_wp_set_irqstatus()
53 hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_set_irqstatus()
56 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_set_irqenable() argument
58 hdmi_write_reg(wp->base, HDMI_WP_IRQENABLE_SET, mask); in hdmi_wp_set_irqenable()
61 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_clear_irqenable() argument
[all …]
H A Dhdmi.h239 struct hdmi_wp_data *wp; member
261 struct hdmi_wp_data *wp; member
296 int hdmi_wp_video_start(struct hdmi_wp_data *wp);
297 void hdmi_wp_video_stop(struct hdmi_wp_data *wp);
298 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s);
299 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp);
300 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus);
301 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask);
302 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask);
303 int hdmi_wp_set_phy_pwr(struct hdmi_wp_data *wp, enum hdmi_phy_pwr val);
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H A Dhdmi5.c67 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_irq_handler() local
70 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
71 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
83 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
95 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
98 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
103 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
105 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
171 hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff); in hdmi_power_on_full()
172 hdmi_wp_set_irqstatus(&hdmi->wp, in hdmi_power_on_full()
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H A Dhdmi4.c66 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_irq_handler() local
69 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
70 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
80 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
82 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
85 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
87 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
89 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
149 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_power_on_full() local
158 hdmi_wp_clear_irqenable(wp, ~HDMI_IRQ_CORE); in hdmi_power_on_full()
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H A Dhdmi_pll.c42 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_enable() local
50 r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS); in hdmi_pll_enable()
60 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_disable() local
63 hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF); in hdmi_pll_disable()
147 if (hpll->wp->version == 4) in hdmi_init_pll_data()
162 struct hdmi_pll_data *pll, struct hdmi_wp_data *wp) in hdmi_pll_init() argument
168 pll->wp = wp; in hdmi_pll_init()
/OK3568_Linux_fs/kernel/drivers/video/fbdev/omap2/omapfb/dss/
H A Dhdmi_wp.c21 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s) in hdmi_wp_dump() argument
23 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r)) in hdmi_wp_dump()
45 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp) in hdmi_wp_get_irqstatus() argument
47 return hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_get_irqstatus()
50 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus) in hdmi_wp_set_irqstatus() argument
52 hdmi_write_reg(wp->base, HDMI_WP_IRQSTATUS, irqstatus); in hdmi_wp_set_irqstatus()
54 hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_set_irqstatus()
57 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_set_irqenable() argument
59 hdmi_write_reg(wp->base, HDMI_WP_IRQENABLE_SET, mask); in hdmi_wp_set_irqenable()
62 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_clear_irqenable() argument
[all …]
H A Dhdmi.h233 struct hdmi_wp_data *wp; member
277 int hdmi_wp_video_start(struct hdmi_wp_data *wp);
278 void hdmi_wp_video_stop(struct hdmi_wp_data *wp);
279 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s);
280 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp);
281 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus);
282 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask);
283 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask);
284 int hdmi_wp_set_phy_pwr(struct hdmi_wp_data *wp, enum hdmi_phy_pwr val);
285 int hdmi_wp_set_pll_pwr(struct hdmi_wp_data *wp, enum hdmi_pll_pwr val);
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H A Dhdmi5.c66 struct hdmi_wp_data *wp = data; in hdmi_irq_handler() local
69 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
70 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
82 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
94 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
97 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
102 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
104 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
179 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff); in hdmi_power_on_full()
180 hdmi_wp_set_irqstatus(&hdmi.wp, in hdmi_power_on_full()
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H A Dhdmi4.c62 struct hdmi_wp_data *wp = data; in hdmi_irq_handler() local
65 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
66 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
76 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
78 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
81 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
83 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
85 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
149 struct hdmi_wp_data *wp = &hdmi.wp; in hdmi_power_on_full() local
157 hdmi_wp_clear_irqenable(wp, 0xffffffff); in hdmi_power_on_full()
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H A Dhdmi_pll.c102 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_enable() local
107 r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS); in hdmi_pll_enable()
117 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_disable() local
119 hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF); in hdmi_pll_disable()
220 struct hdmi_wp_data *wp) in hdmi_pll_init() argument
225 pll->wp = wp; in hdmi_pll_init()
/OK3568_Linux_fs/kernel/arch/powerpc/math-emu/
H A Dmath_efp.c109 u32 wp[2]; member
200 vc.wp[0] = current->thread.evr[fc]; in do_spe_mathemu()
201 vc.wp[1] = regs->gpr[fc]; in do_spe_mathemu()
202 va.wp[0] = current->thread.evr[fa]; in do_spe_mathemu()
203 va.wp[1] = regs->gpr[fa]; in do_spe_mathemu()
204 vb.wp[0] = current->thread.evr[fb]; in do_spe_mathemu()
205 vb.wp[1] = regs->gpr[fb]; in do_spe_mathemu()
210 pr_debug("vc: %08x %08x\n", vc.wp[0], vc.wp[1]); in do_spe_mathemu()
211 pr_debug("va: %08x %08x\n", va.wp[0], va.wp[1]); in do_spe_mathemu()
212 pr_debug("vb: %08x %08x\n", vb.wp[0], vb.wp[1]); in do_spe_mathemu()
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/OK3568_Linux_fs/kernel/lib/mpi/
H A Dmpi-add.c22 mpi_ptr_t wp, up; in mpi_add_ui() local
37 wp = w->d; in mpi_add_ui()
40 wp[0] = v; in mpi_add_ui()
44 cy = mpihelp_add_1(wp, up, usize, v); in mpi_add_ui()
45 wp[usize] = cy; in mpi_add_ui()
52 wp[0] = v - up[0]; in mpi_add_ui()
55 mpihelp_sub_1(wp, up, usize, v); in mpi_add_ui()
57 wsize = usize - (wp[usize-1] == 0); in mpi_add_ui()
69 mpi_ptr_t wp, up, vp; in mpi_add() local
94 wp = w->d; in mpi_add()
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H A Dmpi-mul.c19 mpi_ptr_t up, vp, wp; in mpi_mul() local
42 wp = w->d; in mpi_mul()
47 if (wp == up || wp == vp) { in mpi_mul()
48 wp = mpi_alloc_limb_space(wsize); in mpi_mul()
52 wp = w->d; in mpi_mul()
55 if (wp == up) { in mpi_mul()
59 if (wp == vp) in mpi_mul()
62 MPN_COPY(up, wp, usize); in mpi_mul()
63 } else if (wp == vp) { in mpi_mul()
67 MPN_COPY(vp, wp, vsize); in mpi_mul()
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H A Dec.c182 static void mpih_set_cond(mpi_ptr_t wp, mpi_ptr_t up, in mpih_set_cond() argument
190 x = mask & (wp[i] ^ up[i]); in mpih_set_cond()
191 wp[i] = wp[i] ^ x; in mpih_set_cond()
201 mpi_ptr_t wp, up, vp; in ec_addm_25519() local
212 wp = w->d; in ec_addm_25519()
214 mpihelp_add_n(wp, up, vp, wsize); in ec_addm_25519()
215 borrow = mpihelp_sub_n(wp, wp, ctx->p->d, wsize); in ec_addm_25519()
217 mpihelp_add_n(wp, wp, n, wsize); in ec_addm_25519()
218 wp[LIMB_SIZE_25519-1] &= ~((mpi_limb_t)1 << (255 % BITS_PER_MPI_LIMB)); in ec_addm_25519()
223 mpi_ptr_t wp, up, vp; in ec_subm_25519() local
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/OK3568_Linux_fs/kernel/tools/testing/selftests/breakpoints/
H A Dbreakpoint_test_arm64.c81 static bool set_watchpoint(pid_t pid, int size, int wp) in set_watchpoint() argument
83 const volatile uint8_t *addr = &var[32 + wp]; in set_watchpoint()
112 static bool run_test(int wr_size, int wp_size, int wr, int wp) in run_test() argument
143 if (!set_watchpoint(pid, wp_size, wp)) in run_test()
204 int wr, wp, size; in main() local
216 for (wp = wr - size; wp <= wr + size; wp = wp + size) { in main()
217 result = run_test(size, MIN(size, 8), wr, wp); in main()
218 if ((result && wr == wp) || in main()
219 (!result && wr != wp)) in main()
222 size, wr, wp); in main()
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/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/
H A Ddhd_dbg_ring.c61 ring->wp = ring->rp = 0; in dhd_dbg_ring_init()
80 ring->wp = ring->rp = 0; in dhd_dbg_ring_deinit()
155 __FUNCTION__, ring->id, ring->name, hdr->len, w_len, ring->wp, ring->rp, in dhd_dbg_ring_push()
167 avail_size = DBG_RING_CHECK_WRITE_SPACE(ring->rp, ring->wp, ring->ring_size); in dhd_dbg_ring_push()
170 if (ring->rp <= ring->wp) { in dhd_dbg_ring_push()
172 ring->rem_len = ring->ring_size - ring->wp; in dhd_dbg_ring_push()
176 ring->id, ring->name, ring->rp, ring->wp, in dhd_dbg_ring_push()
181 memset((uint8 *)ring->ring_buf + ring->wp, 0, ring->rem_len); in dhd_dbg_ring_push()
192 if (ring->rp == ring->wp) { in dhd_dbg_ring_push()
195 ring->wp = 0; in dhd_dbg_ring_push()
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/OK3568_Linux_fs/external/rkwifibt/drivers/infineon/
H A Ddhd_dbg_ring.c61 ring->wp = ring->rp = 0; in dhd_dbg_ring_init()
80 ring->wp = ring->rp = 0; in dhd_dbg_ring_deinit()
155 __FUNCTION__, ring->id, ring->name, hdr->len, w_len, ring->wp, ring->rp, in dhd_dbg_ring_push()
167 avail_size = DBG_RING_CHECK_WRITE_SPACE(ring->rp, ring->wp, ring->ring_size); in dhd_dbg_ring_push()
170 if (ring->rp <= ring->wp) { in dhd_dbg_ring_push()
172 ring->rem_len = ring->ring_size - ring->wp; in dhd_dbg_ring_push()
176 ring->id, ring->name, ring->rp, ring->wp, in dhd_dbg_ring_push()
181 memset((uint8 *)ring->ring_buf + ring->wp, 0, ring->rem_len); in dhd_dbg_ring_push()
192 if (ring->rp == ring->wp) { in dhd_dbg_ring_push()
195 ring->wp = 0; in dhd_dbg_ring_push()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/
H A Ddhd_dbg_ring.c61 ring->wp = ring->rp = 0; in dhd_dbg_ring_init()
80 ring->wp = ring->rp = 0; in dhd_dbg_ring_deinit()
155 __FUNCTION__, ring->id, ring->name, hdr->len, w_len, ring->wp, ring->rp, in dhd_dbg_ring_push()
167 avail_size = DBG_RING_CHECK_WRITE_SPACE(ring->rp, ring->wp, ring->ring_size); in dhd_dbg_ring_push()
170 if (ring->rp <= ring->wp) { in dhd_dbg_ring_push()
172 ring->rem_len = ring->ring_size - ring->wp; in dhd_dbg_ring_push()
176 ring->id, ring->name, ring->rp, ring->wp, in dhd_dbg_ring_push()
181 memset((uint8 *)ring->ring_buf + ring->wp, 0, ring->rem_len); in dhd_dbg_ring_push()
192 if (ring->rp == ring->wp) { in dhd_dbg_ring_push()
195 ring->wp = 0; in dhd_dbg_ring_push()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/
H A Ddhd_dbg_ring.c111 ring->wp = ring->rp = 0; in dhd_dbg_ring_init()
131 ring->wp = ring->rp = 0; in dhd_dbg_ring_deinit()
208 __FUNCTION__, ring->id, ring->name, hdr->len, w_len, ring->wp, ring->rp, in dhd_dbg_ring_push()
220 avail_size = DBG_RING_CHECK_WRITE_SPACE(ring->rp, ring->wp, ring->ring_size); in dhd_dbg_ring_push()
223 if (ring->rp <= ring->wp) { in dhd_dbg_ring_push()
225 ring->rem_len = ring->ring_size - ring->wp; in dhd_dbg_ring_push()
229 ring->id, ring->name, ring->rp, ring->wp, in dhd_dbg_ring_push()
234 memset((uint8 *)ring->ring_buf + ring->wp, 0, ring->rem_len); in dhd_dbg_ring_push()
245 if (ring->rp == ring->wp) { in dhd_dbg_ring_push()
248 ring->wp = 0; in dhd_dbg_ring_push()
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/bcmdhd/
H A Ddhd_dbg_ring.c111 ring->wp = ring->rp = 0; in dhd_dbg_ring_init()
131 ring->wp = ring->rp = 0; in dhd_dbg_ring_deinit()
208 __FUNCTION__, ring->id, ring->name, hdr->len, w_len, ring->wp, ring->rp, in dhd_dbg_ring_push()
220 avail_size = DBG_RING_CHECK_WRITE_SPACE(ring->rp, ring->wp, ring->ring_size); in dhd_dbg_ring_push()
223 if (ring->rp <= ring->wp) { in dhd_dbg_ring_push()
225 ring->rem_len = ring->ring_size - ring->wp; in dhd_dbg_ring_push()
229 ring->id, ring->name, ring->rp, ring->wp, in dhd_dbg_ring_push()
234 memset((uint8 *)ring->ring_buf + ring->wp, 0, ring->rem_len); in dhd_dbg_ring_push()
245 if (ring->rp == ring->wp) { in dhd_dbg_ring_push()
248 ring->wp = 0; in dhd_dbg_ring_push()
[all …]
/OK3568_Linux_fs/kernel/sound/hda/
H A Dhdac_controller.c70 bus->rirb.wp = bus->rirb.rp = 0; in snd_hdac_bus_init_cmd_io()
145 unsigned int wp, rp; in snd_hdac_bus_send_cmd() local
152 wp = snd_hdac_chip_readw(bus, CORBWP); in snd_hdac_bus_send_cmd()
153 if (wp == 0xffff) { in snd_hdac_bus_send_cmd()
158 wp++; in snd_hdac_bus_send_cmd()
159 wp %= AZX_MAX_CORB_ENTRIES; in snd_hdac_bus_send_cmd()
162 if (wp == rp) { in snd_hdac_bus_send_cmd()
169 bus->corb.buf[wp] = cpu_to_le32(val); in snd_hdac_bus_send_cmd()
170 snd_hdac_chip_writew(bus, CORBWP, wp); in snd_hdac_bus_send_cmd()
189 unsigned int rp, wp; in snd_hdac_bus_update_rirb() local
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/OK3568_Linux_fs/u-boot/board/freescale/m5253demo/
H A Dflash.c321 ulong wp, count; in write_buff() local
329 wp = addr; in write_buff()
332 if (wp & 1) { in write_buff()
333 data = *((FPWV *) wp); in write_buff()
336 if ((rc = write_word(info, (FPWV *) wp, data)) != 0) in write_buff()
339 wp++; in write_buff()
351 if ((rc = write_word(info, (FPWV *) wp, data)) != 0) in write_buff()
354 wp += 2; in write_buff()
367 data = *((FPWV *) wp); in write_buff()
371 if ((rc = write_word(info, (FPWV *) wp, data)) != 0) in write_buff()
[all …]
/OK3568_Linux_fs/u-boot/board/cobra5272/
H A Dflash.c315 ulong wp, data; in write_buff() local
330 wp = addr; in write_buff()
335 if ((rc = write_word (info, wp - 1, data)) != 0) { in write_buff()
339 wp += 1; in write_buff()
345 if ((rc = write_word (info, wp, data)) != 0) { in write_buff()
349 wp += 2; in write_buff()
355 *((volatile u8 *) (wp + 1)); in write_buff()
356 if ((rc = write_word (info, wp, data)) != 0) { in write_buff()
360 wp += 1; in write_buff()
/OK3568_Linux_fs/kernel/arch/ia64/kernel/
H A Dpatch.c147 u64 *wp; in ia64_patch_mckinley_e9() local
160 wp = (u64 *) ia64_imva((char *) offp + *offp); in ia64_patch_mckinley_e9()
161 wp[0] = 0x0000000100000011UL; /* nop.m 0; nop.i 0; br.ret.sptk.many b6 */ in ia64_patch_mckinley_e9()
162 wp[1] = 0x0084006880000200UL; in ia64_patch_mckinley_e9()
163 wp[2] = 0x0000000100000000UL; /* nop.m 0; nop.i 0; nop.i 0 */ in ia64_patch_mckinley_e9()
164 wp[3] = 0x0004000000000200UL; in ia64_patch_mckinley_e9()
165 ia64_fc(wp); ia64_fc(wp + 2); in ia64_patch_mckinley_e9()
/OK3568_Linux_fs/kernel/lib/raid6/
H A Dneon.uc62 register unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
70 wq$$ = wp$$ = vld1q_u8(&dptr[z0][d+$$*NSIZE]);
73 wp$$ = veorq_u8(wp$$, wd$$);
81 vst1q_u8(&p[d+NSIZE*$$], wp$$);
93 register unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
102 wp$$ = veorq_u8(vld1q_u8(&p[d+$$*NSIZE]), wq$$);
107 wp$$ = veorq_u8(wp$$, wd$$);
149 vst1q_u8(&p[d+NSIZE*$$], wp$$);

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