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Searched refs:ufshcd_readl (Results 1 – 13 of 13) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/ufs/
H A Dufs.c74 while ((ufshcd_readl(hba, reg) & mask) != val) { in ufshcd_wait_for_register()
76 if ((ufshcd_readl(hba, reg) & mask) != val) in ufshcd_wait_for_register()
130 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY) in ufshcd_ready_for_uic_cmd()
141 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) & in ufshcd_get_uic_cmd_result()
150 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3); in ufshcd_get_dme_attr_val()
159 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & in ufshcd_is_device_present()
192 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS); in ufshcd_send_uic_cmd()
385 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE); in ufshcd_enable_intr()
434 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS); in ufshcd_make_hba_operational()
531 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE) in ufshcd_is_hba_active()
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H A Dcdns-platform.c83 data = ufshcd_readl(hba, CDNS_UFS_REG_PHY_XCFGD1); in cdns_ufs_init()
H A Dufs.h906 #define ufshcd_readl(hba, reg) \ macro
/OK3568_Linux_fs/kernel/drivers/scsi/ufs/
H A Dufshcd.c121 regs[pos / 4] = ufshcd_readl(hba, offset + pos); in ufshcd_dump_regs()
354 cmd = ufshcd_readl(hba, REG_UIC_COMMAND); in ufshcd_add_uic_command_trace()
357 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_1), in ufshcd_add_uic_command_trace()
358 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2), in ufshcd_add_uic_command_trace()
359 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3)); in ufshcd_add_uic_command_trace()
402 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS); in ufshcd_add_command_trace()
403 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL); in ufshcd_add_command_trace()
627 while ((ufshcd_readl(hba, reg) & mask) != val) { in ufshcd_wait_for_register()
630 if ((ufshcd_readl(hba, reg) & mask) != val) in ufshcd_wait_for_register()
668 ufshci_ver = ufshcd_readl(hba, REG_UFS_VERSION); in ufshcd_get_ufs_version()
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H A Dufshcd-crypto.c186 cpu_to_le32(ufshcd_readl(hba, REG_UFS_CCAP)); in ufshcd_hba_init_crypto_capabilities()
216 cpu_to_le32(ufshcd_readl(hba, in ufshcd_hba_init_crypto_capabilities()
H A Dufs-qcom.c351 ufshcd_readl(hba, REG_UFS_CFG2) | REG_UFS_CFG2_CGC_EN_ALL, in ufs_qcom_enable_hw_clk_gating()
446 if (ufshcd_readl(hba, REG_UFS_SYS1CLK_1US) != core_clk_cycles_per_us) { in ufs_qcom_cfg_timers()
506 if (ufshcd_readl(hba, REG_UFS_TX_SYMBOL_CLK_NS_US) != in ufs_qcom_cfg_timers()
1288 reg = ufshcd_readl(hba, REG_UFS_CFG1); in ufs_qcom_print_hw_debug_reg_all()
H A Dufshcd.h1016 #define ufshcd_readl(hba, reg) \ macro
1030 tmp = ufshcd_readl(hba, reg); in ufshcd_rmwl()
1238 return ufshcd_readl(hba, REG_UFS_VERSION); in ufshcd_vops_get_ufs_hci_version()
H A Dufs-qcom-ice.c103 if (!(ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES) & in ufs_qcom_ice_init()
H A Dufs-qcom.h146 u32 ver = ufshcd_readl(hba, REG_UFS_HW_VERSION); in ufs_qcom_get_controller_revision()
H A Dcdns-pltfrm.c241 data = ufshcd_readl(hba, CDNS_UFS_REG_PHY_XCFGD1); in cdns_ufs_m31_16nm_phy_initialization()
H A Dufs-mediatek.c259 value = ufshcd_readl(hba, REG_UFS_REFCLK_CTRL); in ufs_mtk_setup_ref_clk()
309 val = ufshcd_readl(hba, REG_UFS_PROBE); in ufs_mtk_wait_link_state()
H A Dufs-hisi.c233 reg = ufshcd_readl(hba, REG_AUTO_HIBERNATE_IDLE_TIMER); in ufs_hisi_link_startup_pre_change()
H A Dufs-sysfs.c159 ahit = ufshcd_readl(hba, REG_AUTO_HIBERNATE_IDLE_TIMER); in auto_hibern8_show()