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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mfd/
H A Dmc13xxx.txt16 - leds : Contain the led nodes and initial register values in property
17 "led-control". Number of register depends of used IC, for MC13783 is 6,
55 sw1a : regulator SW1A (register 24, bit 0)
56 sw1b : regulator SW1B (register 25, bit 0)
57 sw2a : regulator SW2A (register 26, bit 0)
58 sw2b : regulator SW2B (register 27, bit 0)
59 sw3 : regulator SW3 (register 29, bit 20)
60 vaudio : regulator VAUDIO (register 32, bit 0)
61 viohi : regulator VIOHI (register 32, bit 3)
62 violo : regulator VIOLO (register 32, bit 6)
[all …]
/OK3568_Linux_fs/yocto/poky/bitbake/lib/toaster/toastergui/templatetags/
H A Dprojecttags.py18 register = template.Library() variable
20 @register.simple_tag
24 @register.filter(name = 'sectohms')
34 @register.filter(name = 'get_tasks')
40 @register.filter(name = "json")
47 @register.simple_tag
58 @register.filter("whitespace_slice")
76 @register.filter
82 @register.filter
86 @register.simple_tag
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/OK3568_Linux_fs/kernel/drivers/scsi/aic7xxx/
H A Daic79xx.reg2 * Aic79xx register and scratch ram definitions.
88 * is added to the register which is referenced in the driver.
89 * Unreferenced register with no dont_generate_debug_code will result
96 * as the source and destination of any register accesses in our
97 * register window.
99 register MODE_PTR {
114 register INTSTAT {
131 register SEQINTCODE {
211 register CLRINT {
229 register ERROR {
[all …]
H A Daic7xxx.reg2 * Aic7xxx register and scratch ram definitions.
59 * is added to the register which is referenced in the driver.
60 * Unreferenced register with no dont_generate_debug_code will result
68 register SCSISEQ {
85 register SXFRCTL0 {
101 register SXFRCTL1 {
118 register SCSISIGI {
145 * Writing to this register modifies the control signals on the bus. Only
149 register SCSISIGO {
175 * Contents of this register determine the Synchronous SCSI data transfer
[all …]
/OK3568_Linux_fs/yocto/meta-openembedded/meta-networking/recipes-connectivity/rdist/rdist-6.1.5/
H A Drdist-6.1.5-cleanup.patch21 - register struct namelist *nl;
34 - register int c;
35 - register char *cp1, *cp2;
45 - register int c;
46 - register char *str;
62 - register struct cmd *c, *prev, *nc;
63 - register struct namelist *h, *lasth;
80 - register struct cmd *c;
97 - register struct namelist *nl;
106 - register struct subcmd *sc;
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/leds/
H A Dregister-bit-led.txt4 where single bits in a certain register can turn on/off a
5 single LED. The register bit LEDs appear as children to the
16 - compatible : must be "register-bit-led"
17 - offset : register offset to the register controlling this LED
18 - mask : bit mask for the bit controlling this LED in the register
36 compatible = "register-bit-led";
44 compatible = "register-bit-led";
52 compatible = "register-bit-led";
60 compatible = "register-bit-led";
67 compatible = "register-bit-led";
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/OK3568_Linux_fs/yocto/poky/meta/recipes-extended/libaio/libaio/
H A D00_arches.patch35 +register long __res __asm__ ("%d0") = __NR_##sname; \
36 +register long __a __asm__ ("%d1") = (long)(a); \
46 +register long __res __asm__ ("%d0") = __NR_##sname; \
47 +register long __a __asm__ ("%d1") = (long)(a); \
48 +register long __b __asm__ ("%d2") = (long)(b); \
59 +register long __res __asm__ ("%d0") = __NR_##sname; \
60 +register long __a __asm__ ("%d1") = (long)(a); \
61 +register long __b __asm__ ("%d2") = (long)(b); \
62 +register long __c __asm__ ("%d3") = (long)(c); \
74 +register long __res __asm__ ("%d0") = __NR_##sname; \
[all …]
/OK3568_Linux_fs/kernel/Documentation/hwmon/
H A Ducd9200.rst62 in1_input Measured voltage. From READ_VIN register.
63 in1_min Minimum Voltage. From VIN_UV_WARN_LIMIT register.
64 in1_max Maximum voltage. From VIN_OV_WARN_LIMIT register.
65 in1_lcrit Critical minimum Voltage. VIN_UV_FAULT_LIMIT register.
67 register.
74 in[2-5]_input Measured voltage. From READ_VOUT register.
75 in[2-5]_min Minimum Voltage. From VOUT_UV_WARN_LIMIT register.
76 in[2-5]_max Maximum voltage. From VOUT_OV_WARN_LIMIT register.
77 in[2-5]_lcrit Critical minimum Voltage. VOUT_UV_FAULT_LIMIT register.
79 register.
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H A Dpmbus.rst104 This driver does not probe for PMBus devices, since there is no register
105 which can be safely used to identify the chip (The MFG_ID register is not
197 inX_input Measured voltage. From READ_VIN or READ_VOUT register.
199 From VIN_UV_WARN_LIMIT or VOUT_UV_WARN_LIMIT register.
201 From VIN_OV_WARN_LIMIT or VOUT_OV_WARN_LIMIT register.
203 From VIN_UV_FAULT_LIMIT or VOUT_UV_FAULT_LIMIT register.
205 From VIN_OV_FAULT_LIMIT or VOUT_OV_FAULT_LIMIT register.
214 From MFR_VIN_MIN or MFR_VOUT_MIN register.
216 From MFR_VIN_MAX or MFR_VOUT_MAX register.
218 currX_input Measured current. From READ_IIN or READ_IOUT register.
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H A Dmax8688.rst49 in1_input Measured voltage. From READ_VOUT register.
50 in1_min Minimum Voltage. From VOUT_UV_WARN_LIMIT register.
51 in1_max Maximum voltage. From VOUT_OV_WARN_LIMIT register.
52 in1_lcrit Critical minimum Voltage. VOUT_UV_FAULT_LIMIT register.
54 register.
65 curr1_input Measured current. From READ_IOUT register.
66 curr1_max Maximum current. From IOUT_OC_WARN_LIMIT register.
68 register.
69 curr1_max_alarm Current high alarm. From IOUT_OC_WARN_LIMIT register.
74 temp1_input Measured temperature. From READ_TEMPERATURE_1 register.
[all …]
H A Dtps40422.rst48 in[1-2]_input Measured voltage. From READ_VOUT register.
51 curr[1-2]_input Measured current. From READ_IOUT register.
53 curr1_max Maximum current. From IOUT_OC_WARN_LIMIT register.
55 register.
60 temp1_input Measured temperature. From READ_TEMPERATURE_2 register
62 temp1_max Maximum temperature. From OT_WARN_LIMIT register.
63 temp1_crit Critical high temperature. From OT_FAULT_LIMIT register.
70 temp2_input Measured temperature. From READ_TEMPERATURE_2 register
H A Dmax16064.rst49 in[1-4]_input Measured voltage. From READ_VOUT register.
50 in[1-4]_min Minimum Voltage. From VOUT_UV_WARN_LIMIT register.
51 in[1-4]_max Maximum voltage. From VOUT_OV_WARN_LIMIT register.
52 in[1-4]_lcrit Critical minimum Voltage. VOUT_UV_FAULT_LIMIT register.
54 register.
64 temp1_input Measured temperature. From READ_TEMPERATURE_1 register.
65 temp1_max Maximum temperature. From OT_WARN_LIMIT register.
66 temp1_crit Critical high temperature. From OT_FAULT_LIMIT register.
/OK3568_Linux_fs/kernel/arch/mips/boot/dts/mti/
H A Dsead3.dts114 compatible = "register-bit-led";
120 compatible = "register-bit-led";
126 compatible = "register-bit-led";
132 compatible = "register-bit-led";
138 compatible = "register-bit-led";
144 compatible = "register-bit-led";
150 compatible = "register-bit-led";
156 compatible = "register-bit-led";
163 compatible = "register-bit-led";
169 compatible = "register-bit-led";
[all …]
/OK3568_Linux_fs/kernel/Documentation/ABI/testing/
H A Dsysfs-bus-coresight-devices-tmc15 The value is read directly from HW register RSZ, 0x004.
21 Description: (Read) Shows the value held by the TMC status register. The value
22 is read directly from HW register STS, 0x00C.
28 Description: (Read) Shows the value held by the TMC RAM Read Pointer register
30 interface. The value is read directly from HW register RRP,
37 Description: (Read) Shows the value held by the TMC RAM Write Pointer register
40 from HW register RWP, 0x018.
47 read directly from HW register TRG, 0x01C.
53 Description: (Read) Shows the value held by the TMC Control register. The value
54 is read directly from HW register CTL, 0x020.
[all …]
H A Dsysfs-bus-coresight-devices-etb1020 value stored in this register+1 (from ARM ETB-TRM).
27 2. The value is read directly from HW register RDP, 0x004.
33 Description: (Read) Shows the value held by the ETB status register. The value
34 is read directly from HW register STS, 0x00C.
40 Description: (Read) Shows the value held by the ETB RAM Read Pointer register
42 interface. The value is read directly from HW register RRP,
49 Description: (Read) Shows the value held by the ETB RAM Write Pointer register
52 from HW register RWP, 0x018.
59 read directly from HW register TRG, 0x01C.
65 Description: (Read) Shows the value held by the ETB Control register. The value
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/
H A Dpinctrl-single.txt1 One-register-per-pin type device tree based pinctrl driver
8 - reg : offset and length of the register set for the mux registers
13 - pinctrl-single,register-width : pinmux register access width in bits
16 in the pinmux register
23 - pinctrl-single,bit-per-mux : boolean to indicate that one register controls
28 drive strength in the pinmux register. They're value of drive strength
35 input bias pullup in the pinmux register.
41 input bias pulldown in the pinmux register.
57 input schmitt in the pinmux register. In some silicons, there're two input
58 schmitt value (rising-edge & falling-edge) in the pinmux register.
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/reset/
H A Dti-syscon-reset.txt7 sometimes a part of a larger register space region implementing various
8 functionalities. This register range is best represented as a syscon node to
10 register space.
30 - ti,reset-bits : Contains the reset control register information
34 register from the syscon register base
36 assert control register
38 register from the syscon register base
40 deassert control register
41 Cell #5 : offset of the reset status register
42 from the syscon register base
[all …]
/OK3568_Linux_fs/yocto/meta-openembedded/meta-oe/recipes-support/gd/gd/
H A D0001-Fix-deprecared-function-prototypes.patch32 register int i;
33 register int *p;
51 -register int al, b, g, r;
54 register int i, j, dist, a, bestd;
55 register int *p;
56 @@ -306,9 +297,7 @@ register int al, b, g, r;
62 -register int al,b,g,r;
67 @@ -362,9 +351,7 @@ register int al,b,g,r;
73 -register int alpha,i,al,b,g,r;
76 register int *n;
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/c6x/
H A Ddscr.txt9 more configuration registers often protected by a lock register where one or
10 more key values must be written to a lock register in order to unlock the
11 configuration register for writes. These configuration register may be used to
13 sources (internal or pin), etc. In some cases, a configuration register is
25 - reg: register area base and size
35 offset of the devstat register
46 a lock register. Each tuple consists of the register offset, lock register
47 offsset, and the key value used to unlock the register.
52 written to the first kick register and the second key must be written to
53 the second register before other registers in the area are write-enabled.
[all …]
/OK3568_Linux_fs/buildroot/package/mbedtls/
H A D0001-bn_mul.h-fix-x86-PIC-inline-ASM-compilation-with-GCC.patch14 include/mbedtls/bn_mul.h:46:13: error: PIC register clobbered by ‘ebx’ in ‘asm’
16 This is because older GCC versions treated the x86 ebx register (which is
17 used for the GOT) as a fixed reserved register when building as PIC.
19 This is fixed by an improved register allocator in GCC 5+. From the release
22 Register allocation improvements: Reuse of the PIC hard register, instead of
23 using a fixed register, was implemented on x86/x86-64 targets. This
47 + * fixed reserved register when building as PIC, leading to errors
48 + * like: bn_mul.h:46:13: error: PIC register clobbered by ‘ebx’ in ‘asm’
50 + * This is fixed by an improved register allocator in GCC 5+. From the
52 + * Register allocation improvements: Reuse of the PIC hard register,
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/ti/
H A Dmux.txt6 register-mapped multiplexer with multiple input clock signals or
15 results in programming the register as follows:
17 register value selected parent clock
23 into the register, instead indexing begins at 1. The optional property
26 register value selected clock parent
31 The binding must provide the register to control the mux. Optionally
32 the number of bits to shift the control field in the register can be
42 - reg : register offset for register controlling adjustable mux
51 - ti,latch-bit : latch the mux value to HW, only needed if the register
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/
H A Dti-phy.txt7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
8 "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
15 "ti,control-phy-usb2-dra7" - if it has power down register like USB2 PHY on
17 "ti,control-phy-usb2-am437" - if it has power down register like USB2 PHY on
19 - reg : register ranges as listed in the reg-names property
35 - reg : Address and length of the register set for the device.
36 - reg-names: The names of the register addresses corresponding to the registers
56 CTRL_CORE_SMA_SW_0 register and register offset to the CTRL_CORE_SMA_SW_0
57 register that contains the SATA_PLL_SOFT_RESET bit. Only valid for sata_phy.
59 register offset to write the PCS delay value.
[all …]
/OK3568_Linux_fs/yocto/meta-openembedded/meta-oe/recipes-multimedia/libid3tag/libid3tag/
H A D0001-Fix-gperf-3.1-incompatibility.patch20 struct id3_compat const *id3_compat_lookup(register char const *,
21 - register unsigned int);
22 + register size_t);
33 struct id3_frametype const *id3_frametype_lookup(register char const *,
34 - register unsigned int);
35 + register size_t);
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mmc/
H A Dsdhci-msm.txt28 - reg: Base address and length of the register in the following order:
29 - Host controller register map (required)
30 - SD Core register map (required for controllers earlier than msm-v5)
31 - CQE register map (Optional, CQE support is present on SDHC instance meant
33 - Inline Crypto Engine register map (optional)
34 - reg-names: When CQE register map is supplied, below reg-names are required
35 - "hc" for Host controller register map
36 - "core" for SD core register map
37 - "cqhci" for CQE register map
38 - "ice" for Inline Crypto Engine register map (optional)
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/i2c/
H A Di2c-mux-reg.txt3 This binding describes an I2C bus multiplexer that uses a single register
14 - reg: this pair of <offset size> specifies the register to control the mux.
18 - little-endian: The existence indicates the register is in little endian.
19 - big-endian: The existence indicates the register is in big endian.
22 - write-only: The existence indicates the register is write-only.
27 in the relevant node's reg property will be output to the register.
31 register will be set according to the idle value.
34 left programmed into the register.
45 little-endian; /* little endian register on PCIe */

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