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Searched refs:pllreg (Results 1 – 9 of 9) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-s5pc1xx/
H A Dclock.c26 static unsigned long s5pc100_get_pll_clk(int pllreg) in s5pc100_get_pll_clk() argument
33 switch (pllreg) { in s5pc100_get_pll_clk()
47 printf("Unsupported PLL (%d)\n", pllreg); in s5pc100_get_pll_clk()
57 if (pllreg == APLL) in s5pc100_get_pll_clk()
77 static unsigned long s5pc110_get_pll_clk(int pllreg) in s5pc110_get_pll_clk() argument
84 switch (pllreg) { in s5pc110_get_pll_clk()
98 printf("Unsupported PLL (%d)\n", pllreg); in s5pc110_get_pll_clk()
108 if (pllreg == APLL || pllreg == MPLL) in s5pc110_get_pll_clk()
121 if (pllreg == APLL) { in s5pc110_get_pll_clk()
298 unsigned long get_pll_clk(int pllreg) in get_pll_clk() argument
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/OK3568_Linux_fs/u-boot/arch/arm/mach-exynos/
H A Dclock.c114 static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k) in exynos_get_pll_clk() argument
126 if (pllreg == APLL || pllreg == MPLL || pllreg == BPLL || in exynos_get_pll_clk()
127 pllreg == SPLL) in exynos_get_pll_clk()
141 if (pllreg == EPLL || pllreg == RPLL) { in exynos_get_pll_clk()
145 } else if (pllreg == VPLL) { in exynos_get_pll_clk()
186 static unsigned long exynos4_get_pll_clk(int pllreg) in exynos4_get_pll_clk() argument
192 switch (pllreg) { in exynos4_get_pll_clk()
208 printf("Unsupported PLL (%d)\n", pllreg); in exynos4_get_pll_clk()
212 return exynos_get_pll_clk(pllreg, r, k); in exynos4_get_pll_clk()
216 static unsigned long exynos4x12_get_pll_clk(int pllreg) in exynos4x12_get_pll_clk() argument
[all …]
/OK3568_Linux_fs/kernel/sound/pci/pcxhr/
H A Dpcxhr_mix22.c311 unsigned int *pllreg, in hr222_pll_freq_register() argument
321 *pllreg = reg + 0xC00; in hr222_pll_freq_register()
323 *pllreg = reg + 0x800; in hr222_pll_freq_register()
325 *pllreg = reg & 0x1ff; in hr222_pll_freq_register()
327 *pllreg = ((reg >> 1) & 0x1ff) + 0x200; in hr222_pll_freq_register()
330 *pllreg = ((reg >> 2) & 0x1ff) + 0x400; in hr222_pll_freq_register()
342 unsigned int speed, pllreg = 0; in hr222_sub_set_clock() local
348 err = hr222_pll_freq_register(rate, &pllreg, &realfreq); in hr222_sub_set_clock()
372 PCXHR_OUTPB(mgr, PCXHR_XLX_HIFREQ, pllreg >> 8); in hr222_sub_set_clock()
373 PCXHR_OUTPB(mgr, PCXHR_XLX_LOFREQ, pllreg & 0xff); in hr222_sub_set_clock()
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H A Dpcxhr.c184 static int pcxhr_pll_freq_register(unsigned int freq, unsigned int* pllreg, in pcxhr_pll_freq_register() argument
194 *pllreg = reg + 0x800; in pcxhr_pll_freq_register()
196 *pllreg = reg & 0x1ff; in pcxhr_pll_freq_register()
198 *pllreg = ((reg >> 1) & 0x1ff) + 0x200; in pcxhr_pll_freq_register()
201 *pllreg = ((reg >> 2) & 0x1ff) + 0x400; in pcxhr_pll_freq_register()
238 unsigned int val, realfreq, pllreg; in pcxhr_get_clock_reg() local
264 err = pcxhr_pll_freq_register(rate, &pllreg, &realfreq); in pcxhr_get_clock_reg()
269 rmh.cmd[1] = pllreg & MASK_DSP_WORD; in pcxhr_get_clock_reg()
270 rmh.cmd[2] = pllreg >> 24; in pcxhr_get_clock_reg()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/hisilicon/hibmc/
H A Dhibmc_drm_de.c234 unsigned int pllreg = 0; in format_pll_reg() local
243 pllreg |= HIBMC_FIELD(HIBMC_PLL_CTRL_BYPASS, 0); in format_pll_reg()
244 pllreg |= HIBMC_FIELD(HIBMC_PLL_CTRL_POWER, 1); in format_pll_reg()
245 pllreg |= HIBMC_FIELD(HIBMC_PLL_CTRL_INPUT, 0); in format_pll_reg()
246 pllreg |= HIBMC_FIELD(HIBMC_PLL_CTRL_POD, pll.POD); in format_pll_reg()
247 pllreg |= HIBMC_FIELD(HIBMC_PLL_CTRL_OD, pll.OD); in format_pll_reg()
248 pllreg |= HIBMC_FIELD(HIBMC_PLL_CTRL_N, pll.N); in format_pll_reg()
249 pllreg |= HIBMC_FIELD(HIBMC_PLL_CTRL_M, pll.M); in format_pll_reg()
251 return pllreg; in format_pll_reg()
/OK3568_Linux_fs/u-boot/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c27 static ulong get_PLLCLK(uint32_t *pllreg) in get_PLLCLK() argument
30 const uint32_t clkset = readl(pllreg); in get_PLLCLK()
/OK3568_Linux_fs/u-boot/arch/arm/mach-s5pc1xx/include/mach/
H A Dclk.h18 unsigned long get_pll_clk(int pllreg);
/OK3568_Linux_fs/u-boot/arch/arm/mach-exynos/include/mach/
H A Dclk.h38 unsigned long get_pll_clk(int pllreg);
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/dispnv04/
H A Dhw.c473 uint32_t pllreg = head ? NV_RAMDAC_VPLL2 : NV_PRAMDAC_VPLL_COEFF; in nv_load_state_ramdac() local
479 clk->pll_prog(clk, pllreg, &regp->pllvals); in nv_load_state_ramdac()