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Searched refs:mwidth (Results 1 – 15 of 15) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/clk/
H A Dclk-fractional-divider.c88 GENMASK(fd->mwidth - 1, 0), GENMASK(fd->nwidth - 1, 0), in clk_fd_general_approximation()
122 GENMASK(fd->mwidth - 1, 0), GENMASK(fd->nwidth - 1, 0), in clk_fd_set_rate()
183 void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth, in clk_hw_register_fractional_divider() argument
203 fd->mwidth = mwidth; in clk_hw_register_fractional_divider()
204 fd->mmask = GENMASK(mwidth - 1, 0) << mshift; in clk_hw_register_fractional_divider()
225 void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth, in clk_register_fractional_divider() argument
231 reg, mshift, mwidth, nshift, nwidth, clk_divider_flags, in clk_register_fractional_divider()
H A Dclk-stm32h7.c669 u8 mwidth; member
753 mask = GENMASK(fd->mwidth - 1, 0) << fd->mshift; in pll_fd_recalc_rate()
819 div->mwidth = 6; in clk_register_stm32_pll()
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/regmap/
H A Dclk-regmap-fractional-divider.c67 GENMASK(fd->mwidth - 1, 0), in clk_regmap_fractional_divider_approximation()
104 GENMASK(fd->mwidth - 1, 0), GENMASK(fd->nwidth - 1, 0), in clk_regmap_fractional_divider_set_rate()
148 fd->mwidth = 16; in devm_clk_regmap_register_fractional_divider()
149 fd->mmask = GENMASK(fd->mwidth - 1, 0) << fd->mshift; in devm_clk_regmap_register_fractional_divider()
H A Dclk-regmap-composite.c277 fd->mwidth = 16; in devm_clk_regmap_register_composite()
278 fd->mmask = GENMASK(fd->mwidth - 1, 0) << fd->mshift; in devm_clk_regmap_register_composite()
H A Dclk-regmap.h228 u8 mwidth; member
/OK3568_Linux_fs/kernel/drivers/clk/sunxi/
H A Dclk-sun9i-core.c61 .mwidth = 1,
118 .mwidth = 2,
254 .mwidth = 5,
H A Dclk-sunxi.c421 .mwidth = 2,
432 .mwidth = 2,
442 .mwidth = 2,
470 .mwidth = 2,
477 .mwidth = 5,
485 .mwidth = 5,
1151 .mwidth = 4,
H A Dclk-factors.c57 if (config->mwidth != SUNXI_FACTORS_NOT_APPLICABLE) in clk_factors_recalc_rate()
58 m = FACTOR_GET(config->mshift, config->mwidth, reg); in clk_factors_recalc_rate()
155 reg = FACTOR_SET(config->mshift, config->mwidth, reg, req.m); in clk_factors_set_rate()
H A Dclk-factors.h16 u8 mwidth; member
H A Dclk-sun6i-ar100.c56 .mwidth = 5,
H A Dclk-mod0.c53 .mwidth = 4,
/OK3568_Linux_fs/kernel/drivers/clk/imx/
H A Dclk-composite-7ulp.c56 fd->mwidth = PCG_FRAC_WIDTH; in imx7ulp_clk_hw_composite()
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk.c229 GENMASK(fd->mwidth - 1, 0), GENMASK(fd->nwidth - 1, 0), in rockchip_fractional_approximation()
273 div->mwidth = 16; in rockchip_clk_register_frac_branch()
274 div->mmask = GENMASK(div->mwidth - 1, 0) << div->mshift; in rockchip_clk_register_frac_branch()
/OK3568_Linux_fs/kernel/include/linux/
H A Dclk-provider.h960 u8 mwidth; member
981 void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
985 void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth,
/OK3568_Linux_fs/kernel/drivers/video/fbdev/aty/
H A Datyfb_base.c3302 u16 mwidth, mheight, lcd_hsync_start, lcd_vsync_start; in aty_init_lcd() local
3305 mwidth = *((u16 *)(modeptr+0)); in aty_init_lcd()
3308 if (mwidth == width && mheight == height) { in aty_init_lcd()