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Searched refs:mmcc (Results 1 – 16 of 16) sorted by relevance

/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/qcom/
H A Dmsm8996.dtsi7 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
483 mmcc: clock-controller@8c0000 { label
484 compatible = "qcom,mmcc-msm8996";
489 assigned-clocks = <&mmcc MMPLL9_PLL>,
490 <&mmcc MMPLL1_PLL>,
491 <&mmcc MMPLL3_PLL>,
492 <&mmcc MMPLL4_PLL>,
493 <&mmcc MMPLL5_PLL>;
511 power-domains = <&mmcc MDSS_GDSC>;
517 clocks = <&mmcc MDSS_AHB_CLK>;
[all …]
H A Dapq8096-db820c.dtsi244 &mmcc {
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/msm/
H A Dedp.txt11 - power-domains: Should be <&mmcc MDSS_GDSC>.
38 power-domains = <&mmcc MDSS_GDSC>;
46 <&mmcc MDSS_EDPAUX_CLK>,
47 <&mmcc MDSS_EDPPIXEL_CLK>,
48 <&mmcc MDSS_AHB_CLK>,
49 <&mmcc MDSS_EDPLINK_CLK>,
50 <&mmcc MDSS_MDP_CLK>;
H A Dhdmi.txt14 - power-domains: Should be <&mmcc MDSS_GDSC>.
50 - power-domains: Should be <&mmcc MDSS_GDSC>.
65 power-domains = <&mmcc MDSS_GDSC>;
71 <&mmcc HDMI_APP_CLK>,
72 <&mmcc HDMI_M_AHB_CLK>,
73 <&mmcc HDMI_S_AHB_CLK>;
94 power-domains = <&mmcc MDSS_GDSC>;
96 clocks = <&mmcc HDMI_S_AHB_CLK>;
H A Dmdp4.txt77 <&mmcc MDP_CLK>,
78 <&mmcc MDP_AHB_CLK>,
79 <&mmcc MDP_AXI_CLK>,
80 <&mmcc MDP_LUT_CLK>,
81 <&mmcc HDMI_TV_CLK>,
82 <&mmcc MDP_TV_CLK>;
H A Ddsi.txt11 - power-domains: Should be <&mmcc MDSS_GDSC>.
109 - power-domains: Should be <&mmcc MDSS_GDSC>.
155 power-domains = <&mmcc MDSS_GDSC>;
165 <&mmcc MDSS_AXI_CLK>,
166 <&mmcc MDSS_BYTE0_CLK>,
167 <&mmcc MDSS_ESC0_CLK>,
168 <&mmcc MMSS_MISC_AHB_CLK>,
169 <&mmcc MDSS_AHB_CLK>,
170 <&mmcc MDSS_MDP_CLK>,
171 <&mmcc MDSS_PCLK0_CLK>;
[all …]
H A Dgpu.txt57 clocks = <&mmcc OXILI_GFX3D_CLK>,
58 <&mmcc OXILICX_AHB_CLK>,
59 <&mmcc OXILICX_AXI_CLK>;
61 power-domains = <&mmcc OXILICX_GDSC>;
75 <&mmcc OCMEMCX_OCMEMNOC_CLK>;
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dqcom-apq8064.dtsi6 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
840 mmcc: clock-controller@4000000 { label
841 compatible = "qcom,mmcc-apq8064";
1162 <&mmcc GFX3D_CLK>,
1163 <&mmcc GFX3D_AHB_CLK>,
1164 <&mmcc GFX3D_AXI_CLK>,
1165 <&mmcc MMSS_IMEM_AHB_CLK>;
1257 clocks = <&mmcc DSI_M_AHB_CLK>,
1258 <&mmcc DSI_S_AHB_CLK>,
1259 <&mmcc AMP_AHB_CLK>,
[all …]
H A Dqcom-msm8974.dtsi7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
680 mmcc: clock-controller@fd8c0000 { label
681 compatible = "qcom,mmcc-msm8974";
1336 <&mmcc OCMEMCX_OCMEMNOC_CLK>;
1389 clocks = <&mmcc MMSS_S0_AXI_CLK>,
1390 <&mmcc MMSS_S0_AXI_CLK>;
1411 power-domains = <&mmcc MDSS_GDSC>;
1413 clocks = <&mmcc MDSS_AHB_CLK>,
1414 <&mmcc MDSS_AXI_CLK>,
1415 <&mmcc MDSS_VSYNC_CLK>;
[all …]
H A Dqcom-msm8960.dtsi133 compatible = "qcom,mmcc-msm8960";
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/i2c/
H A Di2c-qcom-cci.txt68 clocks = <&mmcc MMSS_MMAGIC_AHB_CLK>,
69 <&mmcc CAMSS_TOP_AHB_CLK>,
70 <&mmcc CAMSS_CCI_AHB_CLK>,
71 <&mmcc CAMSS_CCI_CLK>,
72 <&mmcc CAMSS_AHB_CLK>;
/OK3568_Linux_fs/kernel/sound/soc/codecs/
H A Dcs42l73.c32 u8 spc, mmcc, spfs; member
784 u8 mmcc; member
939 u8 spc, mmcc; in cs42l73_set_dai_fmt() local
942 mmcc = snd_soc_component_read(component, CS42L73_MMCC(id)); in cs42l73_set_dai_fmt()
946 mmcc |= CS42L73_MS_MASTER; in cs42l73_set_dai_fmt()
950 mmcc &= ~CS42L73_MS_MASTER; in cs42l73_set_dai_fmt()
966 if (mmcc & CS42L73_MS_MASTER) { in cs42l73_set_dai_fmt()
1002 priv->config[id].mmcc = mmcc; in cs42l73_set_dai_fmt()
1054 if (priv->config[id].mmcc & CS42L73_MS_MASTER) { in cs42l73_pcm_hw_params()
1066 cs42l73_mclk_coeffs[mclk_coeff].mmcc); in cs42l73_pcm_hw_params()
[all …]
H A Des8396.c178 u8 spc, mmcc, spfs; member
2300 u8 spc, mmcc; in es8396_set_dai_fmt() local
2305 mmcc = snd_soc_component_read(component, ES8396_SDP_1_MS_REG12); in es8396_set_dai_fmt()
2309 mmcc = snd_soc_component_read(component, ES8396_SDP_2_MS_REG13); in es8396_set_dai_fmt()
2313 mmcc = snd_soc_component_read(component, ES8396_SDP_3_MS_REG14); in es8396_set_dai_fmt()
2321 mmcc &= ~MS_MASTER; in es8396_set_dai_fmt()
2322 mmcc |= 0x24; in es8396_set_dai_fmt()
2324 mmcc &= 0xe4; /* select bclkm1,lrckm3 */ in es8396_set_dai_fmt()
2326 mmcc &= 0xe4; /* select bclkm2,lrckm4 */ in es8396_set_dai_fmt()
2327 mmcc |= 0x09; in es8396_set_dai_fmt()
[all …]
/OK3568_Linux_fs/kernel/drivers/clk/qcom/
H A DMakefile21 obj-$(CONFIG_APQ_MMCC_8084) += mmcc-apq8084.o
41 obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
42 obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
43 obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o
44 obj-$(CONFIG_MSM_MMCC_8998) += mmcc-msm8998.o
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/iommu/
H A Dmsm,iommu-v0.txt50 <&mmcc SMMU_AHB_CLK>,
51 <&mmcc MDP_AXI_CLK>;
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/i2c/
H A Dsony,imx214.txt44 clocks = <&mmcc CAMSS_MCLK0_CLK>;