Searched refs:lvds_gen_cntl (Results 1 – 7 of 7) sorted by relevance
50 u32 lvds_gen_cntl, tmpPixclksCntl; in radeon_bl_update_status() local69 lvds_gen_cntl = INREG(LVDS_GEN_CNTL); in radeon_bl_update_status()71 lvds_gen_cntl &= ~LVDS_DISPLAY_DIS; in radeon_bl_update_status()72 if (!(lvds_gen_cntl & LVDS_BLON) || !(lvds_gen_cntl & LVDS_ON)) { in radeon_bl_update_status()73 lvds_gen_cntl |= (rinfo->init_state.lvds_gen_cntl & LVDS_DIGON); in radeon_bl_update_status()74 lvds_gen_cntl |= LVDS_BLON | LVDS_EN; in radeon_bl_update_status()75 OUTREG(LVDS_GEN_CNTL, lvds_gen_cntl); in radeon_bl_update_status()76 lvds_gen_cntl &= ~LVDS_BL_MOD_LEVEL_MASK; in radeon_bl_update_status()77 lvds_gen_cntl |= in radeon_bl_update_status()80 lvds_gen_cntl |= LVDS_ON; in radeon_bl_update_status()[all …]
1088 | LVDS_EN | (rinfo->init_state.lvds_gen_cntl in radeon_screen_blank()1095 rinfo->init_state.lvds_gen_cntl &= ~LVDS_STATE_MASK; in radeon_screen_blank()1096 rinfo->init_state.lvds_gen_cntl |= in radeon_screen_blank()1133 rinfo->init_state.lvds_gen_cntl &= ~LVDS_STATE_MASK; in radeon_screen_blank()1134 rinfo->init_state.lvds_gen_cntl |= val & LVDS_STATE_MASK; in radeon_screen_blank()1332 save->lvds_gen_cntl = INREG(LVDS_GEN_CNTL); in radeon_save_state()1893 newmode->lvds_gen_cntl = rinfo->init_state.lvds_gen_cntl; in radeonfb_set_par()1899 newmode->lvds_gen_cntl |= (LVDS_ON | LVDS_BLON); in radeonfb_set_par()
225 u32 lvds_gen_cntl; member
58 uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man; in radeon_legacy_lvds_update() local64 lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); in radeon_legacy_lvds_update()65 backlight_level = (lvds_gen_cntl >> RADEON_LVDS_BL_MOD_LEVEL_SHIFT) & 0xff; in radeon_legacy_lvds_update()104 lvds_gen_cntl &= ~(RADEON_LVDS_DISPLAY_DIS | in radeon_legacy_lvds_update()106 lvds_gen_cntl |= (RADEON_LVDS_ON | RADEON_LVDS_EN | in radeon_legacy_lvds_update()110 lvds_gen_cntl |= RADEON_LVDS_BL_MOD_EN; in radeon_legacy_lvds_update()112 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); in radeon_legacy_lvds_update()119 lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS; in radeon_legacy_lvds_update()121 lvds_gen_cntl &= ~RADEON_LVDS_BL_MOD_EN; in radeon_legacy_lvds_update()122 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); in radeon_legacy_lvds_update()[all …]
1124 lvds->lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); in radeon_legacy_get_lvds_info_from_regs()1219 lvds->lvds_gen_cntl = 0xff00; in radeon_combios_get_lvds_info()1221 lvds->lvds_gen_cntl |= RADEON_LVDS_PANEL_FORMAT; in radeon_combios_get_lvds_info()1224 lvds->lvds_gen_cntl |= RADEON_LVDS_PANEL_TYPE; in radeon_combios_get_lvds_info()1228 lvds->lvds_gen_cntl |= RADEON_LVDS_NO_FM; in radeon_combios_get_lvds_info()1231 lvds->lvds_gen_cntl |= RADEON_LVDS_2_GREY; in radeon_combios_get_lvds_info()1234 lvds->lvds_gen_cntl |= RADEON_LVDS_4_GREY; in radeon_combios_get_lvds_info()1241 lvds->lvds_gen_cntl |= RADEON_LVDS_FP_POL_LOW; in radeon_combios_get_lvds_info()1244 lvds->lvds_gen_cntl |= RADEON_LVDS_LP_POL_LOW; in radeon_combios_get_lvds_info()1247 lvds->lvds_gen_cntl |= RADEON_LVDS_DTM_POL_LOW; in radeon_combios_get_lvds_info()[all …]
390 uint32_t lvds_gen_cntl; member
216 u32 lvds_gen_cntl; member