| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/lib/gcc/aarch64-none-linux-gnu/10.3.1/plugin/include/ |
| H A D | align.h | 54 levels[0].log = log0; 55 levels[0].maxskip = maxskip0; 56 levels[1].log = log1; 57 levels[1].maxskip = maxskip1; 65 levels[i].normalize (); in normalize() 71 int log0 = MAX (f0.levels[0].log, f1.levels[0].log); in max() 72 int maxskip0 = MAX (f0.levels[0].maxskip, f1.levels[0].maxskip); in max() 73 int log1 = MAX (f0.levels[1].log, f1.levels[1].log); in max() 74 int maxskip1 = MAX (f0.levels[1].maxskip, f1.levels[1].maxskip); in max() 78 align_flags_tuple levels[2]; variable
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/lib/gcc/arm-none-linux-gnueabihf/10.3.1/plugin/include/ |
| H A D | align.h | 54 levels[0].log = log0; 55 levels[0].maxskip = maxskip0; 56 levels[1].log = log1; 57 levels[1].maxskip = maxskip1; 65 levels[i].normalize (); in normalize() 71 int log0 = MAX (f0.levels[0].log, f1.levels[0].log); in max() 72 int maxskip0 = MAX (f0.levels[0].maxskip, f1.levels[0].maxskip); in max() 73 int log1 = MAX (f0.levels[1].log, f1.levels[1].log); in max() 74 int maxskip1 = MAX (f0.levels[1].maxskip, f1.levels[1].maxskip); in max() 78 align_flags_tuple levels[2]; variable
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/ |
| H A D | rv730_dpm.c | 246 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state() 247 table->ACPIState.levels[0].gen2PCIE = pi->pcie_gen2 ? in rv730_populate_smc_acpi_state() 249 table->ACPIState.levels[0].gen2XSP = in rv730_populate_smc_acpi_state() 253 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state() 254 table->ACPIState.levels[0].gen2PCIE = 0; in rv730_populate_smc_acpi_state() 296 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl); in rv730_populate_smc_acpi_state() 297 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL2 = cpu_to_be32(mpll_func_cntl_2); in rv730_populate_smc_acpi_state() 298 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL3 = cpu_to_be32(mpll_func_cntl_3); in rv730_populate_smc_acpi_state() 299 table->ACPIState.levels[0].mclk.mclk730.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv730_populate_smc_acpi_state() 300 table->ACPIState.levels[0].mclk.mclk730.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv730_populate_smc_acpi_state() [all …]
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| H A D | rv740_dpm.c | 334 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state() 335 table->ACPIState.levels[0].gen2PCIE = in rv740_populate_smc_acpi_state() 338 table->ACPIState.levels[0].gen2XSP = in rv740_populate_smc_acpi_state() 342 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state() 343 table->ACPIState.levels[0].gen2PCIE = 0; in rv740_populate_smc_acpi_state() 373 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv740_populate_smc_acpi_state() 374 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv740_populate_smc_acpi_state() 375 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv740_populate_smc_acpi_state() 376 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv740_populate_smc_acpi_state() 377 table->ACPIState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv740_populate_smc_acpi_state() [all …]
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| H A D | cypress_dpm.c | 776 &smc_state->levels[0], in cypress_convert_power_state_to_smc() 783 &smc_state->levels[1], in cypress_convert_power_state_to_smc() 790 &smc_state->levels[2], in cypress_convert_power_state_to_smc() 795 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in cypress_convert_power_state_to_smc() 796 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in cypress_convert_power_state_to_smc() 797 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3; in cypress_convert_power_state_to_smc() 800 smc_state->levels[0].ACIndex = 2; in cypress_convert_power_state_to_smc() 801 smc_state->levels[1].ACIndex = 3; in cypress_convert_power_state_to_smc() 802 smc_state->levels[2].ACIndex = 4; in cypress_convert_power_state_to_smc() 804 smc_state->levels[0].ACIndex = 0; in cypress_convert_power_state_to_smc() [all …]
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| H A D | sumo_dpm.c | 347 u32 highest_engine_clock = ps->levels[ps->num_levels - 1].sclk; in sumo_program_bsp() 411 m_a = asi * ps->levels[i].sclk / 100; in sumo_program_at() 670 pi->boost_pl = new_ps->levels[new_ps->num_levels - 1]; in sumo_patch_boost_state() 762 sumo_program_power_level(rdev, &new_ps->levels[i], i); in sumo_program_power_levels_0_to_n() 844 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in sumo_set_uvd_clock_before_set_eng_clock() 845 current_ps->levels[current_ps->num_levels - 1].sclk) in sumo_set_uvd_clock_before_set_eng_clock() 862 if (new_ps->levels[new_ps->num_levels - 1].sclk < in sumo_set_uvd_clock_after_set_eng_clock() 863 current_ps->levels[current_ps->num_levels - 1].sclk) in sumo_set_uvd_clock_after_set_eng_clock() 1053 current_vddc = current_ps->levels[current_index].vddc_index; in sumo_patch_thermal_state() 1054 current_sclk = current_ps->levels[current_index].sclk; in sumo_patch_thermal_state() [all …]
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| H A D | rv770_dpm.c | 289 smc_state->levels[i].aT = cpu_to_be32(a_t); in rv770_populate_smc_t() 295 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].aT = in rv770_populate_smc_t() 309 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in rv770_populate_smc_sp() 311 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].bSP = in rv770_populate_smc_sp() 685 &smc_state->levels[0], in rv770_convert_power_state_to_smc() 692 &smc_state->levels[1], in rv770_convert_power_state_to_smc() 699 &smc_state->levels[2], in rv770_convert_power_state_to_smc() 704 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in rv770_convert_power_state_to_smc() 705 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in rv770_convert_power_state_to_smc() 706 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3; in rv770_convert_power_state_to_smc() [all …]
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| H A D | trinity_dpm.c | 849 trinity_program_power_level(rdev, &new_ps->levels[i], i); in trinity_program_power_levels_0_to_n() 969 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in trinity_set_uvd_clock_before_set_eng_clock() 970 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_before_set_eng_clock() 983 if (new_ps->levels[new_ps->num_levels - 1].sclk < in trinity_set_uvd_clock_after_set_eng_clock() 984 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_after_set_eng_clock() 1331 ps->levels[0] = pi->boot_pl; in trinity_patch_boot_state() 1354 pi->current_ps.levels[0] = pi->boot_pl; in trinity_construct_boot_state() 1409 current_vddc = current_ps->levels[current_index].vddc_index; in trinity_patch_thermal_state() 1410 current_sclk = current_ps->levels[current_index].sclk; in trinity_patch_thermal_state() 1416 ps->levels[0].vddc_index = current_vddc; in trinity_patch_thermal_state() [all …]
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| H A D | ni_dpm.c | 1691 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL = in ni_populate_smc_initial_state() 1693 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL_2 = in ni_populate_smc_initial_state() 1695 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = in ni_populate_smc_initial_state() 1697 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL_2 = in ni_populate_smc_initial_state() 1699 table->initialState.levels[0].mclk.vMCLK_PWRMGT_CNTL = in ni_populate_smc_initial_state() 1701 table->initialState.levels[0].mclk.vDLL_CNTL = in ni_populate_smc_initial_state() 1703 table->initialState.levels[0].mclk.vMPLL_SS = in ni_populate_smc_initial_state() 1705 table->initialState.levels[0].mclk.vMPLL_SS2 = in ni_populate_smc_initial_state() 1707 table->initialState.levels[0].mclk.mclk_value = in ni_populate_smc_initial_state() 1710 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = in ni_populate_smc_initial_state() [all …]
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| H A D | si_dpm.c | 2299 smc_state->levels[0].dpm2.MaxPS = 0; in si_populate_power_containment_values() 2300 smc_state->levels[0].dpm2.NearTDPDec = 0; in si_populate_power_containment_values() 2301 smc_state->levels[0].dpm2.AboveSafeInc = 0; in si_populate_power_containment_values() 2302 smc_state->levels[0].dpm2.BelowSafeInc = 0; in si_populate_power_containment_values() 2303 smc_state->levels[0].dpm2.PwrEfficiencyRatio = 0; in si_populate_power_containment_values() 2353 …smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / ma… in si_populate_power_containment_values() 2354 smc_state->levels[i].dpm2.NearTDPDec = SISLANDS_DPM2_NEAR_TDP_DEC; in si_populate_power_containment_values() 2355 smc_state->levels[i].dpm2.AboveSafeInc = SISLANDS_DPM2_ABOVE_SAFE_INC; in si_populate_power_containment_values() 2356 smc_state->levels[i].dpm2.BelowSafeInc = SISLANDS_DPM2_BELOW_SAFE_INC; in si_populate_power_containment_values() 2357 smc_state->levels[i].dpm2.PwrEfficiencyRatio = cpu_to_be16(pwr_efficiency_ratio); in si_populate_power_containment_values() [all …]
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| /OK3568_Linux_fs/kernel/drivers/video/backlight/ |
| H A D | pwm_bl.c | 31 unsigned int *levels; member 102 if (pb->levels) in compute_duty_cycle() 103 duty_cycle = pb->levels[brightness]; in compute_duty_cycle() 213 data->levels = devm_kcalloc(dev, data->max_brightness, in pwm_backlight_brightness_default() 214 sizeof(*data->levels), GFP_KERNEL); in pwm_backlight_brightness_default() 215 if (!data->levels) in pwm_backlight_brightness_default() 225 data->levels[i] = (unsigned int)retval; in pwm_backlight_brightness_default() 272 size_t size = sizeof(*data->levels) * data->max_brightness; in pwm_backlight_parse_dt() 275 data->levels = devm_kzalloc(dev, size, GFP_KERNEL); in pwm_backlight_parse_dt() 276 if (!data->levels) in pwm_backlight_parse_dt() [all …]
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| H A D | led_bl.c | 20 unsigned int *levels; member 30 if (priv->levels) in led_bl_set_brightness() 31 bkl_brightness = priv->levels[level]; in led_bl_set_brightness() 138 u32 *levels = NULL; in led_bl_parse_levels() local 140 levels = devm_kzalloc(dev, sizeof(u32) * num_levels, in led_bl_parse_levels() 142 if (!levels) in led_bl_parse_levels() 146 levels, in led_bl_parse_levels() 157 if ((i && db > levels[i-1]) && db <= levels[i]) in led_bl_parse_levels() 162 priv->levels = levels; in led_bl_parse_levels()
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| /OK3568_Linux_fs/kernel/arch/powerpc/platforms/powernv/ |
| H A D | pci-ioda-tce.c | 81 unsigned long size, unsigned int levels); 218 unsigned long size, unsigned int levels) in pnv_pci_ioda2_table_do_free_pages() argument 223 if (levels) { in pnv_pci_ioda2_table_do_free_pages() 234 levels - 1); in pnv_pci_ioda2_table_do_free_pages() 258 unsigned int levels, unsigned long limit, in pnv_pci_ioda2_table_do_alloc_pages() argument 269 --levels; in pnv_pci_ioda2_table_do_alloc_pages() 270 if (!levels) { in pnv_pci_ioda2_table_do_alloc_pages() 277 levels, limit, current_offset, total_allocated); in pnv_pci_ioda2_table_do_alloc_pages() 292 __u32 page_shift, __u64 window_size, __u32 levels, in pnv_pci_ioda2_table_alloc_pages() argument 304 if (!levels || (levels > POWERNV_IOMMU_MAX_LEVELS)) in pnv_pci_ioda2_table_alloc_pages() [all …]
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| /OK3568_Linux_fs/kernel/arch/riscv/kernel/ |
| H A D | cacheinfo.c | 121 int levels = 0, leaves = 0, level; in init_cache_level() local 130 levels = 1; in init_cache_level() 140 if (level <= levels) in init_cache_level() 148 levels = level; in init_cache_level() 152 this_cpu_ci->num_levels = levels; in init_cache_level() 164 int levels = 1, level = 1; in populate_cache_leaves() local 179 if (level <= levels) in populate_cache_leaves() 184 levels = level; in populate_cache_leaves()
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| /OK3568_Linux_fs/kernel/Documentation/scheduler/ |
| H A D | sched-nice-design.rst | 6 nice-levels implementation in the new Linux scheduler. 8 Nice levels were always pretty weak under Linux and people continuously 16 In the O(1) scheduler (in 2003) we changed negative nice levels to be 58 To sum it up: we always wanted to make nice levels more consistent, but 83 nice levels were not 'punchy enough', so lots of people had to resort to 90 To address the first complaint (of nice levels being not "punchy" 92 (and granularity was made a separate concept from nice levels) and thus 98 To address the second complaint (of nice levels not being consistent), 100 tasks, regardless of their absolute nice levels. So on the new 104 levels were changed to be "multiplicative" (or exponential) - that way [all …]
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| /OK3568_Linux_fs/kernel/drivers/acpi/ |
| H A D | acpi_video.c | 238 if (vd->brightness->levels[i] == cur_level) in acpi_video_get_brightness() 251 vd->brightness->levels[request_level]); in acpi_video_set_brightness() 282 if (level == video->brightness->levels[offset]) { in video_get_cur_state() 301 level = video->brightness->levels[state - 1]; in video_set_cur_state() 319 union acpi_object **levels) in acpi_video_device_lcd_query_levels() argument 326 *levels = NULL; in acpi_video_device_lcd_query_levels() 338 *levels = obj; in acpi_video_device_lcd_query_levels() 364 if (level == device->brightness->levels[state]) { in acpi_video_device_lcd_set_level() 605 level = device->brightness->levels[bqc_value + in acpi_video_bqc_value_to_level() 642 if (device->brightness->levels[i] == *level) { in acpi_video_device_lcd_get_level_current() [all …]
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| /OK3568_Linux_fs/kernel/arch/mips/kernel/ |
| H A D | cacheinfo.c | 24 int levels = 0, leaves = 0; in init_cache_level() local 31 levels += 1; in init_cache_level() 39 levels++; in init_cache_level() 44 levels++; in init_cache_level() 48 this_cpu_ci->num_levels = levels; in init_cache_level()
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/pm/powerplay/ |
| H A D | si_dpm.c | 2395 smc_state->levels[0].dpm2.MaxPS = 0; in si_populate_power_containment_values() 2396 smc_state->levels[0].dpm2.NearTDPDec = 0; in si_populate_power_containment_values() 2397 smc_state->levels[0].dpm2.AboveSafeInc = 0; in si_populate_power_containment_values() 2398 smc_state->levels[0].dpm2.BelowSafeInc = 0; in si_populate_power_containment_values() 2399 smc_state->levels[0].dpm2.PwrEfficiencyRatio = 0; in si_populate_power_containment_values() 2448 …smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / ma… in si_populate_power_containment_values() 2449 smc_state->levels[i].dpm2.NearTDPDec = SISLANDS_DPM2_NEAR_TDP_DEC; in si_populate_power_containment_values() 2450 smc_state->levels[i].dpm2.AboveSafeInc = SISLANDS_DPM2_ABOVE_SAFE_INC; in si_populate_power_containment_values() 2451 smc_state->levels[i].dpm2.BelowSafeInc = SISLANDS_DPM2_BELOW_SAFE_INC; in si_populate_power_containment_values() 2452 smc_state->levels[i].dpm2.PwrEfficiencyRatio = cpu_to_be16(pwr_efficiency_ratio); in si_populate_power_containment_values() [all …]
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| /OK3568_Linux_fs/kernel/drivers/thermal/intel/int340x_thermal/ |
| H A D | int3406_thermal.c | 60 acpi_level = d->br->levels[d->upper_limit - state]; in int3406_thermal_set_cur_state() 83 if (acpi_level <= d->br->levels[index]) in int3406_thermal_get_cur_state() 115 d->lower_limit = int3406_thermal_get_index(d->br->levels, in int3406_thermal_get_limit() 120 d->upper_limit = int3406_thermal_get_index(d->br->levels, in int3406_thermal_get_limit()
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/ |
| H A D | rockchip_drm_backlight.c | 59 duty_cycle = bl->levels[brightness]; in compute_duty_cycle() 176 size = sizeof(*bl->levels) * bl->max_brightness; in backlight_parse_dt() 178 bl->levels = devm_kzalloc(dev, size, GFP_KERNEL); in backlight_parse_dt() 179 if (!bl->levels) in backlight_parse_dt() 183 bl->levels, in backlight_parse_dt() 196 if (bl->levels[i] > bl->scale) in backlight_parse_dt() 197 bl->scale = bl->levels[i]; in backlight_parse_dt()
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| /OK3568_Linux_fs/kernel/arch/arm64/include/asm/ |
| H A D | kvm_arm.h | 186 #define VTCR_EL2_LVLS_TO_SL0(levels) \ argument 187 ((VTCR_EL2_TGRAN_SL0_BASE - (4 - (levels))) << VTCR_EL2_SL0_SHIFT) 259 #define ARM64_VTTBR_X(ipa, levels) ((ipa) - ((levels) * (PAGE_SHIFT - 3))) argument
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| /OK3568_Linux_fs/kernel/Documentation/ABI/testing/ |
| H A D | sysfs-class-backlight-adp5520 | 4 The backlight brightness control operates at three different levels for the 16 is at one of the three levels (daylight, office or dark). This 29 one of the three levels (daylight, office or dark). This is an
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| H A D | sysfs-class-backlight-adp8860 | 4 The backlight brightness control operates at three different levels for the 21 is at one of the three levels (daylight, office or dark). This 35 one of the three levels (daylight, office or dark). This is an
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| /OK3568_Linux_fs/kernel/Documentation/arm64/ |
| H A D | memory.rst | 8 Linux kernel. The architecture allows up to 4 levels of translation 9 tables with a 4KB page size and up to 3 levels with a 64KB page size. 11 AArch64 Linux uses either 3 levels or 4 levels of translation tables 14 64KB pages, only 2 levels of translation tables, allowing 42-bit (4TB) 29 AArch64 Linux memory layout with 4KB pages + 4 levels (48-bit):: 48 AArch64 Linux memory layout with 64KB pages + 3 levels (52-bit with HW support)::
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/libexec/gcc/aarch64-none-linux-gnu/10.3.1/install-tools/ |
| H A D | fixinc.sh | 209 levels=2 213 while [ -n "$dirs" ] && [ $levels -gt 0 ] 215 levels=`expr $levels - 1`
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