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Searched refs:ddrphycfg_parents (Results 1 – 7 of 7) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/clk/mediatek/
H A Dclk-mt7622.c130 static const char * const ddrphycfg_parents[] = { variable
519 MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents,
561 MUX_GATE(CLK_TOP_SCP_SEL, "scp_sel", ddrphycfg_parents,
H A Dclk-mt8135.c278 static const char * const ddrphycfg_parents[] __initconst = { variable
381 MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents,
H A Dclk-mt7629.c106 static const char * const ddrphycfg_parents[] = { variable
491 MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents,
H A Dclk-mt6797.c104 static const char * const ddrphycfg_parents[] = { variable
330 MUX_FLAGS(CLK_TOP_MUX_DDRPHYCFG, "ddrphycfg_sel", ddrphycfg_parents,
H A Dclk-mt2701.c160 static const char * const ddrphycfg_parents[] = { variable
493 ddrphycfg_parents, 0x0040, 16, 1, 23, CLK_IS_CRITICAL),
H A Dclk-mt8167.c327 static const char * const ddrphycfg_parents[] __initconst = { variable
558 MUX(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents,
H A Dclk-mt8173.c147 static const char * const ddrphycfg_parents[] __initconst = { variable
544 MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents, 0x0040, 16, 1, 23),