Searched refs:ddr_wrlvl_cntl_3 (Results 1 – 9 of 9) sorted by relevance
120 if (regs->ddr_wrlvl_cntl_3) in fsl_ddr_set_memctl_regs()121 ddr_out32(&ddr->ddr_wrlvl_cntl_3, regs->ddr_wrlvl_cntl_3); in fsl_ddr_set_memctl_regs()
143 if (regs->ddr_wrlvl_cntl_3) in fsl_ddr_set_memctl_regs()144 out_be32(&ddr->ddr_wrlvl_cntl_3, regs->ddr_wrlvl_cntl_3); in fsl_ddr_set_memctl_regs()
175 if (regs->ddr_wrlvl_cntl_3) in fsl_ddr_set_memctl_regs()176 ddr_out32(&ddr->ddr_wrlvl_cntl_3, regs->ddr_wrlvl_cntl_3); in fsl_ddr_set_memctl_regs()
2244 ddr->ddr_wrlvl_cntl_3 = popts->wrlvl_ctl_3; in set_ddr_wrlvl_cntl()2245 debug("FSLDDR: wrlvl_cntl_3 = 0x%08x\n", ddr->ddr_wrlvl_cntl_3); in set_ddr_wrlvl_cntl()
659 CFG_REGS(ddr_wrlvl_cntl_3), in print_fsl_memctl_config_regs()749 CFG_REGS(ddr_wrlvl_cntl_3), in fsl_ddr_regs_edit()
63 u32 ddr_wrlvl_cntl_3; /* write leveling control 3 */ member
286 unsigned int ddr_wrlvl_cntl_3; member
76 out_be32(&ddr->ddr_wrlvl_cntl_3, DDR_DDR_WRLVL_CNTL_3); in ddrmc_init()
184 out_be32(&ddr->ddr_wrlvl_cntl_3, DDR_DDR_WRLVL_CNTL_3); in ddrmc_init()