| /OK3568_Linux_fs/u-boot/drivers/ddr/marvell/a38x/ |
| H A D | ddr3_a38x.c | 259 u32 data_value, pipe_enable_mask = 0; in ddr3_tip_a38x_pipe_enable() local 271 (dev_num, PIPE_ENABLE_ADDR, &data_value, MASK_ALL_BITS)); in ddr3_tip_a38x_pipe_enable() 272 data_value = (data_value & (~0xff)) | pipe_enable_mask; in ddr3_tip_a38x_pipe_enable() 273 CHECK_STATUS(ddr3_tip_reg_write(dev_num, PIPE_ENABLE_ADDR, data_value)); in ddr3_tip_a38x_pipe_enable() 286 u32 if_id, u32 reg_addr, u32 data_value, in ddr3_tip_a38x_if_write() argument 295 data_value = (ui_data_read & (~mask)) | (data_value & mask); in ddr3_tip_a38x_if_write() 298 reg_write(reg_addr, data_value); in ddr3_tip_a38x_if_write()
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| H A D | ddr3_training.c | 184 u32 data_value, enum hws_operation oper_type); 306 u32 data_value = 0, bus_width = 0, page_size = 0, cs_cnt = 0, in hws_ddr3_tip_init_controller() local 379 data_value = in hws_ddr3_tip_init_controller() 388 SDRAM_CONFIGURATION_REG, data_value, in hws_ddr3_tip_init_controller() 430 data_value = 0x7; in hws_ddr3_tip_init_controller() 456 data_value = TIME_2_CLOCK_CYCLES(t_faw, t_ckclk); in hws_ddr3_tip_init_controller() 457 data_value = data_value << 24; in hws_ddr3_tip_init_controller() 460 SDRAM_ACCESS_CONTROL_REG, data_value, in hws_ddr3_tip_init_controller() 463 data_value = in hws_ddr3_tip_init_controller() 511 data_value = in hws_ddr3_tip_init_controller() [all …]
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| H A D | ddr3_training_ip_engine.c | 523 u32 data_value = 0; in ddr3_tip_configure_odpg() local 526 data_value = ((single_pattern << 2) | (tx_phases << 5) | in ddr3_tip_configure_odpg() 531 ODPG_DATA_CONTROL_REG, data_value, 0xaffffffc); in ddr3_tip_configure_odpg() 767 u32 poll_cnt = 0, data_value; in is_odpg_access_done() local 774 data_value = read_data[if_id]; in is_odpg_access_done() 775 if (((data_value >> ODPG_BIST_DONE_BIT_OFFS) & 0x1) == in is_odpg_access_done() 777 data_value = data_value & 0xfffffffe; in is_odpg_access_done() 780 if_id, ODPG_BIST_DONE, data_value, in is_odpg_access_done()
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| H A D | ddr3_training_ip_flow.h | 291 u32 if_id, u32 reg_addr, u32 data_value, u32 mask); 301 u32 reg_addr, u32 data_value, u32 reg_mask); 308 u32 data_value);
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| H A D | ddr3_debug.c | 100 u32 if_id, reg_addr, data_value, bus_id; in ddr3_tip_reg_dump() local 131 &data_value)); in ddr3_tip_reg_dump() 132 printf("0x%x ", data_value); in ddr3_tip_reg_dump() 142 &data_value)); in ddr3_tip_reg_dump() 143 printf("0x%x ", data_value); in ddr3_tip_reg_dump() 659 u32 data_value; in read_adll_value() local 677 &data_value)); in read_adll_value() 680 data_value & mask; in read_adll_value()
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| H A D | ddr3_training_pbs.c | 938 u32 data_value = 0, bit = 0, if_id = 0, pup = 0; in ddr3_tip_print_pbs_result() local 959 &data_value)); in ddr3_tip_print_pbs_result() 960 printf("%d , ", data_value); in ddr3_tip_print_pbs_result()
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/gma500/ |
| H A D | psb_intel_sdvo.c | 2206 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ 2209 psb_intel_sdvo_connector->max_##name = data_value[0]; \ 2212 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ 2218 data_value[0], data_value[1], response); \ 2229 uint16_t response, data_value[2]; in psb_intel_sdvo_create_enhance_property_tv() local 2235 &data_value, 4)) in psb_intel_sdvo_create_enhance_property_tv() 2243 psb_intel_sdvo_connector->max_hscan = data_value[0]; in psb_intel_sdvo_create_enhance_property_tv() 2244 psb_intel_sdvo_connector->left_margin = data_value[0] - response; in psb_intel_sdvo_create_enhance_property_tv() 2247 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); in psb_intel_sdvo_create_enhance_property_tv() 2256 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); in psb_intel_sdvo_create_enhance_property_tv() [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/display/ |
| H A D | intel_sdvo.c | 3070 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ 3074 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ 3080 data_value[0], data_value[1], response); \ 3096 u16 response, data_value[2]; in intel_sdvo_create_enhance_property_tv() local 3102 &data_value, 4)) in intel_sdvo_create_enhance_property_tv() 3112 intel_sdvo_connector->max_hscan = data_value[0]; in intel_sdvo_create_enhance_property_tv() 3114 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); in intel_sdvo_create_enhance_property_tv() 3122 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); in intel_sdvo_create_enhance_property_tv() 3130 data_value[0], data_value[1], response); in intel_sdvo_create_enhance_property_tv() 3136 &data_value, 4)) in intel_sdvo_create_enhance_property_tv() [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/ethernet/intel/ixgbe/ |
| H A D | ixgbe_82599.c | 104 u16 list_offset, data_offset, data_value; in ixgbe_setup_sfp_modules_82599() local 122 if (hw->eeprom.ops.read(hw, ++data_offset, &data_value)) in ixgbe_setup_sfp_modules_82599() 124 while (data_value != 0xffff) { in ixgbe_setup_sfp_modules_82599() 125 IXGBE_WRITE_REG(hw, IXGBE_CORECTL, data_value); in ixgbe_setup_sfp_modules_82599() 127 if (hw->eeprom.ops.read(hw, ++data_offset, &data_value)) in ixgbe_setup_sfp_modules_82599()
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| /OK3568_Linux_fs/kernel/arch/ia64/include/asm/ |
| H A D | pal.h | 974 ia64_pal_cache_line_init (u64 physical_addr, u64 data_value) in ia64_pal_cache_line_init() argument 977 PAL_CALL(iprv, PAL_CACHE_LINE_INIT, physical_addr, data_value, 0); in ia64_pal_cache_line_init()
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/share/info/ |
| H A D | as.info | 16408 breg GREG data_value
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/share/info/ |
| H A D | as.info | 16408 breg GREG data_value
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