Searched refs:ctrl_config (Results 1 – 5 of 5) sorted by relevance
302 dev->ctrl_config &= ~NVME_CC_SHN_MASK; in nvme_enable_ctrl()303 dev->ctrl_config |= NVME_CC_ENABLE; in nvme_enable_ctrl()304 writel(dev->ctrl_config, &dev->bar->cc); in nvme_enable_ctrl()311 dev->ctrl_config &= ~NVME_CC_SHN_MASK; in nvme_disable_ctrl()312 dev->ctrl_config &= ~NVME_CC_ENABLE; in nvme_disable_ctrl()313 writel(dev->ctrl_config, &dev->bar->cc); in nvme_disable_ctrl()390 dev->ctrl_config = NVME_CC_CSS_NVM; in nvme_configure_admin_queue()391 dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT; in nvme_configure_admin_queue()392 dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE; in nvme_configure_admin_queue()393 dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; in nvme_configure_admin_queue()
617 u32 ctrl_config; member
1281 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; in nvme_multi_css()2412 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; in nvme_disable_ctrl()2413 ctrl->ctrl_config &= ~NVME_CC_ENABLE; in nvme_disable_ctrl()2415 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); in nvme_disable_ctrl()2446 ctrl->ctrl_config = NVME_CC_CSS_CSI; in nvme_enable_ctrl()2448 ctrl->ctrl_config = NVME_CC_CSS_NVM; in nvme_enable_ctrl()2449 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT; in nvme_enable_ctrl()2450 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; in nvme_enable_ctrl()2451 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; in nvme_enable_ctrl()2452 ctrl->ctrl_config |= NVME_CC_ENABLE; in nvme_enable_ctrl()[all …]
281 u32 ctrl_config; member
2601 bool was_suspend = !!(dev->ctrl.ctrl_config & NVME_CC_SHN_NORMAL); in nvme_reset_work()2615 if (dev->ctrl.ctrl_config & NVME_CC_ENABLE) in nvme_reset_work()