Searched refs:clock_set_pll3 (Results 1 – 6 of 6) sorted by relevance
97 clock_set_pll3(300000000); in sunxi_hdmi_hpd_detect()136 clock_set_pll3(0); in sunxi_hdmi_shutdown()591 clock_set_pll3(297000000); /* Fix the video pll at 297 MHz */ in sunxi_lcdc_pll_set()598 clock_set_pll3(best_n * 3000000); in sunxi_lcdc_pll_set()
339 clock_set_pll3(297000000); in sunxi_dw_hdmi_probe()
183 void clock_set_pll3(unsigned int clk) in clock_set_pll3() function
149 void clock_set_pll3(unsigned int clk) in clock_set_pll3() function
357 void clock_set_pll3(unsigned int hz);
506 void clock_set_pll3(unsigned int hz);