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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/
H A Drenesas,du.txt74 R8A7742 (RZ/G1H) DPAD 0 LVDS 0 LVDS 1 -
75 R8A7743 (RZ/G1M) DPAD 0 LVDS 0 - -
76 R8A7744 (RZ/G1N) DPAD 0 LVDS 0 - -
78 R8A77470 (RZ/G1C) DPAD 0 DPAD 1 LVDS 0 -
79 R8A774A1 (RZ/G2M) DPAD 0 HDMI 0 LVDS 0 -
80 R8A774B1 (RZ/G2N) DPAD 0 HDMI 0 LVDS 0 -
81 R8A774C0 (RZ/G2E) DPAD 0 LVDS 0 LVDS 1 -
82 R8A774E1 (RZ/G2H) DPAD 0 HDMI 0 LVDS 0 -
84 R8A7790 (R-Car H2) DPAD 0 LVDS 0 LVDS 1 -
85 R8A7791 (R-Car M2-W) DPAD 0 LVDS 0 - -
[all …]
/OK3568_Linux_fs/u-boot/drivers/video/bridge/
H A DKconfig7 requires LVDS, an eDP->LVDS bridge chip can be used to provide the
11 bool "Support Parade PS862X DP->LVDS bridge"
14 The Parade PS8622 and PS8625 are DisplayPort-to-LVDS (Low voltage
15 differential signalling) converters. They enable an LVDS LCD panel
17 LVDS capability, or where LVDS requires too many signals to route
21 bool "Support NXP PTN3460 DP->LVDS bridge"
24 The NXP PTN3460 is a DisplayPort-to-LVDS (Low voltage differential
25 signalling) converter. It enables an LVDS LCD panel to be connected
26 to an eDP output device such as an SoC that lacks LVDS capability,
27 or where LVDS requires too many signals to route on the PCB.
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/imx/
H A Dldb.txt1 Device-Tree bindings for LVDS Display Bridge (ldb)
3 LVDS Display Bridge
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
7 nodes describing each of the two LVDS encoder channels of the bridge.
15 interfaces as input for each LVDS channel.
17 The phandle points to the iomuxc-gpr region containing the LVDS
23 "di0_pll" - LDB LVDS channel 0 mux
24 "di1_pll" - LDB LVDS channel 1 mux
25 "di0" - LDB LVDS channel 0 gate
26 "di1" - LDB LVDS channel 1 gate
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/
H A DKconfig78 tristate "Transparent LVDS encoders and decoders support"
83 Support for transparent LVDS encoders and decoders that don't
113 GE B850v3 that convert dual channel LVDS
134 tristate "NXP PTN3460 DP/LVDS bridge"
139 NXP PTN3460 eDP-LVDS bridge chip driver.
142 tristate "Parade eDP/LVDS bridge"
148 Parade eDP-LVDS bridge chip driver.
225 tristate "Thine THC63LVD1024 LVDS decoder bridge"
228 Thine THC63LVD1024 LVDS/parallel converter driver.
239 tristate "TC358764 DSI/LVDS bridge"
[all …]
/OK3568_Linux_fs/u-boot/drivers/video/drm/
H A DKconfig9 (LVDS), embedded DisplayPort (eDP) and Display Serial Interface (DSI).
62 Driver for ROHM clockless serdes with MIPI or LVDS Input.
104 tristate "Rockchip INNO LVDS/TTL PHY driver"
107 Enable this to support the Rockchip LVDS/TTL PHY
111 tristate "Rockchip INNO MIPI/LVDS/TTL PHY driver"
114 Enable this to support the Rockchip MIPI/LVDS/TTL PHY
168 bool "Rockchip LVDS Support"
172 Choose this option to enable support for Rockchip LVDS controllers.
173 Rockchip rk3288 SoC has LVDS TX Controller can be used, and it
174 support LVDS, rgb, dual LVDS output mode. say Y to enable its
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/renesas/
H A Dr8a774c0-ek874-idk-2121wr.dts4 * connected to an Advantech IDK-2121WR 21.5" LVDS panel
68 * When GP0_17 is low LVDS[01] are connected to the LVDS connector
69 * When GP0_17 is high LVDS[01] are connected to the LT8918L
H A Dhihope-rzg2-ex-lvds.dtsi3 * Device Tree Source for the RZ/G2[MN] HiHope sub board LVDS common parts
20 * When GP1_20 is LOW LVDS0 is connected to the LVDS connector
H A Dr8a774e1-hihope-rzg2h-ex-idk-1110wr.dts4 * to an Advantech IDK-1110WR 10.1" LVDS panel
H A Dr8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dts4 * Advantech IDK-1110WR 10.1" LVDS panel
H A Dr8a774a1-hihope-rzg2m-ex-idk-1110wr.dts4 * to an Advantech IDK-1110WR 10.1" LVDS panel
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3368/
H A DKconfig21 - MIPI-DSI/single-channel LVDS (muxed on the 'LVDS-A' pin-group)
39 with integrated CVBS (TP2825) / MIPI DSI / CSI / LVDS
/OK3568_Linux_fs/u-boot/drivers/video/rockchip/
H A DKconfig17 (LVDS), embedded DisplayPort (eDP) and Display Serial Interface (DSI).
49 bool "LVDS Port"
52 This enables Low-voltage Differential Signaling(LVDS) display
/OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/
H A DKconfig115 bool "Rockchip LVDS support"
118 Choose this option to enable support for Rockchip LVDS controllers.
119 Rockchip rk3288 SoC has LVDS TX Controller can be used, and it
120 support LVDS, rgb, dual LVDS output mode. say Y to enable its
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/bridge/
H A Dtoshiba,tc358764.txt1 TC358764 MIPI-DSI to LVDS panel bridge
14 1: LVDS Output, mandatory
H A Dmegachips-stdpxxxx-ge-b850v3-fw.txt2 STDP4028-ge-b850v3-fw bridges (LVDS-DP)
7 Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
/OK3568_Linux_fs/kernel/drivers/gpu/drm/imx/
H A DKconfig29 tristate "Support for LVDS displays"
33 Choose this to enable the internal LVDS Display Bridge (LDB)
/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/video/
H A Drockchip-lvds.txt1 Rockchip LVDS interface
17 serialized LVDS signal.
/OK3568_Linux_fs/u-boot/board/boundary/nitrogen6x/
H A DREADME52 Hannstar-XGA - 1024 x 768 LVDS (Freescale part number MCIMX-LVDS1)
53 wsvga-lvds - 1024 x 600 LVDS (Boundary p/n Nit6X_1024x600)
58 or the I2C touch controller of the LVDS and RGB displays in the priority
/OK3568_Linux_fs/kernel/drivers/gpu/drm/rcar-du/
H A DKconfig32 tristate "R-Car DU LVDS Encoder Support"
39 Enable support for the R-Car Display Unit embedded LVDS encoders.
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3588-vehicle-serdes-display-v21.dtsi745 0011 0003 //Clockless Link Receiver Lane-0+ LVDS portA
746 0012 0003 //Clockless Link Receiver Lane-1+ LVDS portB
860 0013 001a //013h[3]1-lane1 enable 013h[3] 1-LVDS Receiver Port-A
861 0014 000a //014h[3]1-lane1 enable 014h[3] 1-LVDS Receiver Port-B
960 0011 0003 //Clockless Link Receiver Lane-0+ LVDS portA
961 0012 0003 //Clockless Link Receiver Lane-1+ LVDS portB
1396 0011 0003 //Clockless Link Receiver Lane-0+ LVDS portA
1397 0012 0003 //Clockless Link Receiver Lane-1+ LVDS portB
1708 0013 001a //013h[3]1-lane1 enable 013h[3] 1-LVDS Receiver Port-A
1709 0014 000a //014h[3]1-lane1 enable 014h[3] 1-LVDS Receiver Port-B
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Dsilabs,si5341.txt83 1 = differential (defaults to LVDS levels)
119 silabs,format = <1>; /* LVDS 3v3 */
127 * LVDS 1v8
131 silabs,format = <1>; /* LVDS 1v8 */
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/msm/
H A Dmdp4.txt23 that are external to the MDP hardware, such as HDMI, DSI, EDP etc (LVDS is a
33 Port 0 -> LCDC/LVDS
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/rockchip/
H A Drockchip-lvds.txt1 Rockchip RK3288 LVDS interface
22 - phys: LVDS/DSI DPHY (px30 only)
/OK3568_Linux_fs/kernel/drivers/gpu/drm/gma500/
H A Dpsb_intel_display.c224 u32 lvds = REG_READ(LVDS); in psb_intel_crtc_mode_set()
244 REG_WRITE(LVDS, lvds); in psb_intel_crtc_mode_set()
245 REG_READ(LVDS); in psb_intel_crtc_mode_set()
316 is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN); in psb_intel_crtc_clock_get()
H A Dcdv_intel_display.c707 if ((REG_READ(LVDS) & LVDS_A3_POWER_MASK) == LVDS_A3_POWER_UP) in cdv_intel_crtc_mode_set()
738 u32 lvds = REG_READ(LVDS); in cdv_intel_crtc_mode_set()
757 REG_WRITE(LVDS, lvds); in cdv_intel_crtc_mode_set()
758 REG_READ(LVDS); in cdv_intel_crtc_mode_set()
857 is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN); in cdv_intel_crtc_clock_get()

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