xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/renesas/r8a774c0-ek874-idk-2121wr.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree Source for the Silicon Linux RZ/G2E evaluation kit (EK874),
4*4882a593Smuzhiyun * connected to an Advantech IDK-2121WR 21.5" LVDS panel
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2019 Renesas Electronics Corp.
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun#include "r8a774c0-ek874.dts"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	backlight: backlight {
13*4882a593Smuzhiyun		compatible = "pwm-backlight";
14*4882a593Smuzhiyun		pwms = <&pwm5 0 50000>;
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun		brightness-levels = <0 4 8 16 32 64 128 255>;
17*4882a593Smuzhiyun		default-brightness-level = <6>;
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun		power-supply = <&reg_12p0v>;
20*4882a593Smuzhiyun		enable-gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
21*4882a593Smuzhiyun	};
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun	panel-lvds {
24*4882a593Smuzhiyun		compatible = "advantech,idk-2121wr", "panel-lvds";
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun		width-mm = <476>;
27*4882a593Smuzhiyun		height-mm = <268>;
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun		data-mapping = "vesa-24";
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun		panel-timing {
32*4882a593Smuzhiyun			clock-frequency = <148500000>;
33*4882a593Smuzhiyun			hactive = <1920>;
34*4882a593Smuzhiyun			vactive = <1080>;
35*4882a593Smuzhiyun			hsync-len = <44>;
36*4882a593Smuzhiyun			hfront-porch = <88>;
37*4882a593Smuzhiyun			hback-porch = <148>;
38*4882a593Smuzhiyun			vfront-porch = <4>;
39*4882a593Smuzhiyun			vback-porch = <36>;
40*4882a593Smuzhiyun			vsync-len = <5>;
41*4882a593Smuzhiyun		};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun		ports {
44*4882a593Smuzhiyun			#address-cells = <1>;
45*4882a593Smuzhiyun			#size-cells = <0>;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun			port@0 {
48*4882a593Smuzhiyun				reg = <0>;
49*4882a593Smuzhiyun				dual-lvds-odd-pixels;
50*4882a593Smuzhiyun				panel_in0: endpoint {
51*4882a593Smuzhiyun					remote-endpoint = <&lvds0_out>;
52*4882a593Smuzhiyun				};
53*4882a593Smuzhiyun			};
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun			port@1 {
56*4882a593Smuzhiyun				reg = <1>;
57*4882a593Smuzhiyun				dual-lvds-even-pixels;
58*4882a593Smuzhiyun				panel_in1: endpoint {
59*4882a593Smuzhiyun					remote-endpoint = <&lvds1_out>;
60*4882a593Smuzhiyun				};
61*4882a593Smuzhiyun			};
62*4882a593Smuzhiyun		};
63*4882a593Smuzhiyun	};
64*4882a593Smuzhiyun};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun&gpio0 {
67*4882a593Smuzhiyun	/*
68*4882a593Smuzhiyun	 * When GP0_17 is low LVDS[01] are connected to the LVDS connector
69*4882a593Smuzhiyun	 * When GP0_17 is high LVDS[01] are connected to the LT8918L
70*4882a593Smuzhiyun	 */
71*4882a593Smuzhiyun	lvds-connector-en-gpio{
72*4882a593Smuzhiyun		gpio-hog;
73*4882a593Smuzhiyun		gpios = <17 GPIO_ACTIVE_HIGH>;
74*4882a593Smuzhiyun		output-low;
75*4882a593Smuzhiyun		line-name = "lvds-connector-en-gpio";
76*4882a593Smuzhiyun	};
77*4882a593Smuzhiyun};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun&lvds0 {
80*4882a593Smuzhiyun	ports {
81*4882a593Smuzhiyun		port@1 {
82*4882a593Smuzhiyun			lvds0_out: endpoint {
83*4882a593Smuzhiyun				remote-endpoint = <&panel_in0>;
84*4882a593Smuzhiyun			};
85*4882a593Smuzhiyun		};
86*4882a593Smuzhiyun	};
87*4882a593Smuzhiyun};
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun&lvds1 {
90*4882a593Smuzhiyun	status = "okay";
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun	clocks = <&cpg CPG_MOD 727>, <&x13_clk>, <&extal_clk>;
93*4882a593Smuzhiyun	clock-names = "fck", "dclkin.0", "extal";
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun	ports {
96*4882a593Smuzhiyun		port@1 {
97*4882a593Smuzhiyun			lvds1_out: endpoint {
98*4882a593Smuzhiyun				remote-endpoint = <&panel_in1>;
99*4882a593Smuzhiyun			};
100*4882a593Smuzhiyun		};
101*4882a593Smuzhiyun	};
102*4882a593Smuzhiyun};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun&pfc {
105*4882a593Smuzhiyun	pwm5_pins: pwm5 {
106*4882a593Smuzhiyun		groups = "pwm5_a";
107*4882a593Smuzhiyun		function = "pwm5";
108*4882a593Smuzhiyun	};
109*4882a593Smuzhiyun};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun&pwm5 {
112*4882a593Smuzhiyun	pinctrl-0 = <&pwm5_pins>;
113*4882a593Smuzhiyun	pinctrl-names = "default";
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun	status = "okay";
116*4882a593Smuzhiyun};
117