1*4882a593SmuzhiyunDrivers for the second video output of the GE B850v3: 2*4882a593Smuzhiyun STDP4028-ge-b850v3-fw bridges (LVDS-DP) 3*4882a593Smuzhiyun STDP2690-ge-b850v3-fw bridges (DP-DP++) 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunThe video processing pipeline on the second output on the GE B850v3: 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunEach bridge has a dedicated flash containing firmware for supporting the custom 10*4882a593Smuzhiyundesign. The result is that, in this design, neither the STDP4028 nor the 11*4882a593SmuzhiyunSTDP2690 behave as the stock bridges would. The compatible strings include the 12*4882a593Smuzhiyunsuffix "-ge-b850v3-fw" to make it clear that the driver is for the bridges with 13*4882a593Smuzhiyunthe firmware specific for the GE B850v3. 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunThe hardware do not provide control over the video processing pipeline, as the 16*4882a593Smuzhiyuntwo bridges behaves as a single one. The only interfaces exposed by the 17*4882a593Smuzhiyunhardware are EDID, HPD, and interrupts. 18*4882a593Smuzhiyun 19*4882a593Smuzhiyunstdp4028-ge-b850v3-fw required properties: 20*4882a593Smuzhiyun - compatible : "megachips,stdp4028-ge-b850v3-fw" 21*4882a593Smuzhiyun - reg : I2C bus address 22*4882a593Smuzhiyun - interrupts : one interrupt should be described here, as in 23*4882a593Smuzhiyun <0 IRQ_TYPE_LEVEL_HIGH> 24*4882a593Smuzhiyun - ports : One input port(reg = <0>) and one output port(reg = <1>) 25*4882a593Smuzhiyun 26*4882a593Smuzhiyunstdp2690-ge-b850v3-fw required properties: 27*4882a593Smuzhiyun compatible : "megachips,stdp2690-ge-b850v3-fw" 28*4882a593Smuzhiyun - reg : I2C bus address 29*4882a593Smuzhiyun - ports : One input port(reg = <0>) and one output port(reg = <1>) 30*4882a593Smuzhiyun 31*4882a593SmuzhiyunExample: 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun&mux2_i2c2 { 34*4882a593Smuzhiyun clock-frequency = <100000>; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun stdp4028@73 { 37*4882a593Smuzhiyun compatible = "megachips,stdp4028-ge-b850v3-fw"; 38*4882a593Smuzhiyun #address-cells = <1>; 39*4882a593Smuzhiyun #size-cells = <0>; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun reg = <0x73>; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun interrupt-parent = <&gpio2>; 44*4882a593Smuzhiyun interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun ports { 47*4882a593Smuzhiyun #address-cells = <1>; 48*4882a593Smuzhiyun #size-cells = <0>; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun port@0 { 51*4882a593Smuzhiyun reg = <0>; 52*4882a593Smuzhiyun stdp4028_in: endpoint { 53*4882a593Smuzhiyun remote-endpoint = <&lvds0_out>; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun port@1 { 57*4882a593Smuzhiyun reg = <1>; 58*4882a593Smuzhiyun stdp4028_out: endpoint { 59*4882a593Smuzhiyun remote-endpoint = <&stdp2690_in>; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun stdp2690@72 { 66*4882a593Smuzhiyun compatible = "megachips,stdp2690-ge-b850v3-fw"; 67*4882a593Smuzhiyun #address-cells = <1>; 68*4882a593Smuzhiyun #size-cells = <0>; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun reg = <0x72>; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun ports { 73*4882a593Smuzhiyun #address-cells = <1>; 74*4882a593Smuzhiyun #size-cells = <0>; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun port@0 { 77*4882a593Smuzhiyun reg = <0>; 78*4882a593Smuzhiyun stdp2690_in: endpoint { 79*4882a593Smuzhiyun remote-endpoint = <&stdp4028_out>; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun port@1 { 84*4882a593Smuzhiyun reg = <1>; 85*4882a593Smuzhiyun stdp2690_out: endpoint { 86*4882a593Smuzhiyun /* Connector for external display */ 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun}; 92