Home
last modified time | relevance | path

Searched refs:CRU_BASE (Results 1 – 10 of 10) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rv1126/
H A Drv1126.c69 #define CRU_BASE 0xFF490000 macro
591 writel(0x00ff0055, CRU_BASE + CRU_CLKSEL_CON65); in arch_cpu_init()
592 writel(0x00ff0055, CRU_BASE + CRU_CLKSEL_CON67); in arch_cpu_init()
609 writel(0x00ff0003, CRU_BASE + CRU_CLKSEL_CON02); in arch_cpu_init()
610 writel(0x00ff0005, CRU_BASE + CRU_CLKSEL_CON03); in arch_cpu_init()
611 writel(0xffff8383, CRU_BASE + CRU_CLKSEL_CON27); in arch_cpu_init()
612 writel(0x00ff0083, CRU_BASE + CRU_CLKSEL_CON31); in arch_cpu_init()
613 writel(0x00ff0083, CRU_BASE + CRU_CLKSEL_CON33); in arch_cpu_init()
614 writel(0xffff4385, CRU_BASE + CRU_CLKSEL_CON40); in arch_cpu_init()
615 writel(0x00ff0043, CRU_BASE + CRU_CLKSEL_CON49); in arch_cpu_init()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rv1106/
H A Drv1106.c102 #define CRU_BASE 0xff3b0000 macro
447 writel(0x400040, CRU_BASE + CRU_GLB_RST_CON); in arch_cpu_init()
457 writel(0xffff0018, CRU_BASE + CRU_PVTPLL0_CON1_L); in arch_cpu_init()
458 writel(0x00030003, CRU_BASE + CRU_PVTPLL0_CON0_L); in arch_cpu_init()
459 writel(0xffff0018, CRU_BASE + CRU_PVTPLL1_CON1_L); in arch_cpu_init()
460 writel(0x00030003, CRU_BASE + CRU_PVTPLL1_CON0_L); in arch_cpu_init()
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/
H A Dspl_pcie_ep_boot.c506 #define CRU_BASE 0xFDD20000 macro
507 #define CRU_GATE_CON12 (CRU_BASE + 0x330)
508 #define CRU_GATE_CON13 (CRU_BASE + 0x334)
509 #define CRU_GATE_CON33 (CRU_BASE + 0x384)
510 #define CRU_SOFTRST_CON12 (CRU_BASE + 0x430)
511 #define CRU_SOFTRST_CON27 (CRU_BASE + 0x46c)
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3328/
H A Drk3328.c17 #define CRU_BASE 0xFF440000 macro
95 writel((3 << (8 + 16)) | (2 << 8), CRU_BASE + 0x148); in board_debug_uart_init()
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3568/
H A Drk3568.c41 #define CRU_BASE 0xfdd20000 macro
784 writel(0x04000400, CRU_BASE + CRU_SOFTRST_CON26); in fit_standalone_release()
792 writel(0x04000000, CRU_BASE + CRU_SOFTRST_CON26); in fit_standalone_release()
888 writel(0x02a002a0, CRU_BASE + CRU_SOFTRST_CON28); in arch_cpu_init()
956 writel(0x04000400, CRU_BASE + CRU_SOFTRST_CON26); in spl_fit_standalone_release()
962 writel(0x04000000, CRU_BASE + CRU_SOFTRST_CON26); in spl_fit_standalone_release()
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3308/
H A Drk3308.c50 #define CRU_BASE 0xff500000 macro
207 static struct rk3308_cru * const cru = (void *)CRU_BASE; in arch_cpu_init()
290 static struct rk3308_cru * const cru = (void *)CRU_BASE; in board_debug_uart_init()
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/px30/
H A Dpx30.c59 #define CRU_BASE 0xff2b0000 macro
269 #define CRU_BASE 0xff2b0000 macro
273 static struct px30_cru * const cru = (void *)CRU_BASE; in board_debug_uart_init()
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3588/
H A Drk3588.c79 #define CRU_BASE 0xfd7c0000 macro
926 writel(0x01c001c0, CRU_BASE + CRU_SOFTRST_CON77); in arch_cpu_init()
1284 writel(0x00f00042, CRU_BASE + CRU_GPLL_CON1); in spl_fit_standalone_release()
1307 writel(0x08400840, CRU_BASE + CRU_GLB_RST_CON); in spl_fit_standalone_release()
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rk3036/
H A Dsdram_rk3036.c20 #define CRU_BASE 0x20000000 macro
745 sdram_priv.cru = (void *)CRU_BASE; in sdram_init()
/OK3568_Linux_fs/u-boot/drivers/ram/rockchip/
H A Dsdram_rk3308.c27 #define CRU_BASE 0xff500000 macro
859 sdram_priv.cru = (void *)CRU_BASE; in sdram_init()