Searched refs:CLK_TOP_APLL12_DIV5 (Results 1 – 5 of 5) sorted by relevance
| /OK3568_Linux_fs/kernel/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 157 #define CLK_TOP_APLL12_DIV5 125 macro
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| H A D | mt6779-clk.h | 144 #define CLK_TOP_APLL12_DIV5 134 macro
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| /OK3568_Linux_fs/kernel/drivers/clk/mediatek/ |
| H A D | clk-mt8516.c | 672 GATE_TOP5(CLK_TOP_APLL12_DIV5, "apll12_div5", "apll12_ck_div5", 6),
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| H A D | clk-mt8167.c | 918 GATE_TOP5(CLK_TOP_APLL12_DIV5, "apll12_div5", "apll12_ck_div5", 6),
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| H A D | clk-mt6779.c | 839 DIV_GATE(CLK_TOP_APLL12_DIV5, "apll12_div5", "i2s5_m_ck_sel",
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