Searched refs:CLK_PCIEPHY1_REF (Results 1 – 6 of 6) sorted by relevance
47 #define CLK_PCIEPHY1_REF 34 macro
127 assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>;
3484 clocks = <&pmucru CLK_PCIEPHY1_REF>, <&cru PCLK_PIPEPHY1>,3487 assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>;
1580 MUX(CLK_PCIEPHY1_REF, "clk_pciephy1_ref", clk_pciephy1_ref_p, CLK_SET_RATE_PARENT,
2651 clocks = <&pmucru CLK_PCIEPHY1_REF>, <&cru PCLK_PIPEPHY1>;2653 assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>;