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/rk3399_rockchip-uboot/drivers/pinctrl/rockchip/
H A Dpinctrl-rk3506.c194 int reg, ret, i; in rk3506_set_drive() local
203 for (i = 0, ret = 1; i < strength; i++) in rk3506_set_drive()
/rk3399_rockchip-uboot/drivers/rng/
H A Drockchip_rng.c332 unsigned int i; in rockchip_rng_read() local
343 for (i = 0; i < len / RK_HW_RNG_MAX; i++, buf += RK_HW_RNG_MAX) { in rockchip_rng_read()
/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3308.c565 u32 i, div, best_div = 0, best_sel = 0; in rk3308_vop_set_clk() local
567 for (i = 0; i <= DCLK_VOP_PLL_SEL_VPLL1; i++) { in rk3308_vop_set_clk()
568 switch (i) { in rk3308_vop_set_clk()
590 best_sel = i; in rk3308_vop_set_clk()
1404 int i, ret; in soc_clk_dump() local
1421 for (i = 0; i < clk_count; i++) { in soc_clk_dump()
1422 clk_dump = &clks_dump[i]; in soc_clk_dump()
1431 if (i == 0) { in soc_clk_dump()
H A Dclk_rk3066.c649 int i, ret; in soc_clk_dump() local
666 for (i = 0; i < clk_count; i++) { in soc_clk_dump()
667 clk_dump = &clks_dump[i]; in soc_clk_dump()
677 if (i == 0) { in soc_clk_dump()
H A Dclk_px30.c176 int i; in get_pll_settings() local
178 for (i = 0; i < rate_count; i++) { in get_pll_settings()
179 if (rate == px30_pll_rates[i].rate) in get_pll_settings()
180 return &px30_pll_rates[i]; in get_pll_settings()
189 int i; in get_cpu_settings() local
191 for (i = 0; i < rate_count; i++) { in get_cpu_settings()
192 if (rate == px30_cpu_rates[i].rate) in get_cpu_settings()
193 return &px30_cpu_rates[i]; in get_cpu_settings()
1991 int i, ret; in soc_clk_dump() local
2016 for (i = 0; i < clk_count; i++) { in soc_clk_dump()
[all …]
H A Dclk_rk3036.c651 int i, ret; in soc_clk_dump() local
668 for (i = 0; i < clk_count; i++) { in soc_clk_dump()
669 clk_dump = &clks_dump[i]; in soc_clk_dump()
679 if (i == 0) { in soc_clk_dump()
/rk3399_rockchip-uboot/scripts/dtc/libfdt/
H A Dfdt_overlay.c229 int i; in overlay_update_local_node_references() local
247 for (i = 0; i < (fixup_len / sizeof(uint32_t)); i++) { in overlay_update_local_node_references()
251 poffset = fdt32_to_cpu(fixup_val[i]); in overlay_update_local_node_references()
/rk3399_rockchip-uboot/lib/efi_loader/
H A Defi_device_path.c130 int i; in find_obj() local
132 for (i = 0; i < ARRAY_SIZE(efiobj->protocols); i++) { in find_obj()
133 struct efi_handler *handler = &efiobj->protocols[i]; in find_obj()
/rk3399_rockchip-uboot/drivers/mtd/spi/
H A Dspi-nor-tiny.c166 size_t i; in spi_nor_convert_opcode() local
168 for (i = 0; i < size; i++) in spi_nor_convert_opcode()
169 if (table[i][0] == opcode) in spi_nor_convert_opcode()
170 return table[i][1]; in spi_nor_convert_opcode()
/rk3399_rockchip-uboot/arch/arm/mach-imx/mx6/
H A DKconfig172 bool "Logic PD i.MX6 SOM"
188 bool "Support Engicam i.Core"
203 bool "Support Engicam i.Core RQS"
329 bool "Grinn liteBoard (i.MX6UL)"
342 bool "Phytec PCM058 i.MX6 Quad"
347 bool "Phytec PFLA02 (PhyFlex) i.MX6 Quad"
/rk3399_rockchip-uboot/drivers/mtd/ubi/
H A Dkapi.c243 int i, vol_id = -1, len; in ubi_open_volume_nm() local
265 for (i = 0; i < ubi->vtbl_slots; i++) { in ubi_open_volume_nm()
266 struct ubi_volume *vol = ubi->volumes[i]; in ubi_open_volume_nm()
269 vol_id = i; in ubi_open_volume_nm()
/rk3399_rockchip-uboot/drivers/pci/
H A Dpcie_layerscape.c122 int i; in ls_pcie_dump_atu() local
124 for (i = 0; i < PCIE_ATU_REGION_NUM; i++) { in ls_pcie_dump_atu()
125 dbi_writel(pcie, PCIE_ATU_REGION_OUTBOUND | i, in ls_pcie_dump_atu()
127 debug("iATU%d:\n", i); in ls_pcie_dump_atu()
/rk3399_rockchip-uboot/drivers/core/
H A Duclass.c169 int i; in uclass_get_by_name() local
171 for (i = 0; i < UCLASS_COUNT; i++) { in uclass_get_by_name()
172 struct uclass_driver *uc_drv = lists_uclass_lookup(i); in uclass_get_by_name()
175 return i; in uclass_get_by_name()
/rk3399_rockchip-uboot/fs/fat/
H A Dfat.c462 int i; in mkcksum() local
466 for (i = 0; i < 8; i++) in mkcksum()
467 ret = (((ret & 1) << 7) | ((ret & 0xfe) >> 1)) + name[i]; in mkcksum()
468 for (i = 0; i < 3; i++) in mkcksum()
469 ret = (((ret & 1) << 7) | ((ret & 0xfe) >> 1)) + ext[i]; in mkcksum()
/rk3399_rockchip-uboot/board/sbc8641d/
H A DREADME45 f) get new image, i.e. "tftp 200000 /somepath/u-boot.bin"
48 i) ensure new image is written: "md fff00000"
/rk3399_rockchip-uboot/doc/
H A DREADME.fuse7 (i.e. blown, set to 1) only once. The programming operation is irreversible. A
33 Sense - i.e. read directly from the fusebox, skipping the shadow cache -
45 Only the bits to be programmed should be set in the input value (i.e. for
/rk3399_rockchip-uboot/board/renesas/koelsch/
H A Dqos.c122 int i; in qos_init() local
252 for (i = DBSC3_00; i < DBSC3_NR; i++) { in qos_init()
253 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i]; in qos_init()
267 for (i = DBSC3_00; i < DBSC3_NR; i++) { in qos_init()
268 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i]; in qos_init()
282 for (i = DBSC3_00; i < DBSC3_NR; i++) { in qos_init()
283 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_1_r_qos_addr[i]; in qos_init()
297 for (i = DBSC3_00; i < DBSC3_NR; i++) { in qos_init()
298 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_1_w_qos_addr[i]; in qos_init()
/rk3399_rockchip-uboot/board/renesas/porter/
H A Dqos.c105 int i; in qos_init() local
182 for (i = DBSC3_00; i < DBSC3_NR; i++) { in qos_init()
183 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i]; in qos_init()
197 for (i = DBSC3_00; i < DBSC3_NR; i++) { in qos_init()
198 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i]; in qos_init()
212 for (i = DBSC3_00; i < DBSC3_NR; i++) { in qos_init()
213 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_1_r_qos_addr[i]; in qos_init()
227 for (i = DBSC3_00; i < DBSC3_NR; i++) { in qos_init()
228 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_1_w_qos_addr[i]; in qos_init()
/rk3399_rockchip-uboot/drivers/video/drm/
H A Drockchip_display.c189 int i = 0, offset = -1; in rockchip_get_disp_info() local
194 for (i = 0; i < 8; i++) { in rockchip_get_disp_info()
195 disp_header = &base_parameter.disp_header[i]; in rockchip_get_disp_info()
198 printf("disp info %d, type:%d, id:%d\n", i, type, id); in rockchip_get_disp_info()
1404 int i, j; in rockchip_logo_rotate() local
1429 for (i = 0; i < height; i++) { in rockchip_logo_rotate()
1432 (height - i - 1) * bytes_per_pixel, in rockchip_logo_rotate()
1433 img_data + i * width * bytes_per_pixel + j * bytes_per_pixel, in rockchip_logo_rotate()
1439 for (i = 0; i < height; i++) { in rockchip_logo_rotate()
1441 memcpy(dst_rotate + (height - i - 1) * width * bytes_per_pixel + in rockchip_logo_rotate()
[all …]
/rk3399_rockchip-uboot/common/
H A Ddlmalloc.c517 #define bin_at(i) ((mbinptr)((char*)&(av_[2*(i) + 2]) - 2*SIZE_SZ)) argument
542 #define IAV(i) bin_at(i), bin_at(i) argument
568 size_t i; in malloc_bin_reloc() local
570 for (i = 2; i < ARRAY_SIZE(av_); ++i, ++p) in malloc_bin_reloc()
2255 int i; in malloc_update_mallinfo() local
2265 for (i = 1; i < NAV; ++i) in malloc_update_mallinfo()
2267 b = bin_at(i); in malloc_update_mallinfo()
H A Dimage-android.c395 int i; in print_hash() local
398 for (i = 0; i < len; i++) in print_hash()
399 printf("%02x", hash[i]); in print_hash()
745 int i; in android_image_separate() local
748 for (i = 0; i < 5; i++) in android_image_separate()
749 printf("%02x", hash[i]); in android_image_separate()
/rk3399_rockchip-uboot/arch/x86/cpu/qemu/
H A DKconfig31 ACPI Power Managment 1 (PM1) i/o-mapped base address.
/rk3399_rockchip-uboot/disk/
H A Dpart_env.c137 int i = 0; in part_print_env() local
151 printf("%3d\t0x%08lx\t0x%08lx\t%s\n", (i++ + 1), in part_print_env()
/rk3399_rockchip-uboot/common/spl/
H A Dspl_decomp.c90 uint8_t c, i = 8; in put_hex() local
93 while (i--) { in put_hex()
/rk3399_rockchip-uboot/board/freescale/mx6sabreauto/
H A Dmx6sabreauto.c1100 int i; in ddr_init() local
1102 for (i = 0; i < size / 2 ; i++) in ddr_init()
1103 writel(table[2 * i + 1], table[2 * i]); in ddr_init()

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