| /rk3399_rockchip-uboot/include/configs/ |
| H A D | rk3066_common.h | 839aff5094fc47c8983fc7ba5f95f8b1d27bc598 Thu Mar 29 08:21:40 UTC 2018 Kever Yang <kever.yang@rock-chips.com> rockchip: update and move CONFIG_NR_DRAM_BANKS to common header
Most of SoCs have 2 banks after we enable OP-TEE,
for those still only have 1 bank soc, it's OK to use 2 bank
for the other one have size 0 if not used.
Change-Id: Ifa0ee3e12960794c71398636e525ef853eae7870
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
| H A D | rv1108_common.h | 839aff5094fc47c8983fc7ba5f95f8b1d27bc598 Thu Mar 29 08:21:40 UTC 2018 Kever Yang <kever.yang@rock-chips.com> rockchip: update and move CONFIG_NR_DRAM_BANKS to common header
Most of SoCs have 2 banks after we enable OP-TEE,
for those still only have 1 bank soc, it's OK to use 2 bank
for the other one have size 0 if not used.
Change-Id: Ifa0ee3e12960794c71398636e525ef853eae7870
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
| H A D | rk3128_common.h | 839aff5094fc47c8983fc7ba5f95f8b1d27bc598 Thu Mar 29 08:21:40 UTC 2018 Kever Yang <kever.yang@rock-chips.com> rockchip: update and move CONFIG_NR_DRAM_BANKS to common header
Most of SoCs have 2 banks after we enable OP-TEE,
for those still only have 1 bank soc, it's OK to use 2 bank
for the other one have size 0 if not used.
Change-Id: Ifa0ee3e12960794c71398636e525ef853eae7870
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
| H A D | px30_common.h | 839aff5094fc47c8983fc7ba5f95f8b1d27bc598 Thu Mar 29 08:21:40 UTC 2018 Kever Yang <kever.yang@rock-chips.com> rockchip: update and move CONFIG_NR_DRAM_BANKS to common header
Most of SoCs have 2 banks after we enable OP-TEE,
for those still only have 1 bank soc, it's OK to use 2 bank
for the other one have size 0 if not used.
Change-Id: Ifa0ee3e12960794c71398636e525ef853eae7870
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
| H A D | rk3308_common.h | 839aff5094fc47c8983fc7ba5f95f8b1d27bc598 Thu Mar 29 08:21:40 UTC 2018 Kever Yang <kever.yang@rock-chips.com> rockchip: update and move CONFIG_NR_DRAM_BANKS to common header
Most of SoCs have 2 banks after we enable OP-TEE,
for those still only have 1 bank soc, it's OK to use 2 bank
for the other one have size 0 if not used.
Change-Id: Ifa0ee3e12960794c71398636e525ef853eae7870
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
| H A D | rk322x_common.h | 839aff5094fc47c8983fc7ba5f95f8b1d27bc598 Thu Mar 29 08:21:40 UTC 2018 Kever Yang <kever.yang@rock-chips.com> rockchip: update and move CONFIG_NR_DRAM_BANKS to common header
Most of SoCs have 2 banks after we enable OP-TEE,
for those still only have 1 bank soc, it's OK to use 2 bank
for the other one have size 0 if not used.
Change-Id: Ifa0ee3e12960794c71398636e525ef853eae7870
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
| H A D | rk3368_common.h | 839aff5094fc47c8983fc7ba5f95f8b1d27bc598 Thu Mar 29 08:21:40 UTC 2018 Kever Yang <kever.yang@rock-chips.com> rockchip: update and move CONFIG_NR_DRAM_BANKS to common header
Most of SoCs have 2 banks after we enable OP-TEE,
for those still only have 1 bank soc, it's OK to use 2 bank
for the other one have size 0 if not used.
Change-Id: Ifa0ee3e12960794c71398636e525ef853eae7870
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
| H A D | rk3188_common.h | 839aff5094fc47c8983fc7ba5f95f8b1d27bc598 Thu Mar 29 08:21:40 UTC 2018 Kever Yang <kever.yang@rock-chips.com> rockchip: update and move CONFIG_NR_DRAM_BANKS to common header
Most of SoCs have 2 banks after we enable OP-TEE,
for those still only have 1 bank soc, it's OK to use 2 bank
for the other one have size 0 if not used.
Change-Id: Ifa0ee3e12960794c71398636e525ef853eae7870
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
| H A D | rk3328_common.h | 839aff5094fc47c8983fc7ba5f95f8b1d27bc598 Thu Mar 29 08:21:40 UTC 2018 Kever Yang <kever.yang@rock-chips.com> rockchip: update and move CONFIG_NR_DRAM_BANKS to common header
Most of SoCs have 2 banks after we enable OP-TEE,
for those still only have 1 bank soc, it's OK to use 2 bank
for the other one have size 0 if not used.
Change-Id: Ifa0ee3e12960794c71398636e525ef853eae7870
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
| H A D | rockchip-common.h | 839aff5094fc47c8983fc7ba5f95f8b1d27bc598 Thu Mar 29 08:21:40 UTC 2018 Kever Yang <kever.yang@rock-chips.com> rockchip: update and move CONFIG_NR_DRAM_BANKS to common header
Most of SoCs have 2 banks after we enable OP-TEE,
for those still only have 1 bank soc, it's OK to use 2 bank
for the other one have size 0 if not used.
Change-Id: Ifa0ee3e12960794c71398636e525ef853eae7870
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
| H A D | rk3036_common.h | 839aff5094fc47c8983fc7ba5f95f8b1d27bc598 Thu Mar 29 08:21:40 UTC 2018 Kever Yang <kever.yang@rock-chips.com> rockchip: update and move CONFIG_NR_DRAM_BANKS to common header
Most of SoCs have 2 banks after we enable OP-TEE,
for those still only have 1 bank soc, it's OK to use 2 bank
for the other one have size 0 if not used.
Change-Id: Ifa0ee3e12960794c71398636e525ef853eae7870
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
| H A D | rk3399_common.h | 839aff5094fc47c8983fc7ba5f95f8b1d27bc598 Thu Mar 29 08:21:40 UTC 2018 Kever Yang <kever.yang@rock-chips.com> rockchip: update and move CONFIG_NR_DRAM_BANKS to common header
Most of SoCs have 2 banks after we enable OP-TEE,
for those still only have 1 bank soc, it's OK to use 2 bank
for the other one have size 0 if not used.
Change-Id: Ifa0ee3e12960794c71398636e525ef853eae7870
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
| H A D | rk3288_common.h | 839aff5094fc47c8983fc7ba5f95f8b1d27bc598 Thu Mar 29 08:21:40 UTC 2018 Kever Yang <kever.yang@rock-chips.com> rockchip: update and move CONFIG_NR_DRAM_BANKS to common header
Most of SoCs have 2 banks after we enable OP-TEE,
for those still only have 1 bank soc, it's OK to use 2 bank
for the other one have size 0 if not used.
Change-Id: Ifa0ee3e12960794c71398636e525ef853eae7870
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|