include: rockchip: remove CONFIG_SUPPORT_EMMC_RPMB

The macro is default selected.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I6966779ca63119cd210cd04268f2481ef795fcbf

Merge branch 'next-dev' into thunder-boot

rockchip: update CONFIG_SPL_MAX_SIZE to 0x40000

We are using DRAM offset 0~0x40000 as SPL text size, Note that BSS,
STACK and MALLOC may using separate space.

Change-Id: I1d9128b339140569e427fad44d

rockchip: update CONFIG_SPL_MAX_SIZE to 0x40000

We are using DRAM offset 0~0x40000 as SPL text size, Note that BSS,
STACK and MALLOC may using separate space.

Change-Id: I1d9128b339140569e427fad44dc0a2f3058deaf0
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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configs: rk3368: update malloc size to 32MB

Since AVB use sysmem alloc, we can decrease malloc size.

Change-Id: If88b142a81f5cd28f333b9dc901e70619b9ce12b
Signed-off-by: Joseph Chen <chenjh@rock-chi

configs: rk3368: update malloc size to 32MB

Since AVB use sysmem alloc, we can decrease malloc size.

Change-Id: If88b142a81f5cd28f333b9dc901e70619b9ce12b
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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rockchip: px5: update SPL size for spl/tpl

Change-Id: I447976f9030a59f18393027e8392a065d4c6c425
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

rockchip: rk3368: correct MMU ram map size

Change-Id: I4884a88613fe5c2fa515360d4c754f4eade84ed3
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

configs: rk3368_defconfig: enable avb for rk3368

Change-Id: I5180c70ef3cc4c1a091f1247ef0c4c4ba3800ed7
Signed-off-by: Zorro Liu <lyx@rock-chips.com>

include: rk3368: move fdt addr to 131MB

It avoids fdt overlap with large boot.img/recovery.img, moving
fdt ahead of boot.img/recovery.img is safer.

Change-Id: I182f5b49840d10a53fb026ee3e93cab6da2b4

include: rk3368: move fdt addr to 131MB

It avoids fdt overlap with large boot.img/recovery.img, moving
fdt ahead of boot.img/recovery.img is safer.

Change-Id: I182f5b49840d10a53fb026ee3e93cab6da2b4bb7
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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rk3368: set "kernel_addr_r" as 0x00280000

load kernel as close as possible to the start of system RAM in
order to make full use of memory for kernel.

Change-Id: I199c01bc60dbb3107105e6ea669f64839ea

rk3368: set "kernel_addr_r" as 0x00280000

load kernel as close as possible to the start of system RAM in
order to make full use of memory for kernel.

Change-Id: I199c01bc60dbb3107105e6ea669f64839ead0b80
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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rockchip: rk3368: set init sp address backward

U-Boot max size is default 1MB, so that if init sp starts
from the tail of 1M, it overrides the U-Boot images which
causes a relocation failure.

Chang

rockchip: rk3368: set init sp address backward

U-Boot max size is default 1MB, so that if init sp starts
from the tail of 1M, it overrides the U-Boot images which
causes a relocation failure.

Change-Id: Ib137428bb5fa10ee5b30b79a2623a016ecfc19e3
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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rockchip: rk3368: add evb rk3368 support

Change-Id: Icd49c20a25e19eb66d797e17df5e128d7572fe73
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

rockchip: update and move CONFIG_NR_DRAM_BANKS to common header

Most of SoCs have 2 banks after we enable OP-TEE,
for those still only have 1 bank soc, it's OK to use 2 bank
for the other one have s

rockchip: update and move CONFIG_NR_DRAM_BANKS to common header

Most of SoCs have 2 banks after we enable OP-TEE,
for those still only have 1 bank soc, it's OK to use 2 bank
for the other one have size 0 if not used.

Change-Id: Ifa0ee3e12960794c71398636e525ef853eae7870
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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rockchip: enable SYS_NS16550 for all SoCs by default

All rockchip SoCs can use ns16550 driver, enable it for all
and set SYS_NS16550_MEM32 for all SoCs.

Change-Id: I4be3a801bf5537b94ed0c100cb44f49d

rockchip: enable SYS_NS16550 for all SoCs by default

All rockchip SoCs can use ns16550 driver, enable it for all
and set SYS_NS16550_MEM32 for all SoCs.

Change-Id: I4be3a801bf5537b94ed0c100cb44f49d78b8b15a
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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rockchip: add common MACRO to enable sys arch timer

All rockchip SoCs can use ARM arch timer, let's enable it in
common header file

Change-Id: Ic74024b34c72cfbeffa2288ef2b2375f5f141c2c
Signed-off-b

rockchip: add common MACRO to enable sys arch timer

All rockchip SoCs can use ARM arch timer, let's enable it in
common header file

Change-Id: Ic74024b34c72cfbeffa2288ef2b2375f5f141c2c
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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UPSTREAM: rockchip: configs: use rockchip-common.h for rk3368

rockchip-common.h already defines values that are missing from
rk3368_common.h

For example BOOT_TARGET_DEVICES was defined empty and th

UPSTREAM: rockchip: configs: use rockchip-common.h for rk3368

rockchip-common.h already defines values that are missing from
rk3368_common.h

For example BOOT_TARGET_DEVICES was defined empty and therefore
distroboot had no boot targets.

Change-Id: I1be10032963557894adedef23611ccbaa8b35467
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit e3e842f17cfe0f3f4972c462a4d3ed13ba5eb1ab)

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UPSTREAM: rockchip: rk3368: add ENV_MEM_LAYOUT to extra env settings

Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS

Change-Id: I4ccc38abe53379d429b2060e5b60d62fe4fef9e4
Signed-off-by:

UPSTREAM: rockchip: rk3368: add ENV_MEM_LAYOUT to extra env settings

Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS

Change-Id: I4ccc38abe53379d429b2060e5b60d62fe4fef9e4
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit ffaefb885ee113d12c3ff78109beb43ba1884945)

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usb: gadget: force rockchip vid and pid for rockusb

This change amend USB VID & PID to Rockchip for rockusb.

Change-Id: I3c94e442cc0190d2d3f13424470dd2d84af55eb0
Signed-off-by: Frank Wang <frank.wa

usb: gadget: force rockchip vid and pid for rockusb

This change amend USB VID & PID to Rockchip for rockusb.

Change-Id: I3c94e442cc0190d2d3f13424470dd2d84af55eb0
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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rockchip: add usb mass storage gadget for common functions

The rockusb command implementation depend on USB mass storage gadget,
so enable it for all rockchip common files as default.

Change-Id: I5

rockchip: add usb mass storage gadget for common functions

The rockusb command implementation depend on USB mass storage gadget,
so enable it for all rockchip common files as default.

Change-Id: I5c2cd8aaf44af077b38f70099b1bea033b0a3e34
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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rockchip: rk3368: enable interrupt support

Change-Id: I7031cf89b42b906dcd65c139042815105401ced5
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

include/configs: drop default definitions of CONFIG_SYS_MAXARGS

Now that include/config_fallbacks.h define a sane fallback for
CONFIG_SYS_MAXARGS, we can drop the definition of this constant in all

include/configs: drop default definitions of CONFIG_SYS_MAXARGS

Now that include/config_fallbacks.h define a sane fallback for
CONFIG_SYS_MAXARGS, we can drop the definition of this constant in all
configurations that were using the default value.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

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Merge branch 'master' of git://git.denx.de/u-boot-rockchip

moveconfig: migrate TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE

We can finally drop TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE off the
whitelist (this time it's really happening!) and migrate the setti

moveconfig: migrate TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE

We can finally drop TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE off the
whitelist (this time it's really happening!) and migrate the setting
(only used on the RK3368-uQ7 so far) into Kconfig.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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rockchip: Kconfig: preset TPL_LDSCRIPT via Kconfig for the RK3368

Set TPL_LDSCRIPT in Kconfig, so we don't have to pollute our
header file.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma

rockchip: Kconfig: preset TPL_LDSCRIPT via Kconfig for the RK3368

Set TPL_LDSCRIPT in Kconfig, so we don't have to pollute our
header file.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

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rockchip: rk3368: spl: enable SPL_FRAMEWORK in rk3368_common.h

To build TPL and SPL stages for the RK3368, we will also need to
enable the SPL_FRAMEWORK.

Signed-off-by: Philipp Tomsich <philipp.tom

rockchip: rk3368: spl: enable SPL_FRAMEWORK in rk3368_common.h

To build TPL and SPL stages for the RK3368, we will also need to
enable the SPL_FRAMEWORK.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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rockchip: rk3368: spl: add memory layout for TPL and SPL

For the RK3368, we use a multi-stage boot-process consisting of the
following:
1. TPL: initalises DRAM, returns to boot-ROM (which then lo

rockchip: rk3368: spl: add memory layout for TPL and SPL

For the RK3368, we use a multi-stage boot-process consisting of the
following:
1. TPL: initalises DRAM, returns to boot-ROM (which then loads
the next stage and transfers control to it)
2. SPL: a full-features SPL stage including OF_CONTROL and FIT
image loading, which fetches the ATF, DTB and full U-Boot
and then transfers control to the ATF (using the BL31
parameter block to indicate the location of BL33/U-Boot)
3. ATF: sets up the secure world and exits to BL33 (i.e. a full
U-Boot) in the normal world
4. full U-Boot

TPL/SPL and the full U-Boot are built from this tree and need to
run from distinct text addresses and with distinct initial stack
pointer addresses.

This commit sets up the configuration to run:
- TPL from the SRAM at 0xff8c0000 (note that the first 0x1000
are reserved for use by the boot-ROM and contain the SP
when the TPL is entered)
- SPL from DRAM at 0x0
- U-Boot from DRAM at 0x200000

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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