History log of /rk3399_rockchip-uboot/include/configs/rk3128_common.h (Results 1 – 21 of 21)
Revision Date Author Comments
# 676db551 24-May-2022 Jon Lin <jon.lin@rock-chips.com>

rockchip: rk3128: Support for mtd nand flash

Change-Id: I98dd11d7218e47b503126c9837573349e19bb687
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>


# e20fb212 07-Apr-2021 Jason Zhu <jason.zhu@rock-chips.com>

include: rockchip: remove CONFIG_SUPPORT_EMMC_RPMB

The macro is default selected.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I6966779ca63119cd210cd04268f2481ef795fcbf


# 1490eb89 15-Apr-2018 Adam Ford <aford173@gmail.com>

UPSTREAM: Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the

UPSTREAM: Convert CONFIG_SPI to Kconfig

This converts the following to Kconfig:
CONFIG_SPI

This partly involves updating code that assumes that CONFIG_SPI implies
things that are specific to the MPC8xx SPI driver. For now, just update
the CONFIG tests. This also involves reworking the default for
CONFIG_SYS_DEF_EEPROM_ADDR so that we don't set it when we cannot make a
reasonable default, as it does not cause any compile failures.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
(cherry picked from commit f1b1f77060beadbfe9f42a3be00019bd025afbd6)
Change-Id: Ie9f15ada869105eb407f41d4df7eecbaa916b940
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

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# ebe70719 01-Jul-2019 Jon Lin <jon.lin@rock-chips.com>

UPSTREAM: Convert CONFIG_SF_DEFAULT_* to Kconfig

This converts the following to Kconfig:
CONFIG_SF_DEFAULT_BUS
CONFIG_SF_DEFAULT_CS
CONFIG_SF_DEFAULT_MODE
CONFIG_SF_DEFAULT_SPEED

I use move

UPSTREAM: Convert CONFIG_SF_DEFAULT_* to Kconfig

This converts the following to Kconfig:
CONFIG_SF_DEFAULT_BUS
CONFIG_SF_DEFAULT_CS
CONFIG_SF_DEFAULT_MODE
CONFIG_SF_DEFAULT_SPEED

I use moveconfig script and then manual check on generated u-boot.cfg
to solve the remaining issue.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: I6aaaaf572649fd16925af9eb457ea19423372e60
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 14453fbfadc2f98ca35d6033140466c7a4b4947a)

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# c964ade6 05-Feb-2019 Vignesh R <vigneshr@ti.com>

UPSTREAM: configs: Move CONFIG_SPI_FLASH into defconfigs

Completely move CONFIG_SPI_FLASH from remaining board header files to
defconfigs

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jag

UPSTREAM: configs: Move CONFIG_SPI_FLASH into defconfigs

Completely move CONFIG_SPI_FLASH from remaining board header files to
defconfigs

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Change-Id: Iab125975d8e45a953666dcc04c989da9ae9b7f93
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit ea4805d6b26282451eee9c701a456225bcf7db85)

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# cd2acdbe 14-May-2019 Joseph Chen <chenjh@rock-chips.com>

rockchip: rk3128: add firmware load address for small ram board

- Since avb use sysmem alloc, we can decrease malloc size;
- The typical request is 128M ram board;

Note: trust.img should be placed

rockchip: rk3128: add firmware load address for small ram board

- Since avb use sysmem alloc, we can decrease malloc size;
- The typical request is 128M ram board;

Note: trust.img should be placed in low memory address.

Change-Id: Iba6564710b130d26fdf6b4edfd013b1352216250
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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# e8f1e173 18-Jan-2019 Joseph Chen <chenjh@rock-chips.com>

include: rk3128: move fdt to 131M and ramdisk to 162M

It avoids fdt overlap with large boot.img/recovery.img, moving
fdt ahead of boot.img/recovery.img and moving ramdisk backward
is safer.

Change-

include: rk3128: move fdt to 131M and ramdisk to 162M

It avoids fdt overlap with large boot.img/recovery.img, moving
fdt ahead of boot.img/recovery.img and moving ramdisk backward
is safer.

Change-Id: I229d5a996c445c1f956e51f0b35e43aa48cbcd1c
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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# b7ecfec6 25-Oct-2018 Kever Yang <kever.yang@rock-chips.com>

rockchip: update kernel default load address

The 32bit arm kernel load address should be end with 0x8000 for
non-compress Image.
The compress zImage is fine for different address because the
decompo

rockchip: update kernel default load address

The 32bit arm kernel load address should be end with 0x8000 for
non-compress Image.
The compress zImage is fine for different address because the
decomporess program will copy the Image to address end with 0x8000.

Change-Id: I26fc58f06324fd93dbaeeb39a0b81c81fde0fef5
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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# 3680acb5 11-Sep-2018 Hao Xiaowei <hxw@rock-chips.com>

configs: rk3126 rockchip: rk3128: enable avb for Android P

Change-Id: I94ff27757b59343dac38d938f45c3b5b0fff6557
Signed-off-by: Hao Xiaowei <hxw@rock-chips.com>


# e2bd44da 10-Sep-2018 Joseph Chen <chenjh@rock-chips.com>

rockchip: rk3128: fix U-Boot code override by init sp

U-Boot max size is default 1MB, so that if init sp starts
from the tail of 1M, it overrides the U-Boot images which
causes a relocation failure.

rockchip: rk3128: fix U-Boot code override by init sp

U-Boot max size is default 1MB, so that if init sp starts
from the tail of 1M, it overrides the U-Boot images which
causes a relocation failure.

Change-Id: I5a92fd069a63ca6ce78ac680b335a6ac6767ac02
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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# 31c3ca32 09-May-2018 Kever Yang <kever.yang@rock-chips.com>

rockchip: config: add RKIMG_DET_BOOTDEV in soc headers

Change-Id: Ibf535e9b40b019888bdf8af1a660f8453d19db7d
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 839aff50 29-Mar-2018 Kever Yang <kever.yang@rock-chips.com>

rockchip: update and move CONFIG_NR_DRAM_BANKS to common header

Most of SoCs have 2 banks after we enable OP-TEE,
for those still only have 1 bank soc, it's OK to use 2 bank
for the other one have s

rockchip: update and move CONFIG_NR_DRAM_BANKS to common header

Most of SoCs have 2 banks after we enable OP-TEE,
for those still only have 1 bank soc, it's OK to use 2 bank
for the other one have size 0 if not used.

Change-Id: Ifa0ee3e12960794c71398636e525ef853eae7870
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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# 0f04a903 20-Jan-2018 Kever Yang <kever.yang@rock-chips.com>

rockchip: rk3128: remove rockchip timer as systimer

We use ARM arch timer instead.

Change-Id: I4368b30eab5ae61c9dd7a9165859504607fbbfe3
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>


# 60b9259c 20-Jan-2018 Kever Yang <kever.yang@rock-chips.com>

rockchip: enable SYS_NS16550 for all SoCs by default

All rockchip SoCs can use ns16550 driver, enable it for all
and set SYS_NS16550_MEM32 for all SoCs.

Change-Id: I4be3a801bf5537b94ed0c100cb44f49d

rockchip: enable SYS_NS16550 for all SoCs by default

All rockchip SoCs can use ns16550 driver, enable it for all
and set SYS_NS16550_MEM32 for all SoCs.

Change-Id: I4be3a801bf5537b94ed0c100cb44f49d78b8b15a
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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# ba437c8c 13-Nov-2017 Frank Wang <frank.wang@rock-chips.com>

usb: gadget: force rockchip vid and pid for rockusb

This change amend USB VID & PID to Rockchip for rockusb.

Change-Id: I3c94e442cc0190d2d3f13424470dd2d84af55eb0
Signed-off-by: Frank Wang <frank.wa

usb: gadget: force rockchip vid and pid for rockusb

This change amend USB VID & PID to Rockchip for rockusb.

Change-Id: I3c94e442cc0190d2d3f13424470dd2d84af55eb0
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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# f21199c1 09-Nov-2017 Joseph Chen <chenjh@rock-chips.com>

include: rk3128_common: enable preboot command

Change-Id: Iedf21914fd85ba8d817b7c6fe4cf0920453407fc
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>


# 5c0bf219 31-Oct-2017 Kever Yang <kever.yang@rock-chips.com>

rockchip: config: use common CONFIG_ENV_SIZE for all SoCs

All Rockchip SoCs use 32KB as CONFIG_ENV_SIZE.

Change-Id: I4e7bb94be70ece871fa339feb90a591f889e833d
Signed-off-by: Kever Yang <kever.yang@r

rockchip: config: use common CONFIG_ENV_SIZE for all SoCs

All Rockchip SoCs use 32KB as CONFIG_ENV_SIZE.

Change-Id: I4e7bb94be70ece871fa339feb90a591f889e833d
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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# 2578e62a 16-Oct-2017 Frank Wang <frank.wang@rock-chips.com>

configs: rockchip: enable ehci/ohci support for evb-rk3126

This change enables usb ehci/ohci support for evb-rk3126 and configure
max number ports of the root hub for ohci driver.

Change-Id: Ic4896

configs: rockchip: enable ehci/ohci support for evb-rk3126

This change enables usb ehci/ohci support for evb-rk3126 and configure
max number ports of the root hub for ohci driver.

Change-Id: Ic48964c00400b00f3602f009ce32b3cc9fcb8fa0
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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# 13137280 19-Oct-2017 Mark Yao <mark.yao@rock-chips.com>

rockchip: rk3128: add display relate configs

Change-Id: I45fcdde06e2a66ef8ef6de6bbb1cb5ab154b01b5
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>


# f3d84b4a 16-Oct-2017 Joseph Chen <chenjh@rock-chips.com>

rockchip: rk3128: enable GICv2 irq support

Change-Id: I5bfffa770ca04d7077031cd25345f93d58ba5c6e
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>


# 6a13bde3 10-Mar-2017 Kever Yang <kever.yang@rock-chips.com>

rockchip: rk3128: add soc basic support

RK3128 is a SoC from Rockchip with quad-core Cortex-A7 CPU
and mali400 GPU. Support Nand flash, eMMC, SD card, USB 2.0 host
and device, HDMI/LVDS/MIPI display

rockchip: rk3128: add soc basic support

RK3128 is a SoC from Rockchip with quad-core Cortex-A7 CPU
and mali400 GPU. Support Nand flash, eMMC, SD card, USB 2.0 host
and device, HDMI/LVDS/MIPI display.

Change-Id: I8b1ded3cadddd7fb3aa6df6eebd882f6cb0c994b
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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