Searched +full:stm32 +full:- +full:pwm (Results 1 – 25 of 28) sorted by relevance
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2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>4 * This file is dual-licensed: you can use it either under the terms43 #include "armv7-m.dtsi"44 #include <dt-bindings/clock/stm32fx-clock.h>45 #include <dt-bindings/mfd/stm32f7-rcc.h>48 #address-cells = <1>;49 #size-cells = <1>;52 clk_hse: clk-hse {53 #clock-cells = <0>;54 compatible = "fixed-clock";[all …]
2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>4 * This file is dual-licensed: you can use it either under the terms22 * MA 02110-1301 USA48 #include "armv7-m.dtsi"49 #include <dt-bindings/clock/stm32fx-clock.h>50 #include <dt-bindings/mfd/stm32f4-rcc.h>53 #address-cells = <1>;54 #size-cells = <1>;57 clk_hse: clk-hse {58 #clock-cells = <0>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved6 #include <dt-bindings/interrupt-controller/arm-gic.h>7 #include <dt-bindings/clock/stm32mp1-clks.h>8 #include <dt-bindings/reset/stm32mp1-resets.h>11 #address-cells = <1>;12 #size-cells = <1>;15 #address-cells = <1>;16 #size-cells = <0>;19 compatible = "arm,cortex-a7";[all …]
2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>4 * This file is dual-licensed: you can use it either under the terms43 #include "armv7-m.dtsi"44 #include <dt-bindings/clock/stm32h7-clks.h>45 #include <dt-bindings/mfd/stm32h7-rcc.h>46 #include <dt-bindings/interrupt-controller/irq.h>49 #address-cells = <1>;50 #size-cells = <1>;53 clk_hse: clk-hse {54 #clock-cells = <0>;[all …]
1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause6 #include <dt-bindings/input/input.h>7 #include <dt-bindings/pwm/pwm.h>17 stdout-path = "serial0:115200n8";32 * GPIO line, however the STM32 UART driver assumes RX happens36 rs485-rx-en {37 gpio-hog;39 output-low;40 line-name = "rs485-rx-en";45 gpio-line-names = "", "", "", "",[all …]
2 * Copyright 2016 - Lee Jones <lee.jones@linaro.org>4 * This file is dual-licensed: you can use it either under the terms22 * MA 02110-1301 USA48 /dts-v1/;50 #include "stm32f469-pinctrl.dtsi"51 #include <dt-bindings/gpio/gpio.h>52 #include <dt-bindings/input/input.h>55 model = "STMicroelectronics STM32F469i-DISCO board";56 compatible = "st,stm32f469i-disco", "st,stm32f469";60 stdout-path = "serial0:115200n8";[all …]
2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>4 * This file is dual-licensed: you can use it either under the terms22 * MA 02110-1301 USA48 /dts-v1/;50 #include "stm32f429-pinctrl.dtsi"51 #include <dt-bindings/input/input.h>52 #include <dt-bindings/gpio/gpio.h>55 model = "STMicroelectronics STM32429i-EVAL board";56 compatible = "st,stm32429i-eval", "st,stm32f429";60 stdout-path = "serial0:115200n8";[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: STMicroelectronics STM32 Low-Power Timers bindings10 The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several12 - PWM output (with programmable prescaler, configurable polarity)13 - Trigger source for STM32 ADC/DAC (LPTIM_OUT)14 - Several counter modes:15 - quadrature encoder to detect angular position and direction of rotary[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: STMicroelectronics STM32 Timers bindings10 This hardware block provides 3 types of timer along with PWM functionality:11 - advanced-control timers consist of a 16-bit auto-reload counter driven12 by a programmable prescaler, break input feature, PWM outputs and13 complementary PWM outputs channels.14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter[all …]
1 // SPDX-License-Identifier: GPL-2.03 * STM32 Low-Power Timer PWM driver9 * Inspired by Gerald Baeza's pwm-stm32 driver13 #include <linux/mfd/stm32-lptimer.h>18 #include <linux/pwm.h>31 /* STM32 Low-Power Timer is preceded by a configurable power-of-2 prescaler */34 static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm, in stm32_pwm_lp_apply() argument44 pwm_get_state(pwm, &cstate); in stm32_pwm_lp_apply()47 if (!state->enabled) { in stm32_pwm_lp_apply()50 ret = regmap_write(priv->regmap, STM32_LPTIM_CR, 0); in stm32_pwm_lp_apply()[all …]
1 # SPDX-License-Identifier: GPL-2.0-only2 menuconfig PWM config3 bool "Pulse-Width Modulation (PWM) Support"5 Generic Pulse-Width Modulation (PWM) support.7 In Pulse-Width Modulation, a variation of the width of pulses14 This framework provides a generic interface to PWM devices16 to register and unregister a PWM chip, an abstraction of a PWM17 controller, that supports one or more PWM devices. Client18 drivers can request PWM devices and use the generic framework21 This generic framework replaces the legacy PWM framework which[all …]
1 # SPDX-License-Identifier: GPL-2.02 obj-$(CONFIG_PWM) += core.o3 obj-$(CONFIG_PWM_SYSFS) += sysfs.o4 obj-$(CONFIG_PWM_AB8500) += pwm-ab8500.o5 obj-$(CONFIG_PWM_ATMEL) += pwm-atmel.o6 obj-$(CONFIG_PWM_ATMEL_HLCDC_PWM) += pwm-atmel-hlcdc.o7 obj-$(CONFIG_PWM_ATMEL_TCB) += pwm-atmel-tcb.o8 obj-$(CONFIG_PWM_BCM_IPROC) += pwm-bcm-iproc.o9 obj-$(CONFIG_PWM_BCM_KONA) += pwm-bcm-kona.o10 obj-$(CONFIG_PWM_BCM2835) += pwm-bcm2835.o[all …]
1 // SPDX-License-Identifier: GPL-2.07 * Inspired by timer-stm32.c from Maxime Coquelin8 * pwm-atmel.c from Bo Shen12 #include <linux/mfd/stm32-timers.h>17 #include <linux/pwm.h>31 struct mutex lock; /* protect pwm config/enable */50 regmap_read(dev->regmap, TIM_CCER, &ccer); in active_channels()59 return regmap_write(dev->regmap, TIM_CCR1, value); in write_ccrx()61 return regmap_write(dev->regmap, TIM_CCR2, value); in write_ccrx()63 return regmap_write(dev->regmap, TIM_CCR3, value); in write_ccrx()[all …]
1 # SPDX-License-Identifier: GPL-2.0-only38 managed regulators and simple non-configurable regulators.65 They provide two I2C-controlled DC/DC step-down converters with85 tristate "Active-semi act8865 voltage regulator"90 This driver controls a active-semi act8865 voltage output94 tristate "Active-semi ACT8945A voltage regulator"97 This driver controls a active-semi ACT8945A voltage regulator98 via I2C bus. The ACT8945A features three step-down DC/DC converters99 and four low-dropout linear regulators, along with a ActivePath110 tristate "Freescale i.MX on-chip ANATOP LDO regulators"[all …]
1 # SPDX-License-Identifier: GPL-2.07 obj-$(CONFIG_REGULATOR) += core.o dummy.o fixed-helper.o helpers.o devres.o8 obj-$(CONFIG_OF) += of_regulator.o9 obj-$(CONFIG_REGULATOR_FIXED_VOLTAGE) += fixed.o10 obj-$(CONFIG_REGULATOR_VIRTUAL_CONSUMER) += virtual.o11 obj-$(CONFIG_REGULATOR_USERSPACE_CONSUMER) += userspace-consumer.o13 obj-$(CONFIG_REGULATOR_88PG86X) += 88pg86x.o14 obj-$(CONFIG_REGULATOR_88PM800) += 88pm800-regulator.o15 obj-$(CONFIG_REGULATOR_88PM8607) += 88pm8607.o16 obj-$(CONFIG_REGULATOR_CROS_EC) += cros-ec-regulator.o[all …]
5 The STM32 ADC can be configured to use external trigger sources6 (e.g. timers, pwm or exti gpio). Then, it can be tuned to start9 - "rising-edge"10 - "falling-edge"11 - "both-edges".
1 // SPDX-License-Identifier: GPL-2.08 #include <linux/mfd/stm32-timers.h>32 status = dmaengine_tx_status(dma->chan, dma->chan->cookie, &state); in stm32_timers_dma_done()34 complete(&dma->completion); in stm32_timers_dma_done()38 * stm32_timers_dma_burst_read - Read from timers registers using DMA.40 * Read from STM32 timers registers using DMA on a single event.46 * @bursts: number of bursts to read (e.g. like two for pwm period capture)56 struct regmap *regmap = ddata->regmap; in stm32_timers_dma_burst_read()57 struct stm32_timers_dma *dma = &ddata->dma; in stm32_timers_dma_burst_read()69 return -EINVAL; in stm32_timers_dma_burst_read()[all …]
1 # SPDX-License-Identifier: GPL-2.0-only44 tristate "Active-semi ACT8945A"49 Support for the ACT8945A PMIC from Active-semi. This device50 features three step-down DC/DC converters and four low-dropout66 sun4i-gpadc-iio and the hwmon driver iio_hwmon.69 called sun4i-gpadc.88 tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down119 over at91-usart-serial driver and usart-spi-driver. Only one function135 tristate "Atmel HLCDC (High-end LCD Controller)"172 tristate "X-Powers AC100"[all …]
1 # SPDX-License-Identifier: GPL-2.0-only167 Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture,190 32-bit free running decrementing counters.244 bool "Integrator-AP timer driver" if COMPILE_TEST247 Enables support for the Integrator-AP timer.280 available on many OMAP-like platforms.289 It has a 64-bit counter with update rate up to 1000MHz.290 This counter is accessed via couple of 32-bit memory-mapped registers.293 bool "Clocksource for STM32 SoCs" if !ARCH_STM32299 bool "Low power clocksource for STM32 SoCs"[all …]
1 /* SPDX-License-Identifier: GPL-2.0 */12 #include <linux/dma-mapping.h>26 #define TIM_ARR 0x2c /* Auto-Reload Register */31 #define TIM_BDTR 0x44 /* Break and Dead-Time Reg */37 #define TIM_CR1_ARPE BIT(7) /* Auto-reload Preload Ena */53 #define TIM_CCMR_M1 (BIT(6) | BIT(5)) /* Channel PWM Mode 1 */101 * struct stm32_timers_dma - STM32 timer DMA handling.136 return -ENODEV; in stm32_timers_dma_burst_read()
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9 -------------------------30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------97 W: *Web-page* with status/info[all …]