Searched +full:stm32 +full:- +full:cec (Results 1 – 24 of 24) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/media/st,stm32-cec.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: STMicroelectronics STM32 CEC bindings10 - Benjamin Gaignard <benjamin.gaignard@st.com>11 - Yannick Fertre <yannick.fertre@st.com>15 const: st,stm32-cec25 - description: Module Clock26 - description: Bus Clock[all …]
1 // SPDX-License-Identifier: GPL-2.03 * STM32 CEC driver17 #include <media/cec.h>19 #define CEC_NAME "stm32-cec"21 /* CEC registers */80 static void cec_hw_init(struct stm32_cec *cec) in cec_hw_init() argument82 regmap_update_bits(cec->regmap, CEC_CR, TXEOM | TXSOM | CECEN, 0); in cec_hw_init()84 regmap_update_bits(cec->regmap, CEC_IER, ALL_TX_IT | ALL_RX_IT, in cec_hw_init()87 regmap_update_bits(cec->regmap, CEC_CFGR, FULL_CFG, FULL_CFG); in cec_hw_init()90 static void stm32_tx_done(struct stm32_cec *cec, u32 status) in stm32_tx_done() argument[all …]
1 # SPDX-License-Identifier: GPL-2.0-only2 obj-$(CONFIG_CEC_STM32) += stm32-cec.o
2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>4 * This file is dual-licensed: you can use it either under the terms43 #include "armv7-m.dtsi"44 #include <dt-bindings/clock/stm32fx-clock.h>45 #include <dt-bindings/mfd/stm32f7-rcc.h>48 #address-cells = <1>;49 #size-cells = <1>;52 clk_hse: clk-hse {53 #clock-cells = <0>;54 compatible = "fixed-clock";[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved6 #include <dt-bindings/interrupt-controller/arm-gic.h>7 #include <dt-bindings/clock/stm32mp1-clks.h>8 #include <dt-bindings/reset/stm32mp1-resets.h>11 #address-cells = <1>;12 #size-cells = <1>;15 #address-cells = <1>;16 #size-cells = <0>;19 compatible = "arm,cortex-a7";[all …]
2 * Copyright 2017 - Vikas MANOCHA <vikas.manocha@st.com>4 * This file is dual-licensed: you can use it either under the terms43 /dts-v1/;45 #include "stm32f769-pinctrl.dtsi"46 #include <dt-bindings/input/input.h>47 #include <dt-bindings/gpio/gpio.h>50 model = "STMicroelectronics STM32F769-DISCO board";51 compatible = "st,stm32f769-disco", "st,stm32f769";55 stdout-path = "serial0:115200n8";68 compatible = "gpio-leds";[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved7 #include <dt-bindings/pinctrl/stm32-pinfunc.h>8 #include <dt-bindings/mfd/stm32f7-rcc.h>12 pinctrl: pin-controller {13 #address-cells = <1>;14 #size-cells = <1>;16 interrupt-parent = <&exti>;18 pins-are-numbered;21 gpio-controller;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>9 adc1_in6_pins_a: adc1-in6-0 {15 adc12_ain_pins_a: adc12-ain-0 {24 adc12_ain_pins_b: adc12-ain-1 {31 adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {38 cec_pins_a: cec-0 {41 bias-disable;42 drive-open-drain;[all …]
1 # SPDX-License-Identifier: GPL-2.0-only6 tristate "ChromeOS EC CEC driver"13 ChromeOS Embedded Controller's CEC.14 The CEC bus is present in the HDMI connector and enables communication18 tristate "Amlogic Meson AO CEC driver"23 This is a driver for Amlogic Meson SoCs AO CEC interface. It uses the24 generic CEC framework interface.25 CEC bus is present in the HDMI connector and enables communication28 tristate "Amlogic Meson G12A AO CEC driver"36 This is a driver for Amlogic Meson G12A SoCs AO CEC interface.[all …]
1 # SPDX-License-Identifier: GPL-2.03 # Makefile for the CEC platform device drivers.7 obj-$(CONFIG_CEC_CROS_EC) += cros-ec/8 obj-$(CONFIG_CEC_GPIO) += cec-gpio/9 obj-$(CONFIG_CEC_MESON_AO) += meson/10 obj-$(CONFIG_CEC_SAMSUNG_S5P) += s5p/11 obj-$(CONFIG_CEC_SECO) += seco/12 obj-$(CONFIG_CEC_STI) += sti/13 obj-$(CONFIG_CEC_STM32) += stm32/14 obj-$(CONFIG_CEC_TEGRA) += tegra/
6 ------------8 The STM32F769 is a Cortex-M7 MCU aimed at various applications.11 - Cortex-M7 core running up to @216MHz12 - 2MB internal flash, 512KBytes internal RAM (+4KB of backup SRAM)13 - FMC controller to connect SDRAM, NOR and NAND memories14 - Dual mode QSPI15 - SD/MMC/SDIO support*216 - Ethernet controller17 - USB OTFG FS & HS controllers18 - I2C*4, SPI*6, CAN*3 busses support[all …]
6 ------------8 The STM32F746 is a Cortex-M7 MCU aimed at various applications.11 - Cortex-M7 core running up to @216MHz12 - 1MB internal flash, 320KBytes internal RAM (+4KB of backup SRAM)13 - FMC controller to connect SDRAM, NOR and NAND memories14 - Dual mode QSPI15 - SD/MMC/SDIO support16 - Ethernet controller17 - USB OTFG FS & HS controllers18 - I2C, SPI, CAN busses support[all …]
1 .. SPDX-License-Identifier: GPL-2.08 distribution-specific source file or via the Kernel's main git tree\ [1]_.12 - you're a braveheart and want to experiment with new stuff;13 - if you want to report a bug;14 - if you're developing new patches23 https://linuxtv.org/wiki/index.php/How_to_Obtain,_Build_and_Install_V4L-DVB_Device_Drivers50 Device Drivers --->51 <M> Remote Controller support --->52 [ ] HDMI CEC RC integration53 [ ] Enable CEC error injection support[all …]
1 STMicroelectronics STM32 Reset and Clock Controller6 Please refer to clock-bindings.txt for common clock controller binding usage.10 - compatible: Should be:11 "st,stm32f42xx-rcc"12 "st,stm32f469-rcc"13 "st,stm32f746-rcc"14 "st,stm32f769-rcc"16 - reg: should be register base and length as documented in the18 - #reset-cells: 1, see below19 - #clock-cells: 2, device nodes should specify the clock in their "clocks"[all …]
1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */3 * SECO X86 Boards CEC register defines68 * STM32 SMBus Registers
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>10 pinctrl: pin-controller@50002000 {11 #address-cells = <1>;12 #size-cells = <1>;13 compatible = "st,stm32mp157-pinctrl";15 interrupt-parent = <&exti>;17 pins-are-numbered;20 gpio-controller;[all …]
9 -------------------------30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------97 W: *Web-page* with status/info[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved9 #include <linux/clk-provider.h>18 #include <dt-bindings/clock/stm32mp1-clks.h>160 "ck_hse", "pll4_r", "clk-hse-div2"372 /* STM32 Composite clock */385 struct gate_cfg *gate_cfg = cfg->cfg; in _clk_hw_register_gate()388 cfg->name, in _clk_hw_register_gate()389 cfg->parent_name, in _clk_hw_register_gate()390 cfg->flags, in _clk_hw_register_gate()[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved10 #include "pinctrl-stm32.h"252 STM32_FUNCTION(5, "CEC"),377 STM32_FUNCTION(6, "CEC"),2335 .compatible = "st,stm32mp157-pinctrl",2339 .compatible = "st,stm32mp157-z-pinctrl",2352 .name = "stm32mp157-pinctrl",
... then 81 /usr/share/command-not-found/command-not-found -- "$ ...