| /OK3568_Linux_fs/kernel/drivers/gpu/drm/tegra/ |
| H A D | sor.c | 31 #include "sor.h" 399 int (*probe)(struct tegra_sor *sor); 400 void (*audio_enable)(struct tegra_sor *sor); 401 void (*audio_disable)(struct tegra_sor *sor); 484 static inline u32 tegra_sor_readl(struct tegra_sor *sor, unsigned int offset) in tegra_sor_readl() argument 486 u32 value = readl(sor->regs + (offset << 2)); in tegra_sor_readl() 488 trace_sor_readl(sor->dev, offset, value); in tegra_sor_readl() 493 static inline void tegra_sor_writel(struct tegra_sor *sor, u32 value, in tegra_sor_writel() argument 496 trace_sor_writel(sor->dev, offset, value); in tegra_sor_writel() 497 writel(value, sor->regs + (offset << 2)); in tegra_sor_writel() [all …]
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| /OK3568_Linux_fs/u-boot/drivers/video/tegra124/ |
| H A D | sor.c | 18 #include "sor.h" 51 static inline u32 tegra_sor_readl(struct tegra_dc_sor_data *sor, u32 reg) in tegra_sor_readl() argument 53 return readl((u32 *)sor->base + reg); in tegra_sor_readl() 56 static inline void tegra_sor_writel(struct tegra_dc_sor_data *sor, u32 reg, in tegra_sor_writel() argument 59 writel(val, (u32 *)sor->base + reg); in tegra_sor_writel() 62 static inline void tegra_sor_write_field(struct tegra_dc_sor_data *sor, in tegra_sor_write_field() argument 65 u32 reg_val = tegra_sor_readl(sor, reg); in tegra_sor_write_field() 68 tegra_sor_writel(sor, reg, reg_val); in tegra_sor_write_field() 73 struct tegra_dc_sor_data *sor = dev_get_priv(dev); in tegra_dp_disable_tx_pu() local 75 tegra_sor_write_field(sor, DP_PADCTL(sor->portnum), in tegra_dp_disable_tx_pu() [all …]
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| H A D | dp.c | 18 #include "sor.h" 35 struct udevice *sor; member 606 debug("dp: sor setting: unable to get a good tusize, force watermark to 30\n"); in tegra_dc_dp_calc_config() 610 debug("dp: sor setting: force watermark to the number of symbols in the line\n"); in tegra_dc_dp_calc_config() 720 struct udevice *sor, int ena) in tegra_dc_dp_set_assr() argument 734 tegra_dc_sor_set_internal_panel(sor, ena); in tegra_dc_dp_set_assr() 739 struct udevice *sor, in tegra_dp_set_link_bandwidth() argument 742 tegra_dc_sor_set_link_bandwidth(sor, link_bw); in tegra_dp_set_link_bandwidth() 750 struct udevice *sor) in tegra_dp_set_lane_count() argument 763 tegra_dc_sor_set_lane_count(sor, link_cfg->lane_count); in tegra_dp_set_lane_count() [all …]
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| H A D | sor.h | 879 int tegra_dc_sor_enable_dp(struct udevice *sor, 881 int tegra_dc_sor_set_power_state(struct udevice *sor, int pu_pd); 886 void tegra_dc_sor_set_panel_power(struct udevice *sor, 893 void tegra_dc_sor_power_down_unused_lanes(struct udevice *sor, 895 int tegra_dc_sor_set_voltage_swing(struct udevice *sor, 899 void tegra_dp_disable_tx_pu(struct udevice *sor); 903 int tegra_dc_sor_attach(struct udevice *dc_dev, struct udevice *sor, 906 int tegra_dc_sor_detach(struct udevice *dc_dev, struct udevice *sor);
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
| H A D | sorg94.c | 29 g94_sor_dp_watermark(struct nvkm_ior *sor, int head, u8 watermark) in g94_sor_dp_watermark() argument 31 struct nvkm_device *device = sor->disp->engine.subdev.device; in g94_sor_dp_watermark() 32 const u32 loff = nv50_sor_link(sor); in g94_sor_dp_watermark() 37 g94_sor_dp_activesym(struct nvkm_ior *sor, int head, in g94_sor_dp_activesym() argument 40 struct nvkm_device *device = sor->disp->engine.subdev.device; in g94_sor_dp_activesym() 41 const u32 loff = nv50_sor_link(sor); in g94_sor_dp_activesym() 49 g94_sor_dp_audio_sym(struct nvkm_ior *sor, int head, u16 h, u32 v) in g94_sor_dp_audio_sym() argument 51 struct nvkm_device *device = sor->disp->engine.subdev.device; in g94_sor_dp_audio_sym() 52 const u32 soff = nv50_ior_base(sor); in g94_sor_dp_audio_sym() 58 g94_sor_dp_drive(struct nvkm_ior *sor, int ln, int pc, int dc, int pe, int pu) in g94_sor_dp_drive() argument [all …]
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| H A D | sorgf119.c | 29 gf119_sor_dp_watermark(struct nvkm_ior *sor, int head, u8 watermark) in gf119_sor_dp_watermark() argument 31 struct nvkm_device *device = sor->disp->engine.subdev.device; in gf119_sor_dp_watermark() 37 gf119_sor_dp_audio_sym(struct nvkm_ior *sor, int head, u16 h, u32 v) in gf119_sor_dp_audio_sym() argument 39 struct nvkm_device *device = sor->disp->engine.subdev.device; in gf119_sor_dp_audio_sym() 46 gf119_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable) in gf119_sor_dp_audio() argument 48 struct nvkm_device *device = sor->disp->engine.subdev.device; in gf119_sor_dp_audio() 60 gf119_sor_dp_vcpi(struct nvkm_ior *sor, int head, in gf119_sor_dp_vcpi() argument 63 struct nvkm_device *device = sor->disp->engine.subdev.device; in gf119_sor_dp_vcpi() 71 gf119_sor_dp_drive(struct nvkm_ior *sor, int ln, int pc, int dc, int pe, int pu) in gf119_sor_dp_drive() argument 73 struct nvkm_device *device = sor->disp->engine.subdev.device; in gf119_sor_dp_drive() [all …]
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| H A D | sorgm200.c | 27 gm200_sor_dp_drive(struct nvkm_ior *sor, int ln, int pc, int dc, int pe, int pu) in gm200_sor_dp_drive() argument 29 struct nvkm_device *device = sor->disp->engine.subdev.device; in gm200_sor_dp_drive() 30 const u32 loff = nv50_sor_link(sor); in gm200_sor_dp_drive() 31 const u32 shift = sor->func->dp.lanes[ln] * 8; in gm200_sor_dp_drive() 53 const u32 sor = ior ? ior->id + 1 : 0; in gm200_sor_route_set() local 57 nvkm_mask(device, 0x612308 + moff, 0x0000001f, link << 4 | sor); in gm200_sor_route_set() 62 nvkm_mask(device, 0x612388 + moff, 0x0000001f, link << 4 | sor); in gm200_sor_route_set() 70 int lnk[2], sor[2], m, s; in gm200_sor_route_get() local 76 sor[s] = (data & 0x0000000f); in gm200_sor_route_get() 77 if (!sor[s]) in gm200_sor_route_get() [all …]
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| H A D | sornv50.c | 29 nv50_sor_clock(struct nvkm_ior *sor) in nv50_sor_clock() argument 31 struct nvkm_device *device = sor->disp->engine.subdev.device; in nv50_sor_clock() 32 const int div = sor->asy.link == 3; in nv50_sor_clock() 33 const u32 soff = nv50_ior_base(sor); in nv50_sor_clock() 47 nv50_sor_power(struct nvkm_ior *sor, bool normal, bool pu, in nv50_sor_power() argument 50 struct nvkm_device *device = sor->disp->engine.subdev.device; in nv50_sor_power() 51 const u32 soff = nv50_ior_base(sor); in nv50_sor_power() 67 nv50_sor_state(struct nvkm_ior *sor, struct nvkm_ior_state *state) in nv50_sor_state() argument 69 struct nvkm_device *device = sor->disp->engine.subdev.device; in nv50_sor_state() 70 const u32 coff = sor->id * 8 + (state == &sor->arm) * 4; in nv50_sor_state() [all …]
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| H A D | sortu102.c | 27 tu102_sor_dp_vcpi(struct nvkm_ior *sor, int head, in tu102_sor_dp_vcpi() argument 30 struct nvkm_device *device = sor->disp->engine.subdev.device; in tu102_sor_dp_vcpi() 38 tu102_sor_dp_links(struct nvkm_ior *sor, struct nvkm_i2c_aux *aux) in tu102_sor_dp_links() argument 40 struct nvkm_device *device = sor->disp->engine.subdev.device; in tu102_sor_dp_links() 41 const u32 soff = nv50_ior_base(sor); in tu102_sor_dp_links() 42 const u32 loff = nv50_sor_link(sor); in tu102_sor_dp_links() 46 clksor |= sor->dp.bw << 18; in tu102_sor_dp_links() 47 dpctrl |= ((1 << sor->dp.nr) - 1) << 16; in tu102_sor_dp_links() 48 if (sor->dp.mst) in tu102_sor_dp_links() 50 if (sor->dp.ef) in tu102_sor_dp_links() [all …]
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| H A D | sorgv100.c | 27 gv100_sor_dp_watermark(struct nvkm_ior *sor, int head, u8 watermark) in gv100_sor_dp_watermark() argument 29 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_dp_watermark() 35 gv100_sor_dp_audio_sym(struct nvkm_ior *sor, int head, u16 h, u32 v) in gv100_sor_dp_audio_sym() argument 37 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_dp_audio_sym() 44 gv100_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable) in gv100_sor_dp_audio() argument 46 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_dp_audio() 58 gv100_sor_state(struct nvkm_ior *sor, struct nvkm_ior_state *state) in gv100_sor_state() argument 60 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_state() 61 const u32 coff = (state == &sor->arm) * 0x8000 + sor->id * 0x20; in gv100_sor_state() 145 return nvkm_ior_new_(&gv100_sor_hda, disp, SOR, id); in gv100_sor_new() [all …]
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| H A D | sorgm107.c | 27 gm107_sor_dp_pattern(struct nvkm_ior *sor, int pattern) in gm107_sor_dp_pattern() argument 29 struct nvkm_device *device = sor->disp->engine.subdev.device; in gm107_sor_dp_pattern() 30 const u32 soff = nv50_ior_base(sor); in gm107_sor_dp_pattern() 32 if (sor->asy.link & 1) in gm107_sor_dp_pattern() 67 return nvkm_ior_new_(&gm107_sor, disp, SOR, id); in gm107_sor_new()
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| H A D | rootnv50.c | 142 nvif_ioctl(object, "disp sor hda eld size %d\n", size); in nv50_disp_root_mthd_() 144 nvif_ioctl(object, "disp sor hda eld vers %d\n", in nv50_disp_root_mthd_() 176 nvif_ioctl(object, "disp sor hdmi ctrl size %d\n", size); in nv50_disp_root_mthd_() 178 nvif_ioctl(object, "disp sor hdmi ctrl vers %d state %d " in nv50_disp_root_mthd_() 218 nvif_ioctl(object, "disp sor lvds script size %d\n", size); in nv50_disp_root_mthd_() 220 nvif_ioctl(object, "disp sor lvds script " in nv50_disp_root_mthd_() 223 disp->sor.lvdsconf = args->v0.script; in nv50_disp_root_mthd_() 235 nvif_ioctl(object, "disp sor dp mst link size %d\n", size); in nv50_disp_root_mthd_() 237 nvif_ioctl(object, "disp sor dp mst link vers %d state %d\n", in nv50_disp_root_mthd_() 250 nvif_ioctl(object, "disp sor dp mst vcpi size %d\n", size); in nv50_disp_root_mthd_() [all …]
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| H A D | nv50.c | 127 disp->sor.nr = func->sor.cnt(&disp->base, &disp->sor.mask); in nv50_disp_oneinit_() 128 nvkm_debug(subdev, " SOR(s): %d (%02lx)\n", in nv50_disp_oneinit_() 129 disp->sor.nr, disp->sor.mask); in nv50_disp_oneinit_() 130 for_each_set_bit(i, &disp->sor.mask, disp->sor.nr) { in nv50_disp_oneinit_() 131 ret = func->sor.new(&disp->base, i); in nv50_disp_oneinit_() 219 if (ior->type == SOR) { in nv50_disp_super_ied_on() 452 if (ior->type == SOR && ior->asy.proto == LVDS) { in nv50_disp_super_2_2() 453 head->asy.or.depth = (disp->sor.lvdsconf & 0x0200) ? 24 : 18; in nv50_disp_super_2_2() 454 ior->asy.link = (disp->sor.lvdsconf & 0x0100) ? 3 : 1; in nv50_disp_super_2_2() 468 if (ior->type == SOR && ior->asy.proto == DP) in nv50_disp_super_2_2() [all …]
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| H A D | sorgt215.c | 27 gt215_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable) in gt215_sor_dp_audio() argument 29 struct nvkm_device *device = sor->disp->engine.subdev.device; in gt215_sor_dp_audio() 30 const u32 soff = nv50_ior_base(sor); in gt215_sor_dp_audio() 68 return nvkm_ior_new_(>215_sor, disp, SOR, id); in gt215_sor_new()
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| H A D | outp.c | 67 case DCB_OUTPUT_TMDS : *type = SOR; return TMDS; in nvkm_outp_xlat() 68 case DCB_OUTPUT_LVDS : *type = SOR; return LVDS; in nvkm_outp_xlat() 69 case DCB_OUTPUT_DP : *type = SOR; return DP; in nvkm_outp_xlat() 160 /* Deal with panels requiring identity-mapped SOR assignment. */ in nvkm_outp_acquire() 162 ior = nvkm_ior_find(outp->disp, SOR, ffs(outp->info.or) - 1); in nvkm_outp_acquire() 196 /* Use a HDA-supporting SOR anyway. */ in nvkm_outp_acquire() 247 link = (ior->type == SOR) ? outp->info.sorconf.link : 0; in nvkm_outp_init_route()
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| H A D | tu102.c | 53 /* SOR capabilities. */ in tu102_disp_init() 54 for (i = 0; i < disp->sor.nr; i++) { in tu102_disp_init() 144 .sor = { .cnt = gv100_sor_cnt, .new = tu102_sor_new },
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| H A D | ior.c | 29 [SOR] = "SOR",
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| H A D | nv50.h | 29 } sor; member 67 } wndw, head, dac, sor, pior; member
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| H A D | sorgp100.c | 91 return nvkm_ior_new_(&gp100_sor_hda, disp, SOR, id); in gp100_sor_new() 92 return nvkm_ior_new_(&gp100_sor, disp, SOR, id); in gp100_sor_new()
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/tegra/ |
| H A D | nvidia,tegra20-host1x.txt | 73 - power-domains: Must include sor powergate node as csicil is in 74 SOR partition. 265 - sor: serial output resource 269 - "nvidia,tegra124-sor": for Tegra124 and Tegra132 270 - "nvidia,tegra132-sor": for Tegra132 271 - "nvidia,tegra210-sor": for Tegra210 273 - "nvidia,tegra186-sor": for Tegra186 280 - sor: clock input for the SOR hardware 281 - out: SOR output clock 283 - dp: reference clock for the SOR clock [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ |
| H A D | dcb.h | 38 struct sor_conf sor; member 47 struct sor_conf sor; member 52 struct sor_conf sor; member
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| /OK3568_Linux_fs/u-boot/doc/device-tree-bindings/gpu/ |
| H A D | nvidia,tegra20-host1x.txt | 195 - sor: serial output resource 198 - compatible: "nvidia,tegra124-sor" 204 - sor: clock input for the SOR hardware 206 - dp: reference clock for the SOR clock 207 - safe: safe reference for the SOR clock during power up 211 - sor
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/bios/ |
| H A D | mxm.c | 49 /* These map MXM v2.x digital connection values to the appropriate SOR/link, 94 nvkm_warn(subdev, "unknown sor map v%02x\n", ver); in mxm_sor_map() 107 nvkm_warn(subdev, "missing sor map\n"); in mxm_sor_map()
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| /OK3568_Linux_fs/u-boot/arch/powerpc/cpu/mpc8xx/ |
| H A D | immap.c | 186 SOR, in do_iopset() enumerator 222 cmd = SOR; in do_iopset() 254 case SOR: in do_iopset() 374 "PORT PIN CMD VALUE\nPORT: A-D, PIN: 0-31, CMD: [dat|dir|odr|sor], VALUE: 0|1"
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/nvidia/ |
| H A D | tegra194-p2972-0000.dts | 139 sor@15b00000 { 149 sor@15b40000 { 159 sor@15b80000 {
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