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/OK3568_Linux_fs/u-boot/drivers/video/drm/
H A Drockchip_connector.c68 if (state->conn_state.secondary) { in rockchip_connector_pre_init()
111 if (state->conn_state.secondary) { in rockchip_connector_init()
112 conn = state->conn_state.secondary; in rockchip_connector_init()
156 if (state->conn_state.secondary) { in rockchip_connector_detect()
157 conn = state->conn_state.secondary; in rockchip_connector_detect()
176 if (state->conn_state.secondary) { in rockchip_connector_get_timing()
177 conn = state->conn_state.secondary; in rockchip_connector_get_timing()
197 if (state->conn_state.secondary) { in rockchip_connector_get_edid()
198 conn = state->conn_state.secondary; in rockchip_connector_get_edid()
229 if (state->conn_state.secondary) { in rockchip_connector_pre_enable()
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/OK3568_Linux_fs/kernel/arch/arm/mach-bcm/
H A Dplatsmp.c33 /* Name of device node property defining secondary boot register location */
34 #define OF_SECONDARY_BOOT "secondary-boot-reg"
91 pr_err("required secondary boot register not specified for CPU%u\n", in secondary_boot_addr_for()
120 /* Ensure the write is visible to the secondary core */ in nsp_write_lut()
141 * The ROM code has the secondary cores looping, waiting for an event.
143 * secondary boot register. When a core finds those bits contain its
147 * address back to the secondary boot register, and finally jumps to
151 * - Encode the (hardware) CPU id with the bottom bits of the secondary
153 * - Write that value into the secondary boot register.
154 * - Generate an event to wake up the secondary CPU(s).
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/OK3568_Linux_fs/kernel/arch/sparc/include/uapi/asm/
H A Dasi.h130 #define ASI_AIUS 0x11 /* Secondary, user */
132 #define ASI_AIUSL 0x19 /* Secondary, user, little endian */
134 #define ASI_S 0x81 /* Secondary, implicit */
136 #define ASI_SNF 0x83 /* Secondary, no fault */
138 #define ASI_SL 0x89 /* Secondary, implicit, l-endian */
140 #define ASI_SNFL 0x8b /* Secondary, no fault, l-endian */
161 * secondary, user
231 #define ASI_BLK_AIUS 0x71 /* Secondary, user, block ld/st */
242 #define ASI_BLK_AIUSL 0x79 /* Secondary, user, little, blk ld/st*/
255 #define ASI_PST8_S 0xc1 /* Secondary, 8 8-bit, partial */
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/OK3568_Linux_fs/kernel/Documentation/admin-guide/blockdev/drbd/
H A Dnode-states-8.dot2 Secondary -> Primary [ label = "ioctl_set_state()" ]
3 Primary -> Secondary [ label = "ioctl_set_state()" ]
7 Secondary -> Primary [ label = "recv state packet" ]
8 Primary -> Secondary [ label = "recv state packet" ]
10 Secondary -> Unknown [ label = "connection lost" ]
12 Unknown -> Secondary [ label = "connected" ]
/OK3568_Linux_fs/kernel/arch/arm64/include/asm/
H A Dsmp.h20 /* Fatal system error detected by secondary CPU, crash the system */
70 * Called from the secondary holding pen, this is the secondary CPU entry point.
75 * Initial data for bringing up a secondary CPU.
76 * @stack - sp for the secondary CPU
77 * @status - Result passed back from the secondary CPU to
126 * The calling secondary CPU has detected serious configuration mismatch,
137 * If a secondary CPU enters the kernel but fails to come online,
/OK3568_Linux_fs/kernel/Documentation/sparc/oradax/
H A Ddax-hv-api.txt172 [7:5] Secondary source address type
248 encoded data) and secondary data streams (meta-data for the encoded data).
260 … Variable width byte packed Data stream of lengths must be provided as a secondary
263 length encoding provided as a secondary input
267 as a secondary input
279 … a secondary input; pointer to the encoding table must be
291 … OZIP (CCB version 1) encoding as a secondary input; pointer to the encoding table must
296 … OZIP (CCB version 1) encoding stream of run lengths must be provided as a secondary
307 36.2.1.1.3. Secondary Input Format
309 …For primary input data streams which require a secondary input stream, the secondary input stream …
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/OK3568_Linux_fs/kernel/sound/soc/qcom/qdsp6/
H A Dq6afe-dai.c598 {"Secondary MI2S Playback", NULL, "SEC_MI2S_RX"},
611 {"Secondary TDM0 Playback", NULL, "SEC_TDM_RX_0"},
612 {"Secondary TDM1 Playback", NULL, "SEC_TDM_RX_1"},
613 {"Secondary TDM2 Playback", NULL, "SEC_TDM_RX_2"},
614 {"Secondary TDM3 Playback", NULL, "SEC_TDM_RX_3"},
615 {"Secondary TDM4 Playback", NULL, "SEC_TDM_RX_4"},
616 {"Secondary TDM5 Playback", NULL, "SEC_TDM_RX_5"},
617 {"Secondary TDM6 Playback", NULL, "SEC_TDM_RX_6"},
618 {"Secondary TDM7 Playback", NULL, "SEC_TDM_RX_7"},
656 {"SEC_TDM_TX_0", NULL, "Secondary TDM0 Capture"},
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/OK3568_Linux_fs/kernel/drivers/ide/
H A Dide-generic.c43 static void ide_generic_check_pci_legacy_iobases(int *primary, int *secondary) in ide_generic_check_pci_legacy_iobases() argument
53 *secondary = 1; in ide_generic_check_pci_legacy_iobases()
59 *primary = *secondary = 1; in ide_generic_check_pci_legacy_iobases()
68 *secondary = 1; in ide_generic_check_pci_legacy_iobases()
81 int i, rc = 0, primary = 0, secondary = 0; in ide_generic_init() local
83 ide_generic_check_pci_legacy_iobases(&primary, &secondary); in ide_generic_init()
92 if (secondary == 0) in ide_generic_init()
/OK3568_Linux_fs/yocto/poky/meta/files/common-licenses/
H A DMPL-2.0-no-copyleft-exception13 1.5. "Incompatible With Secondary Licenses" means
17 …erms of version 1.1 or earlier of the License, but not also under the terms of a Secondary License.
35 …1.12. "Secondary License" means either the GNU General Public License, Version 2.0, the GNU Lesser…
65 …uent version of this License (see Section 10.2) or under the terms of a Secondary License (if perm…
89 …Secondary Licenses, and the Covered Software is not Incompatible With Secondary Licenses, this Lic…
131 10.4. Distributing Source Code Form that is Incompatible With Secondary Licenses
132 …If You choose to distribute Source Code Form that is Incompatible With Secondary Licenses under th…
142 Exhibit B - "Incompatible With Secondary Licenses" Notice
144 …This Source Code Form is "Incompatible With Secondary Licenses", as defined by the Mozilla Public …
H A DMPL-2.024 1.5. "Incompatible With Secondary Licenses"
32 terms of a Secondary License.
67 1.12. "Secondary License"
137 License (see Section 10.2) or under the terms of a Secondary License (if
190 Software with a work governed by one or more Secondary Licenses, and the
191 Covered Software is not Incompatible With Secondary Licenses, this
193 under the terms of such Secondary License(s), so that the recipient of
195 Software under the terms of either this License or such Secondary
348 10.4. Distributing Source Code Form that is Incompatible With Secondary
352 Secondary Licenses under the terms of this version of the License, the
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/OK3568_Linux_fs/external/chromium/licenses/
H A DLICENSE.4426 1.5. "Incompatible With Secondary Licenses"
34 a Secondary License.
72 1.12. "Secondary License"
142 License (see Section 10.2) or under the terms of a Secondary License (if
195 Software with a work governed by one or more Secondary Licenses, and the
196 Covered Software is not Incompatible With Secondary Licenses, this
198 under the terms of such Secondary License(s), so that the recipient of
200 Software under the terms of either this License or such Secondary
336 10.4. Distributing Source Code Form that is Incompatible With Secondary
338 Incompatible With Secondary Licenses under the terms of this version of
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/powerpc/fsl/
H A Dpamu.txt63 - fsl,secondary-cache-geometry
65 Two cells that specify the geometry of the secondary PAMU
108 fsl,secondary-cache-geometry = <128 2>;
114 fsl,secondary-cache-geometry = <128 2>;
120 fsl,secondary-cache-geometry = <128 2>;
126 fsl,secondary-cache-geometry = <128 2>;
132 fsl,secondary-cache-geometry = <128 2>;
/OK3568_Linux_fs/kernel/arch/arm/mach-mmp/
H A Dirqs.h180 /* secondary interrupt of INT #4 */
185 /* secondary interrupt of INT #5 */
190 /* secondary interrupt of INT #9 */
196 /* secondary interrupt of INT #17 */
204 /* secondary interrupt of INT #35 */
221 /* secondary interrupt of INT #51 */
226 /* secondary interrupt of INT #55 */
/OK3568_Linux_fs/kernel/arch/arm/mach-omap2/
H A Domap-headsmp.S3 * Secondary CPU startup routine source file.
21 /* Physical address needed since MMU not enabled yet on secondary core */
36 * OMAP5 specific entry point for secondary CPU to jump from ROM
38 * secondary core is held until we're ready for it to initialise.
75 * OMAP4 specific entry point for secondary CPU to jump from ROM
77 * secondary core is held until we're ready for it to initialise.
/OK3568_Linux_fs/u-boot/doc/
H A DREADME.arm6432 4. Spin-table is used to wake up secondary processors. One location
34 for secondary processors. It must be ensured that the location is
35 accessible and zero immediately after secondary processor
38 of secondary processors to it and send event to wakeup secondary
H A DREADME.mpc85xx-spin-table12 page translation for secondary cores to use this page of memory. Then 4KB
17 that secondary cores can see it.
19 When secondary cores boot up from 0xffff_f000 page, they only have one default
22 with WIMGE =0b00100. Now secondary cores can keep polling the spin table
/OK3568_Linux_fs/kernel/arch/sparc/kernel/
H A Dsbus.c263 #define SYSIO_UEAFSR_SPIO 0x1000000000000000UL /* Secondary PIO is cause */
264 #define SYSIO_UEAFSR_SDRD 0x0800000000000000UL /* Secondary DVMA read cause */
265 #define SYSIO_UEAFSR_SDWR 0x0400000000000000UL /* Secondary DVMA write cause*/
287 /* Clear primary/secondary error status bits. */ in sysio_ue_handler()
310 printk("SYSIO[%x]: Secondary UE errors [", portid); in sysio_ue_handler()
336 #define SYSIO_CEAFSR_SPIO 0x1000000000000000UL /* Secondary PIO cause */
337 #define SYSIO_CEAFSR_SDRD 0x0800000000000000UL /* Secondary DVMA read cause */
338 #define SYSIO_CEAFSR_SDWR 0x0400000000000000UL /* Secondary DVMA write cause*/
361 /* Clear primary/secondary error status bits. */ in sysio_ce_handler()
389 printk("SYSIO[%x]: Secondary CE errors [", portid); in sysio_ce_handler()
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/OK3568_Linux_fs/kernel/drivers/net/wireless/intel/iwlwifi/mvm/
H A Dcoex.c271 struct ieee80211_chanctx_conf *secondary; member
312 swap(data->primary, data->secondary); in iwl_mvm_bt_coex_tcm_based_ci()
388 data->secondary = data->primary; in iwl_mvm_bt_notif_iterator()
404 data->secondary = data->primary; in iwl_mvm_bt_notif_iterator()
407 /* there is low latency vif - we will be secondary */ in iwl_mvm_bt_notif_iterator()
408 data->secondary = chanctx_conf; in iwl_mvm_bt_notif_iterator()
413 else if (data->secondary == chanctx_conf) in iwl_mvm_bt_notif_iterator()
424 else if (!data->secondary) in iwl_mvm_bt_notif_iterator()
425 /* if secondary is not NULL, it might be a GO */ in iwl_mvm_bt_notif_iterator()
426 data->secondary = chanctx_conf; in iwl_mvm_bt_notif_iterator()
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/OK3568_Linux_fs/kernel/Documentation/arm/samsung/
H A Dbootloader-interface.rst28 0x1c exynos4_secondary_startup Secondary CPU boot
29 0x1c + 4*cpu exynos4_secondary_startup (Exynos4412) Secondary CPU boot
44 0x00 exynos4_secondary_startup Secondary CPU boot
45 0x04 exynos4_secondary_startup (Exynos542x) Secondary CPU boot
46 4*cpu exynos4_secondary_startup (Exynos4412) Secondary CPU boot
60 0x0814 exynos4_secondary_startup (Exynos4210 r1.1) Secondary CPU boot
72 0x0908 Non-zero Secondary CPU boot up indicator
/OK3568_Linux_fs/kernel/arch/arm/mach-mvebu/
H A Dheadsmp.S2 * SMP support: Entry point for secondary CPUs
14 * This file implements the assembly entry point for secondary CPUs in
27 * Armada XP specific entry point for secondary CPUs.
28 * We add the CPU to the coherency fabric and then jump to secondary
/OK3568_Linux_fs/kernel/arch/alpha/kernel/
H A Dsys_sable.c273 *48 PCI 0 slot 0 A secondary bus
274 *49 PCI 0 slot 0 B secondary bus
275 *50 PCI 0 slot 0 C secondary bus
276 *51 PCI 0 slot 0 D secondary bus
277 *52 PCI 0 slot 1 A secondary bus
278 *53 PCI 0 slot 1 B secondary bus
279 *54 PCI 0 slot 1 C secondary bus
280 *55 PCI 0 slot 1 D secondary bus
281 *56 PCI 0 slot 2 A secondary bus
282 *57 PCI 0 slot 2 B secondary bus
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/OK3568_Linux_fs/kernel/arch/arm/plat-versatile/
H A Dplatsmp.c47 * calibrations on the secondary CPU while the requesting CPU is using
74 * and the secondary one in versatile_boot_secondary()
79 * This is really belt and braces; we hold unintended secondary in versatile_boot_secondary()
87 * Send the secondary CPU a soft interrupt, thereby causing in versatile_boot_secondary()
103 * now the secondary core is starting up let it run its in versatile_boot_secondary()
/OK3568_Linux_fs/kernel/arch/arm/mach-spear/
H A Dplatsmp.c62 * and the secondary one in spear13xx_boot_secondary()
67 * The secondary processor is waiting to be released from in spear13xx_boot_secondary()
86 * now the secondary core is starting up let it run its in spear13xx_boot_secondary()
118 * Write the address of secondary startup into the system-wide location in spear13xx_smp_prepare_cpus()
120 * soft interrupt, and then the secondary CPU branches to this address. in spear13xx_smp_prepare_cpus()
/OK3568_Linux_fs/kernel/arch/arm/mach-prima2/
H A Dplatsmp.c64 * write the address of secondary startup into the clkc register in sirfsoc_boot_secondary()
67 * waiting for. This would wake up the secondary core from WFE in sirfsoc_boot_secondary()
83 * The secondary processor is waiting to be released from in sirfsoc_boot_secondary()
94 * Send the secondary CPU SEV, thereby causing the boot monitor to read in sirfsoc_boot_secondary()
109 * now the secondary core is starting up let it run its in sirfsoc_boot_secondary()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/
H A Drockchip_lvds.c113 struct rockchip_lvds *secondary; member
205 if (lvds->secondary) in rockchip_lvds_encoder_atomic_mode_set()
206 lvds->secondary->format = lvds->format; in rockchip_lvds_encoder_atomic_mode_set()
291 if (lvds->secondary) in rockchip_lvds_enable()
292 rockchip_lvds_enable(lvds->secondary); in rockchip_lvds_enable()
305 if (lvds->secondary) in rockchip_lvds_disable()
306 rockchip_lvds_disable(lvds->secondary); in rockchip_lvds_disable()
652 struct rockchip_lvds *secondary = NULL; in rockchip_secondary_lvds_probe() local
656 secondary = rockchip_lvds_find_by_id(lvds->dev->driver, 1); in rockchip_secondary_lvds_probe()
657 if (!secondary) in rockchip_secondary_lvds_probe()
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