1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * SMP support: Entry point for secondary CPUs 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2012 Marvell 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Yehuda Yitschak <yehuday@marvell.com> 7*4882a593Smuzhiyun * Gregory CLEMENT <gregory.clement@free-electrons.com> 8*4882a593Smuzhiyun * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public 11*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without any 12*4882a593Smuzhiyun * warranty of any kind, whether express or implied. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * This file implements the assembly entry point for secondary CPUs in 15*4882a593Smuzhiyun * an SMP kernel. The only thing we need to do is to add the CPU to 16*4882a593Smuzhiyun * the coherency fabric by writing to 2 registers. Currently the base 17*4882a593Smuzhiyun * register addresses are hard coded due to the early initialisation 18*4882a593Smuzhiyun * problems. 19*4882a593Smuzhiyun */ 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun#include <linux/linkage.h> 22*4882a593Smuzhiyun#include <linux/init.h> 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun#include <asm/assembler.h> 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun/* 27*4882a593Smuzhiyun * Armada XP specific entry point for secondary CPUs. 28*4882a593Smuzhiyun * We add the CPU to the coherency fabric and then jump to secondary 29*4882a593Smuzhiyun * startup 30*4882a593Smuzhiyun */ 31*4882a593SmuzhiyunENTRY(armada_xp_secondary_startup) 32*4882a593Smuzhiyun ARM_BE8(setend be ) @ go BE8 if entered LE 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun bl ll_add_cpu_to_smp_group 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun bl ll_enable_coherency 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun b secondary_startup 39*4882a593Smuzhiyun 40*4882a593SmuzhiyunENDPROC(armada_xp_secondary_startup) 41