xref: /OK3568_Linux_fs/kernel/sound/soc/qcom/qdsp6/q6afe-dai.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun // Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.
3*4882a593Smuzhiyun // Copyright (c) 2018, Linaro Limited
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun #include <linux/err.h>
6*4882a593Smuzhiyun #include <linux/init.h>
7*4882a593Smuzhiyun #include <linux/module.h>
8*4882a593Smuzhiyun #include <linux/device.h>
9*4882a593Smuzhiyun #include <linux/platform_device.h>
10*4882a593Smuzhiyun #include <linux/slab.h>
11*4882a593Smuzhiyun #include <sound/pcm.h>
12*4882a593Smuzhiyun #include <sound/soc.h>
13*4882a593Smuzhiyun #include <sound/pcm_params.h>
14*4882a593Smuzhiyun #include "q6afe.h"
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define Q6AFE_TDM_PB_DAI(pre, num, did) {				\
17*4882a593Smuzhiyun 		.playback = {						\
18*4882a593Smuzhiyun 			.stream_name = pre" TDM"#num" Playback",	\
19*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
20*4882a593Smuzhiyun 				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
21*4882a593Smuzhiyun 				SNDRV_PCM_RATE_176400,			\
22*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |		\
23*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE |		\
24*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S32_LE,		\
25*4882a593Smuzhiyun 			.channels_min = 1,				\
26*4882a593Smuzhiyun 			.channels_max = 8,				\
27*4882a593Smuzhiyun 			.rate_min = 8000,				\
28*4882a593Smuzhiyun 			.rate_max = 176400,				\
29*4882a593Smuzhiyun 		},							\
30*4882a593Smuzhiyun 		.name = #did,						\
31*4882a593Smuzhiyun 		.ops = &q6tdm_ops,					\
32*4882a593Smuzhiyun 		.id = did,						\
33*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,				\
34*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,			\
35*4882a593Smuzhiyun 	}
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #define Q6AFE_TDM_CAP_DAI(pre, num, did) {				\
38*4882a593Smuzhiyun 		.capture = {						\
39*4882a593Smuzhiyun 			.stream_name = pre" TDM"#num" Capture",		\
40*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
41*4882a593Smuzhiyun 				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
42*4882a593Smuzhiyun 				SNDRV_PCM_RATE_176400,			\
43*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |		\
44*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE |		\
45*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S32_LE,		\
46*4882a593Smuzhiyun 			.channels_min = 1,				\
47*4882a593Smuzhiyun 			.channels_max = 8,				\
48*4882a593Smuzhiyun 			.rate_min = 8000,				\
49*4882a593Smuzhiyun 			.rate_max = 176400,				\
50*4882a593Smuzhiyun 		},							\
51*4882a593Smuzhiyun 		.name = #did,						\
52*4882a593Smuzhiyun 		.ops = &q6tdm_ops,					\
53*4882a593Smuzhiyun 		.id = did,						\
54*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,				\
55*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,			\
56*4882a593Smuzhiyun 	}
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun #define Q6AFE_CDC_DMA_RX_DAI(did) {				\
59*4882a593Smuzhiyun 		.playback = {						\
60*4882a593Smuzhiyun 			.stream_name = #did" Playback",	\
61*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
62*4882a593Smuzhiyun 				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
63*4882a593Smuzhiyun 				SNDRV_PCM_RATE_176400,			\
64*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |		\
65*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE |		\
66*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S32_LE,		\
67*4882a593Smuzhiyun 			.channels_min = 1,				\
68*4882a593Smuzhiyun 			.channels_max = 8,				\
69*4882a593Smuzhiyun 			.rate_min = 8000,				\
70*4882a593Smuzhiyun 			.rate_max = 176400,				\
71*4882a593Smuzhiyun 		},							\
72*4882a593Smuzhiyun 		.name = #did,						\
73*4882a593Smuzhiyun 		.ops = &q6dma_ops,					\
74*4882a593Smuzhiyun 		.id = did,						\
75*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,				\
76*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,			\
77*4882a593Smuzhiyun 	}
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun #define Q6AFE_CDC_DMA_TX_DAI(did) {				\
80*4882a593Smuzhiyun 		.capture = {						\
81*4882a593Smuzhiyun 			.stream_name = #did" Capture",		\
82*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
83*4882a593Smuzhiyun 				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
84*4882a593Smuzhiyun 				SNDRV_PCM_RATE_176400,			\
85*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |		\
86*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE |		\
87*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S32_LE,		\
88*4882a593Smuzhiyun 			.channels_min = 1,				\
89*4882a593Smuzhiyun 			.channels_max = 8,				\
90*4882a593Smuzhiyun 			.rate_min = 8000,				\
91*4882a593Smuzhiyun 			.rate_max = 176400,				\
92*4882a593Smuzhiyun 		},							\
93*4882a593Smuzhiyun 		.name = #did,						\
94*4882a593Smuzhiyun 		.ops = &q6dma_ops,					\
95*4882a593Smuzhiyun 		.id = did,						\
96*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,				\
97*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,			\
98*4882a593Smuzhiyun 	}
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun struct q6afe_dai_priv_data {
101*4882a593Smuzhiyun 	uint32_t sd_line_mask;
102*4882a593Smuzhiyun 	uint32_t sync_mode;
103*4882a593Smuzhiyun 	uint32_t sync_src;
104*4882a593Smuzhiyun 	uint32_t data_out_enable;
105*4882a593Smuzhiyun 	uint32_t invert_sync;
106*4882a593Smuzhiyun 	uint32_t data_delay;
107*4882a593Smuzhiyun 	uint32_t data_align;
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun struct q6afe_dai_data {
111*4882a593Smuzhiyun 	struct q6afe_port *port[AFE_PORT_MAX];
112*4882a593Smuzhiyun 	struct q6afe_port_config port_config[AFE_PORT_MAX];
113*4882a593Smuzhiyun 	bool is_port_started[AFE_PORT_MAX];
114*4882a593Smuzhiyun 	struct q6afe_dai_priv_data priv[AFE_PORT_MAX];
115*4882a593Smuzhiyun };
116*4882a593Smuzhiyun 
q6slim_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)117*4882a593Smuzhiyun static int q6slim_hw_params(struct snd_pcm_substream *substream,
118*4882a593Smuzhiyun 			    struct snd_pcm_hw_params *params,
119*4882a593Smuzhiyun 			    struct snd_soc_dai *dai)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
123*4882a593Smuzhiyun 	struct q6afe_slim_cfg *slim = &dai_data->port_config[dai->id].slim;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	slim->sample_rate = params_rate(params);
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	switch (params_format(params)) {
128*4882a593Smuzhiyun 	case SNDRV_PCM_FORMAT_S16_LE:
129*4882a593Smuzhiyun 	case SNDRV_PCM_FORMAT_SPECIAL:
130*4882a593Smuzhiyun 		slim->bit_width = 16;
131*4882a593Smuzhiyun 		break;
132*4882a593Smuzhiyun 	case SNDRV_PCM_FORMAT_S24_LE:
133*4882a593Smuzhiyun 		slim->bit_width = 24;
134*4882a593Smuzhiyun 		break;
135*4882a593Smuzhiyun 	case SNDRV_PCM_FORMAT_S32_LE:
136*4882a593Smuzhiyun 		slim->bit_width = 32;
137*4882a593Smuzhiyun 		break;
138*4882a593Smuzhiyun 	default:
139*4882a593Smuzhiyun 		pr_err("%s: format %d\n",
140*4882a593Smuzhiyun 			__func__, params_format(params));
141*4882a593Smuzhiyun 		return -EINVAL;
142*4882a593Smuzhiyun 	}
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	return 0;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun 
q6hdmi_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)147*4882a593Smuzhiyun static int q6hdmi_hw_params(struct snd_pcm_substream *substream,
148*4882a593Smuzhiyun 				struct snd_pcm_hw_params *params,
149*4882a593Smuzhiyun 				struct snd_soc_dai *dai)
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun 	struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
152*4882a593Smuzhiyun 	int channels = params_channels(params);
153*4882a593Smuzhiyun 	struct q6afe_hdmi_cfg *hdmi = &dai_data->port_config[dai->id].hdmi;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	hdmi->sample_rate = params_rate(params);
156*4882a593Smuzhiyun 	switch (params_format(params)) {
157*4882a593Smuzhiyun 	case SNDRV_PCM_FORMAT_S16_LE:
158*4882a593Smuzhiyun 		hdmi->bit_width = 16;
159*4882a593Smuzhiyun 		break;
160*4882a593Smuzhiyun 	case SNDRV_PCM_FORMAT_S24_LE:
161*4882a593Smuzhiyun 		hdmi->bit_width = 24;
162*4882a593Smuzhiyun 		break;
163*4882a593Smuzhiyun 	}
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	/* HDMI spec CEA-861-E: Table 28 Audio InfoFrame Data Byte 4 */
166*4882a593Smuzhiyun 	switch (channels) {
167*4882a593Smuzhiyun 	case 2:
168*4882a593Smuzhiyun 		hdmi->channel_allocation = 0;
169*4882a593Smuzhiyun 		break;
170*4882a593Smuzhiyun 	case 3:
171*4882a593Smuzhiyun 		hdmi->channel_allocation = 0x02;
172*4882a593Smuzhiyun 		break;
173*4882a593Smuzhiyun 	case 4:
174*4882a593Smuzhiyun 		hdmi->channel_allocation = 0x06;
175*4882a593Smuzhiyun 		break;
176*4882a593Smuzhiyun 	case 5:
177*4882a593Smuzhiyun 		hdmi->channel_allocation = 0x0A;
178*4882a593Smuzhiyun 		break;
179*4882a593Smuzhiyun 	case 6:
180*4882a593Smuzhiyun 		hdmi->channel_allocation = 0x0B;
181*4882a593Smuzhiyun 		break;
182*4882a593Smuzhiyun 	case 7:
183*4882a593Smuzhiyun 		hdmi->channel_allocation = 0x12;
184*4882a593Smuzhiyun 		break;
185*4882a593Smuzhiyun 	case 8:
186*4882a593Smuzhiyun 		hdmi->channel_allocation = 0x13;
187*4882a593Smuzhiyun 		break;
188*4882a593Smuzhiyun 	default:
189*4882a593Smuzhiyun 		dev_err(dai->dev, "invalid Channels = %u\n", channels);
190*4882a593Smuzhiyun 		return -EINVAL;
191*4882a593Smuzhiyun 	}
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	return 0;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun 
q6i2s_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)196*4882a593Smuzhiyun static int q6i2s_hw_params(struct snd_pcm_substream *substream,
197*4882a593Smuzhiyun 			   struct snd_pcm_hw_params *params,
198*4882a593Smuzhiyun 			   struct snd_soc_dai *dai)
199*4882a593Smuzhiyun {
200*4882a593Smuzhiyun 	struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
201*4882a593Smuzhiyun 	struct q6afe_i2s_cfg *i2s = &dai_data->port_config[dai->id].i2s_cfg;
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	i2s->sample_rate = params_rate(params);
204*4882a593Smuzhiyun 	i2s->bit_width = params_width(params);
205*4882a593Smuzhiyun 	i2s->num_channels = params_channels(params);
206*4882a593Smuzhiyun 	i2s->sd_line_mask = dai_data->priv[dai->id].sd_line_mask;
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun 	return 0;
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun 
q6i2s_set_fmt(struct snd_soc_dai * dai,unsigned int fmt)211*4882a593Smuzhiyun static int q6i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun 	struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
214*4882a593Smuzhiyun 	struct q6afe_i2s_cfg *i2s = &dai_data->port_config[dai->id].i2s_cfg;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	i2s->fmt = fmt;
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	return 0;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun 
q6tdm_set_tdm_slot(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int slot_width)221*4882a593Smuzhiyun static int q6tdm_set_tdm_slot(struct snd_soc_dai *dai,
222*4882a593Smuzhiyun 				unsigned int tx_mask,
223*4882a593Smuzhiyun 				unsigned int rx_mask,
224*4882a593Smuzhiyun 				int slots, int slot_width)
225*4882a593Smuzhiyun {
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
228*4882a593Smuzhiyun 	struct q6afe_tdm_cfg *tdm = &dai_data->port_config[dai->id].tdm;
229*4882a593Smuzhiyun 	unsigned int cap_mask;
230*4882a593Smuzhiyun 	int rc = 0;
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	/* HW only supports 16 and 32 bit slot width configuration */
233*4882a593Smuzhiyun 	if ((slot_width != 16) && (slot_width != 32)) {
234*4882a593Smuzhiyun 		dev_err(dai->dev, "%s: invalid slot_width %d\n",
235*4882a593Smuzhiyun 			__func__, slot_width);
236*4882a593Smuzhiyun 		return -EINVAL;
237*4882a593Smuzhiyun 	}
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	/* HW supports 1-32 slots configuration. Typical: 1, 2, 4, 8, 16, 32 */
240*4882a593Smuzhiyun 	switch (slots) {
241*4882a593Smuzhiyun 	case 2:
242*4882a593Smuzhiyun 		cap_mask = 0x03;
243*4882a593Smuzhiyun 		break;
244*4882a593Smuzhiyun 	case 4:
245*4882a593Smuzhiyun 		cap_mask = 0x0F;
246*4882a593Smuzhiyun 		break;
247*4882a593Smuzhiyun 	case 8:
248*4882a593Smuzhiyun 		cap_mask = 0xFF;
249*4882a593Smuzhiyun 		break;
250*4882a593Smuzhiyun 	case 16:
251*4882a593Smuzhiyun 		cap_mask = 0xFFFF;
252*4882a593Smuzhiyun 		break;
253*4882a593Smuzhiyun 	default:
254*4882a593Smuzhiyun 		dev_err(dai->dev, "%s: invalid slots %d\n",
255*4882a593Smuzhiyun 			__func__, slots);
256*4882a593Smuzhiyun 		return -EINVAL;
257*4882a593Smuzhiyun 	}
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	switch (dai->id) {
260*4882a593Smuzhiyun 	case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
261*4882a593Smuzhiyun 		tdm->nslots_per_frame = slots;
262*4882a593Smuzhiyun 		tdm->slot_width = slot_width;
263*4882a593Smuzhiyun 		/* TDM RX dais ids are even and tx are odd */
264*4882a593Smuzhiyun 		tdm->slot_mask = (dai->id & 0x1 ? tx_mask : rx_mask) & cap_mask;
265*4882a593Smuzhiyun 		break;
266*4882a593Smuzhiyun 	default:
267*4882a593Smuzhiyun 		dev_err(dai->dev, "%s: invalid dai id 0x%x\n",
268*4882a593Smuzhiyun 			__func__, dai->id);
269*4882a593Smuzhiyun 		return -EINVAL;
270*4882a593Smuzhiyun 	}
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 	return rc;
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun 
q6tdm_set_channel_map(struct snd_soc_dai * dai,unsigned int tx_num,unsigned int * tx_slot,unsigned int rx_num,unsigned int * rx_slot)275*4882a593Smuzhiyun static int q6tdm_set_channel_map(struct snd_soc_dai *dai,
276*4882a593Smuzhiyun 				unsigned int tx_num, unsigned int *tx_slot,
277*4882a593Smuzhiyun 				unsigned int rx_num, unsigned int *rx_slot)
278*4882a593Smuzhiyun {
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
281*4882a593Smuzhiyun 	struct q6afe_tdm_cfg *tdm = &dai_data->port_config[dai->id].tdm;
282*4882a593Smuzhiyun 	int rc = 0;
283*4882a593Smuzhiyun 	int i = 0;
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	switch (dai->id) {
286*4882a593Smuzhiyun 	case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
287*4882a593Smuzhiyun 		if (dai->id & 0x1) {
288*4882a593Smuzhiyun 			if (!tx_slot) {
289*4882a593Smuzhiyun 				dev_err(dai->dev, "tx slot not found\n");
290*4882a593Smuzhiyun 				return -EINVAL;
291*4882a593Smuzhiyun 			}
292*4882a593Smuzhiyun 			if (tx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
293*4882a593Smuzhiyun 				dev_err(dai->dev, "invalid tx num %d\n",
294*4882a593Smuzhiyun 					tx_num);
295*4882a593Smuzhiyun 				return -EINVAL;
296*4882a593Smuzhiyun 			}
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 			for (i = 0; i < tx_num; i++)
299*4882a593Smuzhiyun 				tdm->ch_mapping[i] = tx_slot[i];
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 			for (i = tx_num; i < AFE_PORT_MAX_AUDIO_CHAN_CNT; i++)
302*4882a593Smuzhiyun 				tdm->ch_mapping[i] = Q6AFE_CMAP_INVALID;
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 			tdm->num_channels = tx_num;
305*4882a593Smuzhiyun 		} else {
306*4882a593Smuzhiyun 			/* rx */
307*4882a593Smuzhiyun 			if (!rx_slot) {
308*4882a593Smuzhiyun 				dev_err(dai->dev, "rx slot not found\n");
309*4882a593Smuzhiyun 				return -EINVAL;
310*4882a593Smuzhiyun 			}
311*4882a593Smuzhiyun 			if (rx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
312*4882a593Smuzhiyun 				dev_err(dai->dev, "invalid rx num %d\n",
313*4882a593Smuzhiyun 					rx_num);
314*4882a593Smuzhiyun 				return -EINVAL;
315*4882a593Smuzhiyun 			}
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 			for (i = 0; i < rx_num; i++)
318*4882a593Smuzhiyun 				tdm->ch_mapping[i] = rx_slot[i];
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 			for (i = rx_num; i < AFE_PORT_MAX_AUDIO_CHAN_CNT; i++)
321*4882a593Smuzhiyun 				tdm->ch_mapping[i] = Q6AFE_CMAP_INVALID;
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 			tdm->num_channels = rx_num;
324*4882a593Smuzhiyun 		}
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 		break;
327*4882a593Smuzhiyun 	default:
328*4882a593Smuzhiyun 		dev_err(dai->dev, "%s: invalid dai id 0x%x\n",
329*4882a593Smuzhiyun 			__func__, dai->id);
330*4882a593Smuzhiyun 		return -EINVAL;
331*4882a593Smuzhiyun 	}
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	return rc;
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun 
q6tdm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)336*4882a593Smuzhiyun static int q6tdm_hw_params(struct snd_pcm_substream *substream,
337*4882a593Smuzhiyun 			   struct snd_pcm_hw_params *params,
338*4882a593Smuzhiyun 			   struct snd_soc_dai *dai)
339*4882a593Smuzhiyun {
340*4882a593Smuzhiyun 	struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
341*4882a593Smuzhiyun 	struct q6afe_tdm_cfg *tdm = &dai_data->port_config[dai->id].tdm;
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	tdm->bit_width = params_width(params);
344*4882a593Smuzhiyun 	tdm->sample_rate = params_rate(params);
345*4882a593Smuzhiyun 	tdm->num_channels = params_channels(params);
346*4882a593Smuzhiyun 	tdm->data_align_type = dai_data->priv[dai->id].data_align;
347*4882a593Smuzhiyun 	tdm->sync_src = dai_data->priv[dai->id].sync_src;
348*4882a593Smuzhiyun 	tdm->sync_mode = dai_data->priv[dai->id].sync_mode;
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 	return 0;
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun 
q6dma_set_channel_map(struct snd_soc_dai * dai,unsigned int tx_num,unsigned int * tx_ch_mask,unsigned int rx_num,unsigned int * rx_ch_mask)353*4882a593Smuzhiyun static int q6dma_set_channel_map(struct snd_soc_dai *dai,
354*4882a593Smuzhiyun 				 unsigned int tx_num, unsigned int *tx_ch_mask,
355*4882a593Smuzhiyun 				 unsigned int rx_num, unsigned int *rx_ch_mask)
356*4882a593Smuzhiyun {
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
359*4882a593Smuzhiyun 	struct q6afe_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg;
360*4882a593Smuzhiyun 	int ch_mask;
361*4882a593Smuzhiyun 	int rc = 0;
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	switch (dai->id) {
364*4882a593Smuzhiyun 	case WSA_CODEC_DMA_TX_0:
365*4882a593Smuzhiyun 	case WSA_CODEC_DMA_TX_1:
366*4882a593Smuzhiyun 	case WSA_CODEC_DMA_TX_2:
367*4882a593Smuzhiyun 	case VA_CODEC_DMA_TX_0:
368*4882a593Smuzhiyun 	case VA_CODEC_DMA_TX_1:
369*4882a593Smuzhiyun 	case VA_CODEC_DMA_TX_2:
370*4882a593Smuzhiyun 	case TX_CODEC_DMA_TX_0:
371*4882a593Smuzhiyun 	case TX_CODEC_DMA_TX_1:
372*4882a593Smuzhiyun 	case TX_CODEC_DMA_TX_2:
373*4882a593Smuzhiyun 	case TX_CODEC_DMA_TX_3:
374*4882a593Smuzhiyun 	case TX_CODEC_DMA_TX_4:
375*4882a593Smuzhiyun 	case TX_CODEC_DMA_TX_5:
376*4882a593Smuzhiyun 		if (!tx_ch_mask) {
377*4882a593Smuzhiyun 			dev_err(dai->dev, "tx slot not found\n");
378*4882a593Smuzhiyun 			return -EINVAL;
379*4882a593Smuzhiyun 		}
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 		if (tx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
382*4882a593Smuzhiyun 			dev_err(dai->dev, "invalid tx num %d\n",
383*4882a593Smuzhiyun 				tx_num);
384*4882a593Smuzhiyun 			return -EINVAL;
385*4882a593Smuzhiyun 		}
386*4882a593Smuzhiyun 		ch_mask = *tx_ch_mask;
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun 		break;
389*4882a593Smuzhiyun 	case WSA_CODEC_DMA_RX_0:
390*4882a593Smuzhiyun 	case WSA_CODEC_DMA_RX_1:
391*4882a593Smuzhiyun 	case RX_CODEC_DMA_RX_0:
392*4882a593Smuzhiyun 	case RX_CODEC_DMA_RX_1:
393*4882a593Smuzhiyun 	case RX_CODEC_DMA_RX_2:
394*4882a593Smuzhiyun 	case RX_CODEC_DMA_RX_3:
395*4882a593Smuzhiyun 	case RX_CODEC_DMA_RX_4:
396*4882a593Smuzhiyun 	case RX_CODEC_DMA_RX_5:
397*4882a593Smuzhiyun 	case RX_CODEC_DMA_RX_6:
398*4882a593Smuzhiyun 	case RX_CODEC_DMA_RX_7:
399*4882a593Smuzhiyun 		/* rx */
400*4882a593Smuzhiyun 		if (!rx_ch_mask) {
401*4882a593Smuzhiyun 			dev_err(dai->dev, "rx slot not found\n");
402*4882a593Smuzhiyun 			return -EINVAL;
403*4882a593Smuzhiyun 		}
404*4882a593Smuzhiyun 		if (rx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
405*4882a593Smuzhiyun 			dev_err(dai->dev, "invalid rx num %d\n",
406*4882a593Smuzhiyun 				rx_num);
407*4882a593Smuzhiyun 			return -EINVAL;
408*4882a593Smuzhiyun 		}
409*4882a593Smuzhiyun 		ch_mask = *rx_ch_mask;
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun 		break;
412*4882a593Smuzhiyun 	default:
413*4882a593Smuzhiyun 		dev_err(dai->dev, "%s: invalid dai id 0x%x\n",
414*4882a593Smuzhiyun 			__func__, dai->id);
415*4882a593Smuzhiyun 		return -EINVAL;
416*4882a593Smuzhiyun 	}
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun 	cfg->active_channels_mask = ch_mask;
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 	return rc;
421*4882a593Smuzhiyun }
422*4882a593Smuzhiyun 
q6dma_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)423*4882a593Smuzhiyun static int q6dma_hw_params(struct snd_pcm_substream *substream,
424*4882a593Smuzhiyun 			   struct snd_pcm_hw_params *params,
425*4882a593Smuzhiyun 			   struct snd_soc_dai *dai)
426*4882a593Smuzhiyun {
427*4882a593Smuzhiyun 	struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
428*4882a593Smuzhiyun 	struct q6afe_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg;
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun 	cfg->bit_width = params_width(params);
431*4882a593Smuzhiyun 	cfg->sample_rate = params_rate(params);
432*4882a593Smuzhiyun 	cfg->num_channels = params_channels(params);
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 	return 0;
435*4882a593Smuzhiyun }
q6afe_dai_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)436*4882a593Smuzhiyun static void q6afe_dai_shutdown(struct snd_pcm_substream *substream,
437*4882a593Smuzhiyun 				struct snd_soc_dai *dai)
438*4882a593Smuzhiyun {
439*4882a593Smuzhiyun 	struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
440*4882a593Smuzhiyun 	int rc;
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 	if (!dai_data->is_port_started[dai->id])
443*4882a593Smuzhiyun 		return;
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun 	rc = q6afe_port_stop(dai_data->port[dai->id]);
446*4882a593Smuzhiyun 	if (rc < 0)
447*4882a593Smuzhiyun 		dev_err(dai->dev, "fail to close AFE port (%d)\n", rc);
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 	dai_data->is_port_started[dai->id] = false;
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun 
q6afe_dai_prepare(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)453*4882a593Smuzhiyun static int q6afe_dai_prepare(struct snd_pcm_substream *substream,
454*4882a593Smuzhiyun 		struct snd_soc_dai *dai)
455*4882a593Smuzhiyun {
456*4882a593Smuzhiyun 	struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
457*4882a593Smuzhiyun 	int rc;
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun 	if (dai_data->is_port_started[dai->id]) {
460*4882a593Smuzhiyun 		/* stop the port and restart with new port config */
461*4882a593Smuzhiyun 		rc = q6afe_port_stop(dai_data->port[dai->id]);
462*4882a593Smuzhiyun 		if (rc < 0) {
463*4882a593Smuzhiyun 			dev_err(dai->dev, "fail to close AFE port (%d)\n", rc);
464*4882a593Smuzhiyun 			return rc;
465*4882a593Smuzhiyun 		}
466*4882a593Smuzhiyun 	}
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun 	switch (dai->id) {
469*4882a593Smuzhiyun 	case HDMI_RX:
470*4882a593Smuzhiyun 	case DISPLAY_PORT_RX:
471*4882a593Smuzhiyun 		q6afe_hdmi_port_prepare(dai_data->port[dai->id],
472*4882a593Smuzhiyun 					&dai_data->port_config[dai->id].hdmi);
473*4882a593Smuzhiyun 		break;
474*4882a593Smuzhiyun 	case SLIMBUS_0_RX ... SLIMBUS_6_TX:
475*4882a593Smuzhiyun 		q6afe_slim_port_prepare(dai_data->port[dai->id],
476*4882a593Smuzhiyun 					&dai_data->port_config[dai->id].slim);
477*4882a593Smuzhiyun 		break;
478*4882a593Smuzhiyun 	case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX:
479*4882a593Smuzhiyun 		rc = q6afe_i2s_port_prepare(dai_data->port[dai->id],
480*4882a593Smuzhiyun 			       &dai_data->port_config[dai->id].i2s_cfg);
481*4882a593Smuzhiyun 		if (rc < 0) {
482*4882a593Smuzhiyun 			dev_err(dai->dev, "fail to prepare AFE port %x\n",
483*4882a593Smuzhiyun 				dai->id);
484*4882a593Smuzhiyun 			return rc;
485*4882a593Smuzhiyun 		}
486*4882a593Smuzhiyun 		break;
487*4882a593Smuzhiyun 	case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
488*4882a593Smuzhiyun 		q6afe_tdm_port_prepare(dai_data->port[dai->id],
489*4882a593Smuzhiyun 					&dai_data->port_config[dai->id].tdm);
490*4882a593Smuzhiyun 		break;
491*4882a593Smuzhiyun 	case WSA_CODEC_DMA_RX_0 ... RX_CODEC_DMA_RX_7:
492*4882a593Smuzhiyun 		q6afe_cdc_dma_port_prepare(dai_data->port[dai->id],
493*4882a593Smuzhiyun 					   &dai_data->port_config[dai->id].dma_cfg);
494*4882a593Smuzhiyun 		break;
495*4882a593Smuzhiyun 	default:
496*4882a593Smuzhiyun 		return -EINVAL;
497*4882a593Smuzhiyun 	}
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 	rc = q6afe_port_start(dai_data->port[dai->id]);
500*4882a593Smuzhiyun 	if (rc < 0) {
501*4882a593Smuzhiyun 		dev_err(dai->dev, "fail to start AFE port %x\n", dai->id);
502*4882a593Smuzhiyun 		return rc;
503*4882a593Smuzhiyun 	}
504*4882a593Smuzhiyun 	dai_data->is_port_started[dai->id] = true;
505*4882a593Smuzhiyun 
506*4882a593Smuzhiyun 	return 0;
507*4882a593Smuzhiyun }
508*4882a593Smuzhiyun 
q6slim_set_channel_map(struct snd_soc_dai * dai,unsigned int tx_num,unsigned int * tx_slot,unsigned int rx_num,unsigned int * rx_slot)509*4882a593Smuzhiyun static int q6slim_set_channel_map(struct snd_soc_dai *dai,
510*4882a593Smuzhiyun 				unsigned int tx_num, unsigned int *tx_slot,
511*4882a593Smuzhiyun 				unsigned int rx_num, unsigned int *rx_slot)
512*4882a593Smuzhiyun {
513*4882a593Smuzhiyun 	struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
514*4882a593Smuzhiyun 	struct q6afe_port_config *pcfg = &dai_data->port_config[dai->id];
515*4882a593Smuzhiyun 	int i;
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun 	if (dai->id & 0x1) {
518*4882a593Smuzhiyun 		/* TX */
519*4882a593Smuzhiyun 		if (!tx_slot) {
520*4882a593Smuzhiyun 			pr_err("%s: tx slot not found\n", __func__);
521*4882a593Smuzhiyun 			return -EINVAL;
522*4882a593Smuzhiyun 		}
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun 		for (i = 0; i < tx_num; i++)
525*4882a593Smuzhiyun 			pcfg->slim.ch_mapping[i] = tx_slot[i];
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun 		pcfg->slim.num_channels = tx_num;
528*4882a593Smuzhiyun 
529*4882a593Smuzhiyun 
530*4882a593Smuzhiyun 	} else {
531*4882a593Smuzhiyun 		if (!rx_slot) {
532*4882a593Smuzhiyun 			pr_err("%s: rx slot not found\n", __func__);
533*4882a593Smuzhiyun 			return -EINVAL;
534*4882a593Smuzhiyun 		}
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun 		for (i = 0; i < rx_num; i++)
537*4882a593Smuzhiyun 			pcfg->slim.ch_mapping[i] =   rx_slot[i];
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun 		pcfg->slim.num_channels = rx_num;
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun 	}
542*4882a593Smuzhiyun 
543*4882a593Smuzhiyun 	return 0;
544*4882a593Smuzhiyun }
545*4882a593Smuzhiyun 
q6afe_mi2s_set_sysclk(struct snd_soc_dai * dai,int clk_id,unsigned int freq,int dir)546*4882a593Smuzhiyun static int q6afe_mi2s_set_sysclk(struct snd_soc_dai *dai,
547*4882a593Smuzhiyun 		int clk_id, unsigned int freq, int dir)
548*4882a593Smuzhiyun {
549*4882a593Smuzhiyun 	struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
550*4882a593Smuzhiyun 	struct q6afe_port *port = dai_data->port[dai->id];
551*4882a593Smuzhiyun 
552*4882a593Smuzhiyun 	switch (clk_id) {
553*4882a593Smuzhiyun 	case LPAIF_DIG_CLK:
554*4882a593Smuzhiyun 		return q6afe_port_set_sysclk(port, clk_id, 0, 5, freq, dir);
555*4882a593Smuzhiyun 	case LPAIF_BIT_CLK:
556*4882a593Smuzhiyun 	case LPAIF_OSR_CLK:
557*4882a593Smuzhiyun 		return q6afe_port_set_sysclk(port, clk_id,
558*4882a593Smuzhiyun 					     Q6AFE_LPASS_CLK_SRC_INTERNAL,
559*4882a593Smuzhiyun 					     Q6AFE_LPASS_CLK_ROOT_DEFAULT,
560*4882a593Smuzhiyun 					     freq, dir);
561*4882a593Smuzhiyun 	case Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT ... Q6AFE_LPASS_CLK_ID_QUI_MI2S_OSR:
562*4882a593Smuzhiyun 	case Q6AFE_LPASS_CLK_ID_MCLK_1 ... Q6AFE_LPASS_CLK_ID_INT_MCLK_1:
563*4882a593Smuzhiyun 	case Q6AFE_LPASS_CLK_ID_WSA_CORE_MCLK ... Q6AFE_LPASS_CLK_ID_VA_CORE_2X_MCLK:
564*4882a593Smuzhiyun 		return q6afe_port_set_sysclk(port, clk_id,
565*4882a593Smuzhiyun 					     Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
566*4882a593Smuzhiyun 					     Q6AFE_LPASS_CLK_ROOT_DEFAULT,
567*4882a593Smuzhiyun 					     freq, dir);
568*4882a593Smuzhiyun 	case Q6AFE_LPASS_CLK_ID_PRI_TDM_IBIT ... Q6AFE_LPASS_CLK_ID_QUIN_TDM_EBIT:
569*4882a593Smuzhiyun 		return q6afe_port_set_sysclk(port, clk_id,
570*4882a593Smuzhiyun 					     Q6AFE_LPASS_CLK_ATTRIBUTE_INVERT_COUPLE_NO,
571*4882a593Smuzhiyun 					     Q6AFE_LPASS_CLK_ROOT_DEFAULT,
572*4882a593Smuzhiyun 					     freq, dir);
573*4882a593Smuzhiyun 	}
574*4882a593Smuzhiyun 
575*4882a593Smuzhiyun 	return 0;
576*4882a593Smuzhiyun }
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun static const struct snd_soc_dapm_route q6afe_dapm_routes[] = {
579*4882a593Smuzhiyun 	{"HDMI Playback", NULL, "HDMI_RX"},
580*4882a593Smuzhiyun 	{"Display Port Playback", NULL, "DISPLAY_PORT_RX"},
581*4882a593Smuzhiyun 	{"Slimbus Playback", NULL, "SLIMBUS_0_RX"},
582*4882a593Smuzhiyun 	{"Slimbus1 Playback", NULL, "SLIMBUS_1_RX"},
583*4882a593Smuzhiyun 	{"Slimbus2 Playback", NULL, "SLIMBUS_2_RX"},
584*4882a593Smuzhiyun 	{"Slimbus3 Playback", NULL, "SLIMBUS_3_RX"},
585*4882a593Smuzhiyun 	{"Slimbus4 Playback", NULL, "SLIMBUS_4_RX"},
586*4882a593Smuzhiyun 	{"Slimbus5 Playback", NULL, "SLIMBUS_5_RX"},
587*4882a593Smuzhiyun 	{"Slimbus6 Playback", NULL, "SLIMBUS_6_RX"},
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun 	{"SLIMBUS_0_TX", NULL, "Slimbus Capture"},
590*4882a593Smuzhiyun 	{"SLIMBUS_1_TX", NULL, "Slimbus1 Capture"},
591*4882a593Smuzhiyun 	{"SLIMBUS_2_TX", NULL, "Slimbus2 Capture"},
592*4882a593Smuzhiyun 	{"SLIMBUS_3_TX", NULL, "Slimbus3 Capture"},
593*4882a593Smuzhiyun 	{"SLIMBUS_4_TX", NULL, "Slimbus4 Capture"},
594*4882a593Smuzhiyun 	{"SLIMBUS_5_TX", NULL, "Slimbus5 Capture"},
595*4882a593Smuzhiyun 	{"SLIMBUS_6_TX", NULL, "Slimbus6 Capture"},
596*4882a593Smuzhiyun 
597*4882a593Smuzhiyun 	{"Primary MI2S Playback", NULL, "PRI_MI2S_RX"},
598*4882a593Smuzhiyun 	{"Secondary MI2S Playback", NULL, "SEC_MI2S_RX"},
599*4882a593Smuzhiyun 	{"Tertiary MI2S Playback", NULL, "TERT_MI2S_RX"},
600*4882a593Smuzhiyun 	{"Quaternary MI2S Playback", NULL, "QUAT_MI2S_RX"},
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun 	{"Primary TDM0 Playback", NULL, "PRIMARY_TDM_RX_0"},
603*4882a593Smuzhiyun 	{"Primary TDM1 Playback", NULL, "PRIMARY_TDM_RX_1"},
604*4882a593Smuzhiyun 	{"Primary TDM2 Playback", NULL, "PRIMARY_TDM_RX_2"},
605*4882a593Smuzhiyun 	{"Primary TDM3 Playback", NULL, "PRIMARY_TDM_RX_3"},
606*4882a593Smuzhiyun 	{"Primary TDM4 Playback", NULL, "PRIMARY_TDM_RX_4"},
607*4882a593Smuzhiyun 	{"Primary TDM5 Playback", NULL, "PRIMARY_TDM_RX_5"},
608*4882a593Smuzhiyun 	{"Primary TDM6 Playback", NULL, "PRIMARY_TDM_RX_6"},
609*4882a593Smuzhiyun 	{"Primary TDM7 Playback", NULL, "PRIMARY_TDM_RX_7"},
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 	{"Secondary TDM0 Playback", NULL, "SEC_TDM_RX_0"},
612*4882a593Smuzhiyun 	{"Secondary TDM1 Playback", NULL, "SEC_TDM_RX_1"},
613*4882a593Smuzhiyun 	{"Secondary TDM2 Playback", NULL, "SEC_TDM_RX_2"},
614*4882a593Smuzhiyun 	{"Secondary TDM3 Playback", NULL, "SEC_TDM_RX_3"},
615*4882a593Smuzhiyun 	{"Secondary TDM4 Playback", NULL, "SEC_TDM_RX_4"},
616*4882a593Smuzhiyun 	{"Secondary TDM5 Playback", NULL, "SEC_TDM_RX_5"},
617*4882a593Smuzhiyun 	{"Secondary TDM6 Playback", NULL, "SEC_TDM_RX_6"},
618*4882a593Smuzhiyun 	{"Secondary TDM7 Playback", NULL, "SEC_TDM_RX_7"},
619*4882a593Smuzhiyun 
620*4882a593Smuzhiyun 	{"Tertiary TDM0 Playback", NULL, "TERT_TDM_RX_0"},
621*4882a593Smuzhiyun 	{"Tertiary TDM1 Playback", NULL, "TERT_TDM_RX_1"},
622*4882a593Smuzhiyun 	{"Tertiary TDM2 Playback", NULL, "TERT_TDM_RX_2"},
623*4882a593Smuzhiyun 	{"Tertiary TDM3 Playback", NULL, "TERT_TDM_RX_3"},
624*4882a593Smuzhiyun 	{"Tertiary TDM4 Playback", NULL, "TERT_TDM_RX_4"},
625*4882a593Smuzhiyun 	{"Tertiary TDM5 Playback", NULL, "TERT_TDM_RX_5"},
626*4882a593Smuzhiyun 	{"Tertiary TDM6 Playback", NULL, "TERT_TDM_RX_6"},
627*4882a593Smuzhiyun 	{"Tertiary TDM7 Playback", NULL, "TERT_TDM_RX_7"},
628*4882a593Smuzhiyun 
629*4882a593Smuzhiyun 	{"Quaternary TDM0 Playback", NULL, "QUAT_TDM_RX_0"},
630*4882a593Smuzhiyun 	{"Quaternary TDM1 Playback", NULL, "QUAT_TDM_RX_1"},
631*4882a593Smuzhiyun 	{"Quaternary TDM2 Playback", NULL, "QUAT_TDM_RX_2"},
632*4882a593Smuzhiyun 	{"Quaternary TDM3 Playback", NULL, "QUAT_TDM_RX_3"},
633*4882a593Smuzhiyun 	{"Quaternary TDM4 Playback", NULL, "QUAT_TDM_RX_4"},
634*4882a593Smuzhiyun 	{"Quaternary TDM5 Playback", NULL, "QUAT_TDM_RX_5"},
635*4882a593Smuzhiyun 	{"Quaternary TDM6 Playback", NULL, "QUAT_TDM_RX_6"},
636*4882a593Smuzhiyun 	{"Quaternary TDM7 Playback", NULL, "QUAT_TDM_RX_7"},
637*4882a593Smuzhiyun 
638*4882a593Smuzhiyun 	{"Quinary TDM0 Playback", NULL, "QUIN_TDM_RX_0"},
639*4882a593Smuzhiyun 	{"Quinary TDM1 Playback", NULL, "QUIN_TDM_RX_1"},
640*4882a593Smuzhiyun 	{"Quinary TDM2 Playback", NULL, "QUIN_TDM_RX_2"},
641*4882a593Smuzhiyun 	{"Quinary TDM3 Playback", NULL, "QUIN_TDM_RX_3"},
642*4882a593Smuzhiyun 	{"Quinary TDM4 Playback", NULL, "QUIN_TDM_RX_4"},
643*4882a593Smuzhiyun 	{"Quinary TDM5 Playback", NULL, "QUIN_TDM_RX_5"},
644*4882a593Smuzhiyun 	{"Quinary TDM6 Playback", NULL, "QUIN_TDM_RX_6"},
645*4882a593Smuzhiyun 	{"Quinary TDM7 Playback", NULL, "QUIN_TDM_RX_7"},
646*4882a593Smuzhiyun 
647*4882a593Smuzhiyun 	{"PRIMARY_TDM_TX_0", NULL, "Primary TDM0 Capture"},
648*4882a593Smuzhiyun 	{"PRIMARY_TDM_TX_1", NULL, "Primary TDM1 Capture"},
649*4882a593Smuzhiyun 	{"PRIMARY_TDM_TX_2", NULL, "Primary TDM2 Capture"},
650*4882a593Smuzhiyun 	{"PRIMARY_TDM_TX_3", NULL, "Primary TDM3 Capture"},
651*4882a593Smuzhiyun 	{"PRIMARY_TDM_TX_4", NULL, "Primary TDM4 Capture"},
652*4882a593Smuzhiyun 	{"PRIMARY_TDM_TX_5", NULL, "Primary TDM5 Capture"},
653*4882a593Smuzhiyun 	{"PRIMARY_TDM_TX_6", NULL, "Primary TDM6 Capture"},
654*4882a593Smuzhiyun 	{"PRIMARY_TDM_TX_7", NULL, "Primary TDM7 Capture"},
655*4882a593Smuzhiyun 
656*4882a593Smuzhiyun 	{"SEC_TDM_TX_0", NULL, "Secondary TDM0 Capture"},
657*4882a593Smuzhiyun 	{"SEC_TDM_TX_1", NULL, "Secondary TDM1 Capture"},
658*4882a593Smuzhiyun 	{"SEC_TDM_TX_2", NULL, "Secondary TDM2 Capture"},
659*4882a593Smuzhiyun 	{"SEC_TDM_TX_3", NULL, "Secondary TDM3 Capture"},
660*4882a593Smuzhiyun 	{"SEC_TDM_TX_4", NULL, "Secondary TDM4 Capture"},
661*4882a593Smuzhiyun 	{"SEC_TDM_TX_5", NULL, "Secondary TDM5 Capture"},
662*4882a593Smuzhiyun 	{"SEC_TDM_TX_6", NULL, "Secondary TDM6 Capture"},
663*4882a593Smuzhiyun 	{"SEC_TDM_TX_7", NULL, "Secondary TDM7 Capture"},
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun 	{"TERT_TDM_TX_0", NULL, "Tertiary TDM0 Capture"},
666*4882a593Smuzhiyun 	{"TERT_TDM_TX_1", NULL, "Tertiary TDM1 Capture"},
667*4882a593Smuzhiyun 	{"TERT_TDM_TX_2", NULL, "Tertiary TDM2 Capture"},
668*4882a593Smuzhiyun 	{"TERT_TDM_TX_3", NULL, "Tertiary TDM3 Capture"},
669*4882a593Smuzhiyun 	{"TERT_TDM_TX_4", NULL, "Tertiary TDM4 Capture"},
670*4882a593Smuzhiyun 	{"TERT_TDM_TX_5", NULL, "Tertiary TDM5 Capture"},
671*4882a593Smuzhiyun 	{"TERT_TDM_TX_6", NULL, "Tertiary TDM6 Capture"},
672*4882a593Smuzhiyun 	{"TERT_TDM_TX_7", NULL, "Tertiary TDM7 Capture"},
673*4882a593Smuzhiyun 
674*4882a593Smuzhiyun 	{"QUAT_TDM_TX_0", NULL, "Quaternary TDM0 Capture"},
675*4882a593Smuzhiyun 	{"QUAT_TDM_TX_1", NULL, "Quaternary TDM1 Capture"},
676*4882a593Smuzhiyun 	{"QUAT_TDM_TX_2", NULL, "Quaternary TDM2 Capture"},
677*4882a593Smuzhiyun 	{"QUAT_TDM_TX_3", NULL, "Quaternary TDM3 Capture"},
678*4882a593Smuzhiyun 	{"QUAT_TDM_TX_4", NULL, "Quaternary TDM4 Capture"},
679*4882a593Smuzhiyun 	{"QUAT_TDM_TX_5", NULL, "Quaternary TDM5 Capture"},
680*4882a593Smuzhiyun 	{"QUAT_TDM_TX_6", NULL, "Quaternary TDM6 Capture"},
681*4882a593Smuzhiyun 	{"QUAT_TDM_TX_7", NULL, "Quaternary TDM7 Capture"},
682*4882a593Smuzhiyun 
683*4882a593Smuzhiyun 	{"QUIN_TDM_TX_0", NULL, "Quinary TDM0 Capture"},
684*4882a593Smuzhiyun 	{"QUIN_TDM_TX_1", NULL, "Quinary TDM1 Capture"},
685*4882a593Smuzhiyun 	{"QUIN_TDM_TX_2", NULL, "Quinary TDM2 Capture"},
686*4882a593Smuzhiyun 	{"QUIN_TDM_TX_3", NULL, "Quinary TDM3 Capture"},
687*4882a593Smuzhiyun 	{"QUIN_TDM_TX_4", NULL, "Quinary TDM4 Capture"},
688*4882a593Smuzhiyun 	{"QUIN_TDM_TX_5", NULL, "Quinary TDM5 Capture"},
689*4882a593Smuzhiyun 	{"QUIN_TDM_TX_6", NULL, "Quinary TDM6 Capture"},
690*4882a593Smuzhiyun 	{"QUIN_TDM_TX_7", NULL, "Quinary TDM7 Capture"},
691*4882a593Smuzhiyun 
692*4882a593Smuzhiyun 	{"TERT_MI2S_TX", NULL, "Tertiary MI2S Capture"},
693*4882a593Smuzhiyun 	{"PRI_MI2S_TX", NULL, "Primary MI2S Capture"},
694*4882a593Smuzhiyun 	{"SEC_MI2S_TX", NULL, "Secondary MI2S Capture"},
695*4882a593Smuzhiyun 	{"QUAT_MI2S_TX", NULL, "Quaternary MI2S Capture"},
696*4882a593Smuzhiyun 
697*4882a593Smuzhiyun 	{"WSA_CODEC_DMA_RX_0 Playback", NULL, "WSA_CODEC_DMA_RX_0"},
698*4882a593Smuzhiyun 	{"WSA_CODEC_DMA_TX_0", NULL, "WSA_CODEC_DMA_TX_0 Capture"},
699*4882a593Smuzhiyun 	{"WSA_CODEC_DMA_RX_1 Playback", NULL, "WSA_CODEC_DMA_RX_1"},
700*4882a593Smuzhiyun 	{"WSA_CODEC_DMA_TX_1", NULL, "WSA_CODEC_DMA_TX_1 Capture"},
701*4882a593Smuzhiyun 	{"WSA_CODEC_DMA_TX_2", NULL, "WSA_CODEC_DMA_TX_2 Capture"},
702*4882a593Smuzhiyun 	{"VA_CODEC_DMA_TX_0", NULL, "VA_CODEC_DMA_TX_0 Capture"},
703*4882a593Smuzhiyun 	{"VA_CODEC_DMA_TX_1", NULL, "VA_CODEC_DMA_TX_1 Capture"},
704*4882a593Smuzhiyun 	{"VA_CODEC_DMA_TX_2", NULL, "VA_CODEC_DMA_TX_2 Capture"},
705*4882a593Smuzhiyun 	{"RX_CODEC_DMA_RX_0 Playback", NULL, "RX_CODEC_DMA_RX_0"},
706*4882a593Smuzhiyun 	{"TX_CODEC_DMA_TX_0", NULL, "TX_CODEC_DMA_TX_0 Capture"},
707*4882a593Smuzhiyun 	{"RX_CODEC_DMA_RX_1 Playback", NULL, "RX_CODEC_DMA_RX_1"},
708*4882a593Smuzhiyun 	{"TX_CODEC_DMA_TX_1", NULL, "TX_CODEC_DMA_TX_1 Capture"},
709*4882a593Smuzhiyun 	{"RX_CODEC_DMA_RX_2 Playback", NULL, "RX_CODEC_DMA_RX_2"},
710*4882a593Smuzhiyun 	{"TX_CODEC_DMA_TX_2", NULL, "TX_CODEC_DMA_TX_2 Capture"},
711*4882a593Smuzhiyun 	{"RX_CODEC_DMA_RX_3 Playback", NULL, "RX_CODEC_DMA_RX_3"},
712*4882a593Smuzhiyun 	{"TX_CODEC_DMA_TX_3", NULL, "TX_CODEC_DMA_TX_3 Capture"},
713*4882a593Smuzhiyun 	{"RX_CODEC_DMA_RX_4 Playback", NULL, "RX_CODEC_DMA_RX_4"},
714*4882a593Smuzhiyun 	{"TX_CODEC_DMA_TX_4", NULL, "TX_CODEC_DMA_TX_4 Capture"},
715*4882a593Smuzhiyun 	{"RX_CODEC_DMA_RX_5 Playback", NULL, "RX_CODEC_DMA_RX_5"},
716*4882a593Smuzhiyun 	{"TX_CODEC_DMA_TX_5", NULL, "TX_CODEC_DMA_TX_5 Capture"},
717*4882a593Smuzhiyun 	{"RX_CODEC_DMA_RX_6 Playback", NULL, "RX_CODEC_DMA_RX_6"},
718*4882a593Smuzhiyun 	{"RX_CODEC_DMA_RX_7 Playback", NULL, "RX_CODEC_DMA_RX_7"},
719*4882a593Smuzhiyun };
720*4882a593Smuzhiyun 
721*4882a593Smuzhiyun static const struct snd_soc_dai_ops q6hdmi_ops = {
722*4882a593Smuzhiyun 	.prepare	= q6afe_dai_prepare,
723*4882a593Smuzhiyun 	.hw_params	= q6hdmi_hw_params,
724*4882a593Smuzhiyun 	.shutdown	= q6afe_dai_shutdown,
725*4882a593Smuzhiyun };
726*4882a593Smuzhiyun 
727*4882a593Smuzhiyun static const struct snd_soc_dai_ops q6i2s_ops = {
728*4882a593Smuzhiyun 	.prepare	= q6afe_dai_prepare,
729*4882a593Smuzhiyun 	.hw_params	= q6i2s_hw_params,
730*4882a593Smuzhiyun 	.set_fmt	= q6i2s_set_fmt,
731*4882a593Smuzhiyun 	.shutdown	= q6afe_dai_shutdown,
732*4882a593Smuzhiyun 	.set_sysclk	= q6afe_mi2s_set_sysclk,
733*4882a593Smuzhiyun };
734*4882a593Smuzhiyun 
735*4882a593Smuzhiyun static const struct snd_soc_dai_ops q6slim_ops = {
736*4882a593Smuzhiyun 	.prepare	= q6afe_dai_prepare,
737*4882a593Smuzhiyun 	.hw_params	= q6slim_hw_params,
738*4882a593Smuzhiyun 	.shutdown	= q6afe_dai_shutdown,
739*4882a593Smuzhiyun 	.set_channel_map = q6slim_set_channel_map,
740*4882a593Smuzhiyun };
741*4882a593Smuzhiyun 
742*4882a593Smuzhiyun static const struct snd_soc_dai_ops q6tdm_ops = {
743*4882a593Smuzhiyun 	.prepare	= q6afe_dai_prepare,
744*4882a593Smuzhiyun 	.shutdown	= q6afe_dai_shutdown,
745*4882a593Smuzhiyun 	.set_sysclk	= q6afe_mi2s_set_sysclk,
746*4882a593Smuzhiyun 	.set_tdm_slot     = q6tdm_set_tdm_slot,
747*4882a593Smuzhiyun 	.set_channel_map  = q6tdm_set_channel_map,
748*4882a593Smuzhiyun 	.hw_params        = q6tdm_hw_params,
749*4882a593Smuzhiyun };
750*4882a593Smuzhiyun 
751*4882a593Smuzhiyun static const struct snd_soc_dai_ops q6dma_ops = {
752*4882a593Smuzhiyun 	.prepare	= q6afe_dai_prepare,
753*4882a593Smuzhiyun 	.shutdown	= q6afe_dai_shutdown,
754*4882a593Smuzhiyun 	.set_sysclk	= q6afe_mi2s_set_sysclk,
755*4882a593Smuzhiyun 	.set_channel_map  = q6dma_set_channel_map,
756*4882a593Smuzhiyun 	.hw_params        = q6dma_hw_params,
757*4882a593Smuzhiyun };
758*4882a593Smuzhiyun 
msm_dai_q6_dai_probe(struct snd_soc_dai * dai)759*4882a593Smuzhiyun static int msm_dai_q6_dai_probe(struct snd_soc_dai *dai)
760*4882a593Smuzhiyun {
761*4882a593Smuzhiyun 	struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
762*4882a593Smuzhiyun 	struct q6afe_port *port;
763*4882a593Smuzhiyun 
764*4882a593Smuzhiyun 	port = q6afe_port_get_from_id(dai->dev, dai->id);
765*4882a593Smuzhiyun 	if (IS_ERR(port)) {
766*4882a593Smuzhiyun 		dev_err(dai->dev, "Unable to get afe port\n");
767*4882a593Smuzhiyun 		return -EINVAL;
768*4882a593Smuzhiyun 	}
769*4882a593Smuzhiyun 	dai_data->port[dai->id] = port;
770*4882a593Smuzhiyun 
771*4882a593Smuzhiyun 	return 0;
772*4882a593Smuzhiyun }
773*4882a593Smuzhiyun 
msm_dai_q6_dai_remove(struct snd_soc_dai * dai)774*4882a593Smuzhiyun static int msm_dai_q6_dai_remove(struct snd_soc_dai *dai)
775*4882a593Smuzhiyun {
776*4882a593Smuzhiyun 	struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
777*4882a593Smuzhiyun 
778*4882a593Smuzhiyun 	q6afe_port_put(dai_data->port[dai->id]);
779*4882a593Smuzhiyun 	dai_data->port[dai->id] = NULL;
780*4882a593Smuzhiyun 
781*4882a593Smuzhiyun 	return 0;
782*4882a593Smuzhiyun }
783*4882a593Smuzhiyun 
784*4882a593Smuzhiyun static struct snd_soc_dai_driver q6afe_dais[] = {
785*4882a593Smuzhiyun 	{
786*4882a593Smuzhiyun 		.playback = {
787*4882a593Smuzhiyun 			.stream_name = "HDMI Playback",
788*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_48000 |
789*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_96000 |
790*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_192000,
791*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
792*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
793*4882a593Smuzhiyun 			.channels_min = 2,
794*4882a593Smuzhiyun 			.channels_max = 8,
795*4882a593Smuzhiyun 			.rate_max =     192000,
796*4882a593Smuzhiyun 			.rate_min =	48000,
797*4882a593Smuzhiyun 		},
798*4882a593Smuzhiyun 		.ops = &q6hdmi_ops,
799*4882a593Smuzhiyun 		.id = HDMI_RX,
800*4882a593Smuzhiyun 		.name = "HDMI",
801*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
802*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
803*4882a593Smuzhiyun 	}, {
804*4882a593Smuzhiyun 		.name = "SLIMBUS_0_RX",
805*4882a593Smuzhiyun 		.ops = &q6slim_ops,
806*4882a593Smuzhiyun 		.id = SLIMBUS_0_RX,
807*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
808*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
809*4882a593Smuzhiyun 		.playback = {
810*4882a593Smuzhiyun 			.stream_name = "Slimbus Playback",
811*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
812*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
813*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_192000,
814*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
815*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
816*4882a593Smuzhiyun 			.channels_min = 1,
817*4882a593Smuzhiyun 			.channels_max = 8,
818*4882a593Smuzhiyun 			.rate_min = 8000,
819*4882a593Smuzhiyun 			.rate_max = 192000,
820*4882a593Smuzhiyun 		},
821*4882a593Smuzhiyun 	}, {
822*4882a593Smuzhiyun 		.name = "SLIMBUS_0_TX",
823*4882a593Smuzhiyun 		.ops = &q6slim_ops,
824*4882a593Smuzhiyun 		.id = SLIMBUS_0_TX,
825*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
826*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
827*4882a593Smuzhiyun 		.capture = {
828*4882a593Smuzhiyun 			.stream_name = "Slimbus Capture",
829*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
830*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
831*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_192000,
832*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
833*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
834*4882a593Smuzhiyun 			.channels_min = 1,
835*4882a593Smuzhiyun 			.channels_max = 8,
836*4882a593Smuzhiyun 			.rate_min = 8000,
837*4882a593Smuzhiyun 			.rate_max = 192000,
838*4882a593Smuzhiyun 		},
839*4882a593Smuzhiyun 	}, {
840*4882a593Smuzhiyun 		.playback = {
841*4882a593Smuzhiyun 			.stream_name = "Slimbus1 Playback",
842*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
843*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
844*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_192000,
845*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
846*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
847*4882a593Smuzhiyun 			.channels_min = 1,
848*4882a593Smuzhiyun 			.channels_max = 2,
849*4882a593Smuzhiyun 			.rate_min = 8000,
850*4882a593Smuzhiyun 			.rate_max = 192000,
851*4882a593Smuzhiyun 		},
852*4882a593Smuzhiyun 		.name = "SLIMBUS_1_RX",
853*4882a593Smuzhiyun 		.ops = &q6slim_ops,
854*4882a593Smuzhiyun 		.id = SLIMBUS_1_RX,
855*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
856*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
857*4882a593Smuzhiyun 	}, {
858*4882a593Smuzhiyun 		.name = "SLIMBUS_1_TX",
859*4882a593Smuzhiyun 		.ops = &q6slim_ops,
860*4882a593Smuzhiyun 		.id = SLIMBUS_1_TX,
861*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
862*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
863*4882a593Smuzhiyun 		.capture = {
864*4882a593Smuzhiyun 			.stream_name = "Slimbus1 Capture",
865*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
866*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
867*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_192000,
868*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
869*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
870*4882a593Smuzhiyun 			.channels_min = 1,
871*4882a593Smuzhiyun 			.channels_max = 8,
872*4882a593Smuzhiyun 			.rate_min = 8000,
873*4882a593Smuzhiyun 			.rate_max = 192000,
874*4882a593Smuzhiyun 		},
875*4882a593Smuzhiyun 	}, {
876*4882a593Smuzhiyun 		.playback = {
877*4882a593Smuzhiyun 			.stream_name = "Slimbus2 Playback",
878*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
879*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
880*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_192000,
881*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
882*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
883*4882a593Smuzhiyun 			.channels_min = 1,
884*4882a593Smuzhiyun 			.channels_max = 8,
885*4882a593Smuzhiyun 			.rate_min = 8000,
886*4882a593Smuzhiyun 			.rate_max = 192000,
887*4882a593Smuzhiyun 		},
888*4882a593Smuzhiyun 		.name = "SLIMBUS_2_RX",
889*4882a593Smuzhiyun 		.ops = &q6slim_ops,
890*4882a593Smuzhiyun 		.id = SLIMBUS_2_RX,
891*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
892*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
893*4882a593Smuzhiyun 
894*4882a593Smuzhiyun 	}, {
895*4882a593Smuzhiyun 		.name = "SLIMBUS_2_TX",
896*4882a593Smuzhiyun 		.ops = &q6slim_ops,
897*4882a593Smuzhiyun 		.id = SLIMBUS_2_TX,
898*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
899*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
900*4882a593Smuzhiyun 		.capture = {
901*4882a593Smuzhiyun 			.stream_name = "Slimbus2 Capture",
902*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
903*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
904*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_192000,
905*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
906*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
907*4882a593Smuzhiyun 			.channels_min = 1,
908*4882a593Smuzhiyun 			.channels_max = 8,
909*4882a593Smuzhiyun 			.rate_min = 8000,
910*4882a593Smuzhiyun 			.rate_max = 192000,
911*4882a593Smuzhiyun 		},
912*4882a593Smuzhiyun 	}, {
913*4882a593Smuzhiyun 		.playback = {
914*4882a593Smuzhiyun 			.stream_name = "Slimbus3 Playback",
915*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
916*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
917*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_192000,
918*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
919*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
920*4882a593Smuzhiyun 			.channels_min = 1,
921*4882a593Smuzhiyun 			.channels_max = 2,
922*4882a593Smuzhiyun 			.rate_min = 8000,
923*4882a593Smuzhiyun 			.rate_max = 192000,
924*4882a593Smuzhiyun 		},
925*4882a593Smuzhiyun 		.name = "SLIMBUS_3_RX",
926*4882a593Smuzhiyun 		.ops = &q6slim_ops,
927*4882a593Smuzhiyun 		.id = SLIMBUS_3_RX,
928*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
929*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
930*4882a593Smuzhiyun 
931*4882a593Smuzhiyun 	}, {
932*4882a593Smuzhiyun 		.name = "SLIMBUS_3_TX",
933*4882a593Smuzhiyun 		.ops = &q6slim_ops,
934*4882a593Smuzhiyun 		.id = SLIMBUS_3_TX,
935*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
936*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
937*4882a593Smuzhiyun 		.capture = {
938*4882a593Smuzhiyun 			.stream_name = "Slimbus3 Capture",
939*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
940*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
941*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_192000,
942*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
943*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
944*4882a593Smuzhiyun 			.channels_min = 1,
945*4882a593Smuzhiyun 			.channels_max = 8,
946*4882a593Smuzhiyun 			.rate_min = 8000,
947*4882a593Smuzhiyun 			.rate_max = 192000,
948*4882a593Smuzhiyun 		},
949*4882a593Smuzhiyun 	}, {
950*4882a593Smuzhiyun 		.playback = {
951*4882a593Smuzhiyun 			.stream_name = "Slimbus4 Playback",
952*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
953*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
954*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_192000,
955*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
956*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
957*4882a593Smuzhiyun 			.channels_min = 1,
958*4882a593Smuzhiyun 			.channels_max = 2,
959*4882a593Smuzhiyun 			.rate_min = 8000,
960*4882a593Smuzhiyun 			.rate_max = 192000,
961*4882a593Smuzhiyun 		},
962*4882a593Smuzhiyun 		.name = "SLIMBUS_4_RX",
963*4882a593Smuzhiyun 		.ops = &q6slim_ops,
964*4882a593Smuzhiyun 		.id = SLIMBUS_4_RX,
965*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
966*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
967*4882a593Smuzhiyun 
968*4882a593Smuzhiyun 	}, {
969*4882a593Smuzhiyun 		.name = "SLIMBUS_4_TX",
970*4882a593Smuzhiyun 		.ops = &q6slim_ops,
971*4882a593Smuzhiyun 		.id = SLIMBUS_4_TX,
972*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
973*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
974*4882a593Smuzhiyun 		.capture = {
975*4882a593Smuzhiyun 			.stream_name = "Slimbus4 Capture",
976*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
977*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
978*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_192000,
979*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
980*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
981*4882a593Smuzhiyun 			.channels_min = 1,
982*4882a593Smuzhiyun 			.channels_max = 8,
983*4882a593Smuzhiyun 			.rate_min = 8000,
984*4882a593Smuzhiyun 			.rate_max = 192000,
985*4882a593Smuzhiyun 		},
986*4882a593Smuzhiyun 	}, {
987*4882a593Smuzhiyun 		.playback = {
988*4882a593Smuzhiyun 			.stream_name = "Slimbus5 Playback",
989*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
990*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
991*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_192000,
992*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
993*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
994*4882a593Smuzhiyun 			.channels_min = 1,
995*4882a593Smuzhiyun 			.channels_max = 2,
996*4882a593Smuzhiyun 			.rate_min = 8000,
997*4882a593Smuzhiyun 			.rate_max = 192000,
998*4882a593Smuzhiyun 		},
999*4882a593Smuzhiyun 		.name = "SLIMBUS_5_RX",
1000*4882a593Smuzhiyun 		.ops = &q6slim_ops,
1001*4882a593Smuzhiyun 		.id = SLIMBUS_5_RX,
1002*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
1003*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
1004*4882a593Smuzhiyun 
1005*4882a593Smuzhiyun 	}, {
1006*4882a593Smuzhiyun 		.name = "SLIMBUS_5_TX",
1007*4882a593Smuzhiyun 		.ops = &q6slim_ops,
1008*4882a593Smuzhiyun 		.id = SLIMBUS_5_TX,
1009*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
1010*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
1011*4882a593Smuzhiyun 		.capture = {
1012*4882a593Smuzhiyun 			.stream_name = "Slimbus5 Capture",
1013*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
1014*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
1015*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_192000,
1016*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
1017*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
1018*4882a593Smuzhiyun 			.channels_min = 1,
1019*4882a593Smuzhiyun 			.channels_max = 8,
1020*4882a593Smuzhiyun 			.rate_min = 8000,
1021*4882a593Smuzhiyun 			.rate_max = 192000,
1022*4882a593Smuzhiyun 		},
1023*4882a593Smuzhiyun 	}, {
1024*4882a593Smuzhiyun 		.playback = {
1025*4882a593Smuzhiyun 			.stream_name = "Slimbus6 Playback",
1026*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
1027*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
1028*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_192000,
1029*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
1030*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
1031*4882a593Smuzhiyun 			.channels_min = 1,
1032*4882a593Smuzhiyun 			.channels_max = 2,
1033*4882a593Smuzhiyun 			.rate_min = 8000,
1034*4882a593Smuzhiyun 			.rate_max = 192000,
1035*4882a593Smuzhiyun 		},
1036*4882a593Smuzhiyun 		.ops = &q6slim_ops,
1037*4882a593Smuzhiyun 		.name = "SLIMBUS_6_RX",
1038*4882a593Smuzhiyun 		.id = SLIMBUS_6_RX,
1039*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
1040*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
1041*4882a593Smuzhiyun 
1042*4882a593Smuzhiyun 	}, {
1043*4882a593Smuzhiyun 		.name = "SLIMBUS_6_TX",
1044*4882a593Smuzhiyun 		.ops = &q6slim_ops,
1045*4882a593Smuzhiyun 		.id = SLIMBUS_6_TX,
1046*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
1047*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
1048*4882a593Smuzhiyun 		.capture = {
1049*4882a593Smuzhiyun 			.stream_name = "Slimbus6 Capture",
1050*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
1051*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_96000 |
1052*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_192000,
1053*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
1054*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
1055*4882a593Smuzhiyun 			.channels_min = 1,
1056*4882a593Smuzhiyun 			.channels_max = 8,
1057*4882a593Smuzhiyun 			.rate_min = 8000,
1058*4882a593Smuzhiyun 			.rate_max = 192000,
1059*4882a593Smuzhiyun 		},
1060*4882a593Smuzhiyun 	}, {
1061*4882a593Smuzhiyun 		.playback = {
1062*4882a593Smuzhiyun 			.stream_name = "Primary MI2S Playback",
1063*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
1064*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_16000,
1065*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
1066*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
1067*4882a593Smuzhiyun 			.channels_min = 1,
1068*4882a593Smuzhiyun 			.channels_max = 8,
1069*4882a593Smuzhiyun 			.rate_min =     8000,
1070*4882a593Smuzhiyun 			.rate_max =     48000,
1071*4882a593Smuzhiyun 		},
1072*4882a593Smuzhiyun 		.id = PRIMARY_MI2S_RX,
1073*4882a593Smuzhiyun 		.name = "PRI_MI2S_RX",
1074*4882a593Smuzhiyun 		.ops = &q6i2s_ops,
1075*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
1076*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
1077*4882a593Smuzhiyun 	}, {
1078*4882a593Smuzhiyun 		.capture = {
1079*4882a593Smuzhiyun 			.stream_name = "Primary MI2S Capture",
1080*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
1081*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_16000,
1082*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
1083*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
1084*4882a593Smuzhiyun 			.channels_min = 1,
1085*4882a593Smuzhiyun 			.channels_max = 8,
1086*4882a593Smuzhiyun 			.rate_min =     8000,
1087*4882a593Smuzhiyun 			.rate_max =     48000,
1088*4882a593Smuzhiyun 		},
1089*4882a593Smuzhiyun 		.id = PRIMARY_MI2S_TX,
1090*4882a593Smuzhiyun 		.name = "PRI_MI2S_TX",
1091*4882a593Smuzhiyun 		.ops = &q6i2s_ops,
1092*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
1093*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
1094*4882a593Smuzhiyun 	}, {
1095*4882a593Smuzhiyun 		.playback = {
1096*4882a593Smuzhiyun 			.stream_name = "Secondary MI2S Playback",
1097*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
1098*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_16000,
1099*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE,
1100*4882a593Smuzhiyun 			.channels_min = 1,
1101*4882a593Smuzhiyun 			.channels_max = 8,
1102*4882a593Smuzhiyun 			.rate_min =     8000,
1103*4882a593Smuzhiyun 			.rate_max =     48000,
1104*4882a593Smuzhiyun 		},
1105*4882a593Smuzhiyun 		.name = "SEC_MI2S_RX",
1106*4882a593Smuzhiyun 		.id = SECONDARY_MI2S_RX,
1107*4882a593Smuzhiyun 		.ops = &q6i2s_ops,
1108*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
1109*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
1110*4882a593Smuzhiyun 	}, {
1111*4882a593Smuzhiyun 		.capture = {
1112*4882a593Smuzhiyun 			.stream_name = "Secondary MI2S Capture",
1113*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
1114*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_16000,
1115*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
1116*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
1117*4882a593Smuzhiyun 			.channels_min = 1,
1118*4882a593Smuzhiyun 			.channels_max = 8,
1119*4882a593Smuzhiyun 			.rate_min =     8000,
1120*4882a593Smuzhiyun 			.rate_max =     48000,
1121*4882a593Smuzhiyun 		},
1122*4882a593Smuzhiyun 		.id = SECONDARY_MI2S_TX,
1123*4882a593Smuzhiyun 		.name = "SEC_MI2S_TX",
1124*4882a593Smuzhiyun 		.ops = &q6i2s_ops,
1125*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
1126*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
1127*4882a593Smuzhiyun 	}, {
1128*4882a593Smuzhiyun 		.playback = {
1129*4882a593Smuzhiyun 			.stream_name = "Tertiary MI2S Playback",
1130*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
1131*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_16000,
1132*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE,
1133*4882a593Smuzhiyun 			.channels_min = 1,
1134*4882a593Smuzhiyun 			.channels_max = 8,
1135*4882a593Smuzhiyun 			.rate_min =     8000,
1136*4882a593Smuzhiyun 			.rate_max =     48000,
1137*4882a593Smuzhiyun 		},
1138*4882a593Smuzhiyun 		.name = "TERT_MI2S_RX",
1139*4882a593Smuzhiyun 		.id = TERTIARY_MI2S_RX,
1140*4882a593Smuzhiyun 		.ops = &q6i2s_ops,
1141*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
1142*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
1143*4882a593Smuzhiyun 	}, {
1144*4882a593Smuzhiyun 		.capture = {
1145*4882a593Smuzhiyun 			.stream_name = "Tertiary MI2S Capture",
1146*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
1147*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_16000,
1148*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
1149*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
1150*4882a593Smuzhiyun 			.channels_min = 1,
1151*4882a593Smuzhiyun 			.channels_max = 8,
1152*4882a593Smuzhiyun 			.rate_min =     8000,
1153*4882a593Smuzhiyun 			.rate_max =     48000,
1154*4882a593Smuzhiyun 		},
1155*4882a593Smuzhiyun 		.id = TERTIARY_MI2S_TX,
1156*4882a593Smuzhiyun 		.name = "TERT_MI2S_TX",
1157*4882a593Smuzhiyun 		.ops = &q6i2s_ops,
1158*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
1159*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
1160*4882a593Smuzhiyun 	}, {
1161*4882a593Smuzhiyun 		.playback = {
1162*4882a593Smuzhiyun 			.stream_name = "Quaternary MI2S Playback",
1163*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
1164*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_16000,
1165*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE,
1166*4882a593Smuzhiyun 			.channels_min = 1,
1167*4882a593Smuzhiyun 			.channels_max = 8,
1168*4882a593Smuzhiyun 			.rate_min =     8000,
1169*4882a593Smuzhiyun 			.rate_max =     48000,
1170*4882a593Smuzhiyun 		},
1171*4882a593Smuzhiyun 		.name = "QUAT_MI2S_RX",
1172*4882a593Smuzhiyun 		.id = QUATERNARY_MI2S_RX,
1173*4882a593Smuzhiyun 		.ops = &q6i2s_ops,
1174*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
1175*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
1176*4882a593Smuzhiyun 	}, {
1177*4882a593Smuzhiyun 		.capture = {
1178*4882a593Smuzhiyun 			.stream_name = "Quaternary MI2S Capture",
1179*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
1180*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_16000,
1181*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
1182*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
1183*4882a593Smuzhiyun 			.channels_min = 1,
1184*4882a593Smuzhiyun 			.channels_max = 8,
1185*4882a593Smuzhiyun 			.rate_min =     8000,
1186*4882a593Smuzhiyun 			.rate_max =     48000,
1187*4882a593Smuzhiyun 		},
1188*4882a593Smuzhiyun 		.id = QUATERNARY_MI2S_TX,
1189*4882a593Smuzhiyun 		.name = "QUAT_MI2S_TX",
1190*4882a593Smuzhiyun 		.ops = &q6i2s_ops,
1191*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
1192*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
1193*4882a593Smuzhiyun 	},
1194*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Primary", 0, PRIMARY_TDM_RX_0),
1195*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Primary", 1, PRIMARY_TDM_RX_1),
1196*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Primary", 2, PRIMARY_TDM_RX_2),
1197*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Primary", 3, PRIMARY_TDM_RX_3),
1198*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Primary", 4, PRIMARY_TDM_RX_4),
1199*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Primary", 5, PRIMARY_TDM_RX_5),
1200*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Primary", 6, PRIMARY_TDM_RX_6),
1201*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Primary", 7, PRIMARY_TDM_RX_7),
1202*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Primary", 0, PRIMARY_TDM_TX_0),
1203*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Primary", 1, PRIMARY_TDM_TX_1),
1204*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Primary", 2, PRIMARY_TDM_TX_2),
1205*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Primary", 3, PRIMARY_TDM_TX_3),
1206*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Primary", 4, PRIMARY_TDM_TX_4),
1207*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Primary", 5, PRIMARY_TDM_TX_5),
1208*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Primary", 6, PRIMARY_TDM_TX_6),
1209*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Primary", 7, PRIMARY_TDM_TX_7),
1210*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Secondary", 0, SECONDARY_TDM_RX_0),
1211*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Secondary", 1, SECONDARY_TDM_RX_1),
1212*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Secondary", 2, SECONDARY_TDM_RX_2),
1213*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Secondary", 3, SECONDARY_TDM_RX_3),
1214*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Secondary", 4, SECONDARY_TDM_RX_4),
1215*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Secondary", 5, SECONDARY_TDM_RX_5),
1216*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Secondary", 6, SECONDARY_TDM_RX_6),
1217*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Secondary", 7, SECONDARY_TDM_RX_7),
1218*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Secondary", 0, SECONDARY_TDM_TX_0),
1219*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Secondary", 1, SECONDARY_TDM_TX_1),
1220*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Secondary", 2, SECONDARY_TDM_TX_2),
1221*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Secondary", 3, SECONDARY_TDM_TX_3),
1222*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Secondary", 4, SECONDARY_TDM_TX_4),
1223*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Secondary", 5, SECONDARY_TDM_TX_5),
1224*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Secondary", 6, SECONDARY_TDM_TX_6),
1225*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Secondary", 7, SECONDARY_TDM_TX_7),
1226*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Tertiary", 0, TERTIARY_TDM_RX_0),
1227*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Tertiary", 1, TERTIARY_TDM_RX_1),
1228*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Tertiary", 2, TERTIARY_TDM_RX_2),
1229*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Tertiary", 3, TERTIARY_TDM_RX_3),
1230*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Tertiary", 4, TERTIARY_TDM_RX_4),
1231*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Tertiary", 5, TERTIARY_TDM_RX_5),
1232*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Tertiary", 6, TERTIARY_TDM_RX_6),
1233*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Tertiary", 7, TERTIARY_TDM_RX_7),
1234*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Tertiary", 0, TERTIARY_TDM_TX_0),
1235*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Tertiary", 1, TERTIARY_TDM_TX_1),
1236*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Tertiary", 2, TERTIARY_TDM_TX_2),
1237*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Tertiary", 3, TERTIARY_TDM_TX_3),
1238*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Tertiary", 4, TERTIARY_TDM_TX_4),
1239*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Tertiary", 5, TERTIARY_TDM_TX_5),
1240*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Tertiary", 6, TERTIARY_TDM_TX_6),
1241*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Tertiary", 7, TERTIARY_TDM_TX_7),
1242*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Quaternary", 0, QUATERNARY_TDM_RX_0),
1243*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Quaternary", 1, QUATERNARY_TDM_RX_1),
1244*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Quaternary", 2, QUATERNARY_TDM_RX_2),
1245*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Quaternary", 3, QUATERNARY_TDM_RX_3),
1246*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Quaternary", 4, QUATERNARY_TDM_RX_4),
1247*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Quaternary", 5, QUATERNARY_TDM_RX_5),
1248*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Quaternary", 6, QUATERNARY_TDM_RX_6),
1249*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Quaternary", 7, QUATERNARY_TDM_RX_7),
1250*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Quaternary", 0, QUATERNARY_TDM_TX_0),
1251*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Quaternary", 1, QUATERNARY_TDM_TX_1),
1252*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Quaternary", 2, QUATERNARY_TDM_TX_2),
1253*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Quaternary", 3, QUATERNARY_TDM_TX_3),
1254*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Quaternary", 4, QUATERNARY_TDM_TX_4),
1255*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Quaternary", 5, QUATERNARY_TDM_TX_5),
1256*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Quaternary", 6, QUATERNARY_TDM_TX_6),
1257*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Quaternary", 7, QUATERNARY_TDM_TX_7),
1258*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Quinary", 0, QUINARY_TDM_RX_0),
1259*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Quinary", 1, QUINARY_TDM_RX_1),
1260*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Quinary", 2, QUINARY_TDM_RX_2),
1261*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Quinary", 3, QUINARY_TDM_RX_3),
1262*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Quinary", 4, QUINARY_TDM_RX_4),
1263*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Quinary", 5, QUINARY_TDM_RX_5),
1264*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Quinary", 6, QUINARY_TDM_RX_6),
1265*4882a593Smuzhiyun 	Q6AFE_TDM_PB_DAI("Quinary", 7, QUINARY_TDM_RX_7),
1266*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Quinary", 0, QUINARY_TDM_TX_0),
1267*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Quinary", 1, QUINARY_TDM_TX_1),
1268*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Quinary", 2, QUINARY_TDM_TX_2),
1269*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Quinary", 3, QUINARY_TDM_TX_3),
1270*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Quinary", 4, QUINARY_TDM_TX_4),
1271*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Quinary", 5, QUINARY_TDM_TX_5),
1272*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Quinary", 6, QUINARY_TDM_TX_6),
1273*4882a593Smuzhiyun 	Q6AFE_TDM_CAP_DAI("Quinary", 7, QUINARY_TDM_TX_7),
1274*4882a593Smuzhiyun 	{
1275*4882a593Smuzhiyun 		.playback = {
1276*4882a593Smuzhiyun 			.stream_name = "Display Port Playback",
1277*4882a593Smuzhiyun 			.rates = SNDRV_PCM_RATE_48000 |
1278*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_96000 |
1279*4882a593Smuzhiyun 				 SNDRV_PCM_RATE_192000,
1280*4882a593Smuzhiyun 			.formats = SNDRV_PCM_FMTBIT_S16_LE |
1281*4882a593Smuzhiyun 				   SNDRV_PCM_FMTBIT_S24_LE,
1282*4882a593Smuzhiyun 			.channels_min = 2,
1283*4882a593Smuzhiyun 			.channels_max = 8,
1284*4882a593Smuzhiyun 			.rate_max =     192000,
1285*4882a593Smuzhiyun 			.rate_min =	48000,
1286*4882a593Smuzhiyun 		},
1287*4882a593Smuzhiyun 		.ops = &q6hdmi_ops,
1288*4882a593Smuzhiyun 		.id = DISPLAY_PORT_RX,
1289*4882a593Smuzhiyun 		.name = "DISPLAY_PORT",
1290*4882a593Smuzhiyun 		.probe = msm_dai_q6_dai_probe,
1291*4882a593Smuzhiyun 		.remove = msm_dai_q6_dai_remove,
1292*4882a593Smuzhiyun 	},
1293*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_RX_DAI(WSA_CODEC_DMA_RX_0),
1294*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_0),
1295*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_RX_DAI(WSA_CODEC_DMA_RX_1),
1296*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_1),
1297*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_2),
1298*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_0),
1299*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_1),
1300*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_2),
1301*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_0),
1302*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_0),
1303*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_1),
1304*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_1),
1305*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_2),
1306*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_2),
1307*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_3),
1308*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_3),
1309*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_4),
1310*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_4),
1311*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_5),
1312*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_5),
1313*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_6),
1314*4882a593Smuzhiyun 	Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_7),
1315*4882a593Smuzhiyun };
1316*4882a593Smuzhiyun 
q6afe_of_xlate_dai_name(struct snd_soc_component * component,struct of_phandle_args * args,const char ** dai_name)1317*4882a593Smuzhiyun static int q6afe_of_xlate_dai_name(struct snd_soc_component *component,
1318*4882a593Smuzhiyun 				   struct of_phandle_args *args,
1319*4882a593Smuzhiyun 				   const char **dai_name)
1320*4882a593Smuzhiyun {
1321*4882a593Smuzhiyun 	int id = args->args[0];
1322*4882a593Smuzhiyun 	int ret = -EINVAL;
1323*4882a593Smuzhiyun 	int i;
1324*4882a593Smuzhiyun 
1325*4882a593Smuzhiyun 	for (i = 0; i  < ARRAY_SIZE(q6afe_dais); i++) {
1326*4882a593Smuzhiyun 		if (q6afe_dais[i].id == id) {
1327*4882a593Smuzhiyun 			*dai_name = q6afe_dais[i].name;
1328*4882a593Smuzhiyun 			ret = 0;
1329*4882a593Smuzhiyun 			break;
1330*4882a593Smuzhiyun 		}
1331*4882a593Smuzhiyun 	}
1332*4882a593Smuzhiyun 
1333*4882a593Smuzhiyun 	return ret;
1334*4882a593Smuzhiyun }
1335*4882a593Smuzhiyun 
1336*4882a593Smuzhiyun static const struct snd_soc_dapm_widget q6afe_dai_widgets[] = {
1337*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("HDMI_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1338*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("SLIMBUS_0_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1339*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("SLIMBUS_1_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1340*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("SLIMBUS_2_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1341*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("SLIMBUS_3_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1342*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("SLIMBUS_4_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1343*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("SLIMBUS_5_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1344*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("SLIMBUS_6_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1345*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("SLIMBUS_0_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
1346*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("SLIMBUS_1_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
1347*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("SLIMBUS_2_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
1348*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("SLIMBUS_3_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
1349*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("SLIMBUS_4_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
1350*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("SLIMBUS_5_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
1351*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("SLIMBUS_6_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
1352*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("QUAT_MI2S_RX", NULL,
1353*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1354*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("QUAT_MI2S_TX", NULL,
1355*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1356*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("TERT_MI2S_RX", NULL,
1357*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1358*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("TERT_MI2S_TX", NULL,
1359*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1360*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("SEC_MI2S_RX", NULL,
1361*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1362*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("SEC_MI2S_TX", NULL,
1363*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1364*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("SEC_MI2S_RX_SD1",
1365*4882a593Smuzhiyun 			"Secondary MI2S Playback SD1",
1366*4882a593Smuzhiyun 			0, SND_SOC_NOPM, 0, 0),
1367*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("PRI_MI2S_RX", NULL,
1368*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1369*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("PRI_MI2S_TX", NULL,
1370*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1371*4882a593Smuzhiyun 
1372*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_0", NULL,
1373*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1374*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_1", NULL,
1375*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1376*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_2", NULL,
1377*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1378*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_3", NULL,
1379*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1380*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_4", NULL,
1381*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1382*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_5", NULL,
1383*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1384*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_6", NULL,
1385*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1386*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_7", NULL,
1387*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1388*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_0", NULL,
1389*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1390*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_1", NULL,
1391*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1392*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_2", NULL,
1393*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1394*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_3", NULL,
1395*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1396*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_4", NULL,
1397*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1398*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_5", NULL,
1399*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1400*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_6", NULL,
1401*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1402*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_7", NULL,
1403*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1404*4882a593Smuzhiyun 
1405*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_0", NULL,
1406*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1407*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_1", NULL,
1408*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1409*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_2", NULL,
1410*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1411*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_3", NULL,
1412*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1413*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_4", NULL,
1414*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1415*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_5", NULL,
1416*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1417*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_6", NULL,
1418*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1419*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_7", NULL,
1420*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1421*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_0", NULL,
1422*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1423*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_1", NULL,
1424*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1425*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_2", NULL,
1426*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1427*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_3", NULL,
1428*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1429*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_4", NULL,
1430*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1431*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_5", NULL,
1432*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1433*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_6", NULL,
1434*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1435*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_7", NULL,
1436*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1437*4882a593Smuzhiyun 
1438*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_0", NULL,
1439*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1440*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_1", NULL,
1441*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1442*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_2", NULL,
1443*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1444*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_3", NULL,
1445*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1446*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_4", NULL,
1447*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1448*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_5", NULL,
1449*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1450*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_6", NULL,
1451*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1452*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_7", NULL,
1453*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1454*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_0", NULL,
1455*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1456*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_1", NULL,
1457*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1458*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_2", NULL,
1459*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1460*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_3", NULL,
1461*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1462*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_4", NULL,
1463*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1464*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_5", NULL,
1465*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1466*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_6", NULL,
1467*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1468*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_7", NULL,
1469*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1470*4882a593Smuzhiyun 
1471*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_0", NULL,
1472*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1473*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_1", NULL,
1474*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1475*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_2", NULL,
1476*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1477*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_3", NULL,
1478*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1479*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_4", NULL,
1480*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1481*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_5", NULL,
1482*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1483*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_6", NULL,
1484*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1485*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_7", NULL,
1486*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1487*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_0", NULL,
1488*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1489*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_1", NULL,
1490*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1491*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_2", NULL,
1492*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1493*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_3", NULL,
1494*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1495*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_4", NULL,
1496*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1497*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_5", NULL,
1498*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1499*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_6", NULL,
1500*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1501*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_7", NULL,
1502*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1503*4882a593Smuzhiyun 
1504*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_0", NULL,
1505*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1506*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_1", NULL,
1507*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1508*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_2", NULL,
1509*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1510*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_3", NULL,
1511*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1512*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_4", NULL,
1513*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1514*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_5", NULL,
1515*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1516*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_6", NULL,
1517*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1518*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_7", NULL,
1519*4882a593Smuzhiyun 			     0, SND_SOC_NOPM, 0, 0),
1520*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_0", NULL,
1521*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1522*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_1", NULL,
1523*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1524*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_2", NULL,
1525*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1526*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_3", NULL,
1527*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1528*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_4", NULL,
1529*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1530*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_5", NULL,
1531*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1532*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_6", NULL,
1533*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1534*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_7", NULL,
1535*4882a593Smuzhiyun 						0, SND_SOC_NOPM, 0, 0),
1536*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("DISPLAY_PORT_RX", "NULL", 0, SND_SOC_NOPM, 0, 0),
1537*4882a593Smuzhiyun 
1538*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("WSA_CODEC_DMA_RX_0", "NULL",
1539*4882a593Smuzhiyun 		0, SND_SOC_NOPM, 0, 0),
1540*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_0", "NULL",
1541*4882a593Smuzhiyun 		 0, SND_SOC_NOPM, 0, 0),
1542*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("WSA_CODEC_DMA_RX_1", "NULL",
1543*4882a593Smuzhiyun 		0, SND_SOC_NOPM, 0, 0),
1544*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_1", "NULL",
1545*4882a593Smuzhiyun 		 0, SND_SOC_NOPM, 0, 0),
1546*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_2", "NULL",
1547*4882a593Smuzhiyun 		 0, SND_SOC_NOPM, 0, 0),
1548*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_0", "NULL",
1549*4882a593Smuzhiyun 		 0, SND_SOC_NOPM, 0, 0),
1550*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_1", "NULL",
1551*4882a593Smuzhiyun 		 0, SND_SOC_NOPM, 0, 0),
1552*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_2", "NULL",
1553*4882a593Smuzhiyun 		 0, SND_SOC_NOPM, 0, 0),
1554*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_0", "NULL",
1555*4882a593Smuzhiyun 		0, SND_SOC_NOPM, 0, 0),
1556*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_0", "NULL",
1557*4882a593Smuzhiyun 		 0, SND_SOC_NOPM, 0, 0),
1558*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_1", "NULL",
1559*4882a593Smuzhiyun 		0, SND_SOC_NOPM, 0, 0),
1560*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_1", "NULL",
1561*4882a593Smuzhiyun 		 0, SND_SOC_NOPM, 0, 0),
1562*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_2", "NULL",
1563*4882a593Smuzhiyun 		0, SND_SOC_NOPM, 0, 0),
1564*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_2", "NULL",
1565*4882a593Smuzhiyun 		 0, SND_SOC_NOPM, 0, 0),
1566*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_3", "NULL",
1567*4882a593Smuzhiyun 		0, SND_SOC_NOPM, 0, 0),
1568*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_3", "NULL",
1569*4882a593Smuzhiyun 		 0, SND_SOC_NOPM, 0, 0),
1570*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_4", "NULL",
1571*4882a593Smuzhiyun 		0, SND_SOC_NOPM, 0, 0),
1572*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_4", "NULL",
1573*4882a593Smuzhiyun 		 0, SND_SOC_NOPM, 0, 0),
1574*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_5", "NULL",
1575*4882a593Smuzhiyun 		0, SND_SOC_NOPM, 0, 0),
1576*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_5", "NULL",
1577*4882a593Smuzhiyun 		 0, SND_SOC_NOPM, 0, 0),
1578*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_6", "NULL",
1579*4882a593Smuzhiyun 		0, SND_SOC_NOPM, 0, 0),
1580*4882a593Smuzhiyun 	SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_7", "NULL",
1581*4882a593Smuzhiyun 		0, SND_SOC_NOPM, 0, 0),
1582*4882a593Smuzhiyun };
1583*4882a593Smuzhiyun 
1584*4882a593Smuzhiyun static const struct snd_soc_component_driver q6afe_dai_component = {
1585*4882a593Smuzhiyun 	.name		= "q6afe-dai-component",
1586*4882a593Smuzhiyun 	.dapm_widgets = q6afe_dai_widgets,
1587*4882a593Smuzhiyun 	.num_dapm_widgets = ARRAY_SIZE(q6afe_dai_widgets),
1588*4882a593Smuzhiyun 	.dapm_routes = q6afe_dapm_routes,
1589*4882a593Smuzhiyun 	.num_dapm_routes = ARRAY_SIZE(q6afe_dapm_routes),
1590*4882a593Smuzhiyun 	.of_xlate_dai_name = q6afe_of_xlate_dai_name,
1591*4882a593Smuzhiyun 
1592*4882a593Smuzhiyun };
1593*4882a593Smuzhiyun 
of_q6afe_parse_dai_data(struct device * dev,struct q6afe_dai_data * data)1594*4882a593Smuzhiyun static void of_q6afe_parse_dai_data(struct device *dev,
1595*4882a593Smuzhiyun 				    struct q6afe_dai_data *data)
1596*4882a593Smuzhiyun {
1597*4882a593Smuzhiyun 	struct device_node *node;
1598*4882a593Smuzhiyun 	int ret;
1599*4882a593Smuzhiyun 
1600*4882a593Smuzhiyun 	for_each_child_of_node(dev->of_node, node) {
1601*4882a593Smuzhiyun 		unsigned int lines[Q6AFE_MAX_MI2S_LINES];
1602*4882a593Smuzhiyun 		struct q6afe_dai_priv_data *priv;
1603*4882a593Smuzhiyun 		int id, i, num_lines;
1604*4882a593Smuzhiyun 
1605*4882a593Smuzhiyun 		ret = of_property_read_u32(node, "reg", &id);
1606*4882a593Smuzhiyun 		if (ret || id < 0 || id >= AFE_PORT_MAX) {
1607*4882a593Smuzhiyun 			dev_err(dev, "valid dai id not found:%d\n", ret);
1608*4882a593Smuzhiyun 			continue;
1609*4882a593Smuzhiyun 		}
1610*4882a593Smuzhiyun 
1611*4882a593Smuzhiyun 		switch (id) {
1612*4882a593Smuzhiyun 		/* MI2S specific properties */
1613*4882a593Smuzhiyun 		case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX:
1614*4882a593Smuzhiyun 			priv = &data->priv[id];
1615*4882a593Smuzhiyun 			ret = of_property_read_variable_u32_array(node,
1616*4882a593Smuzhiyun 							"qcom,sd-lines",
1617*4882a593Smuzhiyun 							lines, 0,
1618*4882a593Smuzhiyun 							Q6AFE_MAX_MI2S_LINES);
1619*4882a593Smuzhiyun 			if (ret < 0)
1620*4882a593Smuzhiyun 				num_lines = 0;
1621*4882a593Smuzhiyun 			else
1622*4882a593Smuzhiyun 				num_lines = ret;
1623*4882a593Smuzhiyun 
1624*4882a593Smuzhiyun 			priv->sd_line_mask = 0;
1625*4882a593Smuzhiyun 
1626*4882a593Smuzhiyun 			for (i = 0; i < num_lines; i++)
1627*4882a593Smuzhiyun 				priv->sd_line_mask |= BIT(lines[i]);
1628*4882a593Smuzhiyun 
1629*4882a593Smuzhiyun 			break;
1630*4882a593Smuzhiyun 		case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
1631*4882a593Smuzhiyun 			priv = &data->priv[id];
1632*4882a593Smuzhiyun 			ret = of_property_read_u32(node, "qcom,tdm-sync-mode",
1633*4882a593Smuzhiyun 						   &priv->sync_mode);
1634*4882a593Smuzhiyun 			if (ret) {
1635*4882a593Smuzhiyun 				dev_err(dev, "No Sync mode from DT\n");
1636*4882a593Smuzhiyun 				break;
1637*4882a593Smuzhiyun 			}
1638*4882a593Smuzhiyun 			ret = of_property_read_u32(node, "qcom,tdm-sync-src",
1639*4882a593Smuzhiyun 						   &priv->sync_src);
1640*4882a593Smuzhiyun 			if (ret) {
1641*4882a593Smuzhiyun 				dev_err(dev, "No Sync Src from DT\n");
1642*4882a593Smuzhiyun 				break;
1643*4882a593Smuzhiyun 			}
1644*4882a593Smuzhiyun 			ret = of_property_read_u32(node, "qcom,tdm-data-out",
1645*4882a593Smuzhiyun 						   &priv->data_out_enable);
1646*4882a593Smuzhiyun 			if (ret) {
1647*4882a593Smuzhiyun 				dev_err(dev, "No Data out enable from DT\n");
1648*4882a593Smuzhiyun 				break;
1649*4882a593Smuzhiyun 			}
1650*4882a593Smuzhiyun 			ret = of_property_read_u32(node, "qcom,tdm-invert-sync",
1651*4882a593Smuzhiyun 						   &priv->invert_sync);
1652*4882a593Smuzhiyun 			if (ret) {
1653*4882a593Smuzhiyun 				dev_err(dev, "No Invert sync from DT\n");
1654*4882a593Smuzhiyun 				break;
1655*4882a593Smuzhiyun 			}
1656*4882a593Smuzhiyun 			ret = of_property_read_u32(node, "qcom,tdm-data-delay",
1657*4882a593Smuzhiyun 						   &priv->data_delay);
1658*4882a593Smuzhiyun 			if (ret) {
1659*4882a593Smuzhiyun 				dev_err(dev, "No Data Delay from DT\n");
1660*4882a593Smuzhiyun 				break;
1661*4882a593Smuzhiyun 			}
1662*4882a593Smuzhiyun 			ret = of_property_read_u32(node, "qcom,tdm-data-align",
1663*4882a593Smuzhiyun 						   &priv->data_align);
1664*4882a593Smuzhiyun 			if (ret) {
1665*4882a593Smuzhiyun 				dev_err(dev, "No Data align from DT\n");
1666*4882a593Smuzhiyun 				break;
1667*4882a593Smuzhiyun 			}
1668*4882a593Smuzhiyun 			break;
1669*4882a593Smuzhiyun 		default:
1670*4882a593Smuzhiyun 			break;
1671*4882a593Smuzhiyun 		}
1672*4882a593Smuzhiyun 	}
1673*4882a593Smuzhiyun }
1674*4882a593Smuzhiyun 
q6afe_dai_dev_probe(struct platform_device * pdev)1675*4882a593Smuzhiyun static int q6afe_dai_dev_probe(struct platform_device *pdev)
1676*4882a593Smuzhiyun {
1677*4882a593Smuzhiyun 	struct q6afe_dai_data *dai_data;
1678*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
1679*4882a593Smuzhiyun 
1680*4882a593Smuzhiyun 	dai_data = devm_kzalloc(dev, sizeof(*dai_data), GFP_KERNEL);
1681*4882a593Smuzhiyun 	if (!dai_data)
1682*4882a593Smuzhiyun 		return -ENOMEM;
1683*4882a593Smuzhiyun 
1684*4882a593Smuzhiyun 	dev_set_drvdata(dev, dai_data);
1685*4882a593Smuzhiyun 
1686*4882a593Smuzhiyun 	of_q6afe_parse_dai_data(dev, dai_data);
1687*4882a593Smuzhiyun 
1688*4882a593Smuzhiyun 	return devm_snd_soc_register_component(dev, &q6afe_dai_component,
1689*4882a593Smuzhiyun 					  q6afe_dais, ARRAY_SIZE(q6afe_dais));
1690*4882a593Smuzhiyun }
1691*4882a593Smuzhiyun 
1692*4882a593Smuzhiyun #ifdef CONFIG_OF
1693*4882a593Smuzhiyun static const struct of_device_id q6afe_dai_device_id[] = {
1694*4882a593Smuzhiyun 	{ .compatible = "qcom,q6afe-dais" },
1695*4882a593Smuzhiyun 	{},
1696*4882a593Smuzhiyun };
1697*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, q6afe_dai_device_id);
1698*4882a593Smuzhiyun #endif
1699*4882a593Smuzhiyun 
1700*4882a593Smuzhiyun static struct platform_driver q6afe_dai_platform_driver = {
1701*4882a593Smuzhiyun 	.driver = {
1702*4882a593Smuzhiyun 		.name = "q6afe-dai",
1703*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(q6afe_dai_device_id),
1704*4882a593Smuzhiyun 	},
1705*4882a593Smuzhiyun 	.probe = q6afe_dai_dev_probe,
1706*4882a593Smuzhiyun };
1707*4882a593Smuzhiyun module_platform_driver(q6afe_dai_platform_driver);
1708*4882a593Smuzhiyun 
1709*4882a593Smuzhiyun MODULE_DESCRIPTION("Q6 Audio Fronend dai driver");
1710*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
1711