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/OK3568_Linux_fs/kernel/drivers/irqchip/
H A Dirq-ti-sci-inta.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/
24 #include <asm-generic/msi.h>
44 * struct ti_sci_inta_event_desc - Description of an event coming to
59 * struct ti_sci_inta_vint_desc - Description of a virtual interrupt coming out
78 * struct ti_sci_inta_irq_domain - Structure representing a TISCI based
80 * @sci: Pointer to TISCI handle
87 * @ti_sci_id: TI-SCI device identifier
89 * @unmapped_dev_ids: Pointer to an array of TI-SCI device identifiers of
92 * they are converted to Global event within INTA to be
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_IRQCHIP) += irqchip.o
4 obj-$(CONFIG_AL_FIC) += irq-al-fic.o
5 obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o
6 obj-$(CONFIG_ATH79) += irq-ath79-cpu.o
7 obj-$(CONFIG_ATH79) += irq-ath79-misc.o
8 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
9 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
10 obj-$(CONFIG_ARCH_ACTIONS) += irq-owl-sirq.o
11 obj-$(CONFIG_DAVINCI_AINTC) += irq-davinci-aintc.o
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/interrupt-controller/
H A Dti,sci-inta.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/ti,sci-inta.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lokesh Vutla <lokeshvutla@ti.com>
13 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
16 The Interrupt Aggregator (INTA) provides a centralized machine
22 +-----------------------------------------+
24 | +--------------+ +------------+ |
25 m ------>| | vint | bit | | 0 |.....|63| vint0 |
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H A Dti,sci-intr.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/ti,sci-intr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lokesh Vutla <lokeshvutla@ti.com>
13 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
22 +----------------------+
24 +-------+ | +------+ +-----+ |
25 | GPIO |----------->| | irq0 | | 0 | | Host IRQ
26 +-------+ | +------+ +-----+ | controller
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/OK3568_Linux_fs/kernel/include/linux/soc/ti/
H A Dti_sci_inta_msi.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Texas Instruments' K3 TI SCI INTA MSI helper
5 * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/ti/
H A Dk3-j7200-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 atf-sram@0 {
21 scm_conf: scm-conf@100000 {
22 compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
24 #address-cells = <1>;
25 #size-cells = <1>;
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H A Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
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H A Dk3-j721e-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2019 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy.h>
8 #include <dt-bindings/mux/mux.h>
9 #include <dt-bindings/mux/ti-serdes.h>
12 cmn_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
18 cmn_refclk1: clock-cmnrefclk1 {
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/OK3568_Linux_fs/kernel/arch/parisc/include/asm/
H A Dsuperio.h1 /* SPDX-License-Identifier: GPL-2.0 */
23 #define CFG_IR_INTAB 0x6c /* PCI INTA [0:3] and INT B [4:7] */
28 #define CFG_IR_ACPI 0x71 /* ACPI SCI [0:3] and reserved [4:7] */
34 #define OCW2_EOI 0x20 /* Non-specific EOI */
79 (((x)->vendor == PCI_VENDOR_ID_NS) && \
80 ( ((x)->device == PCI_DEVICE_ID_NS_87415) \
81 || ((x)->device == PCI_DEVICE_ID_NS_87560_LIO) \
82 || ((x)->device == PCI_DEVICE_ID_NS_87560_USB) ) )
/OK3568_Linux_fs/kernel/arch/x86/pci/
H A Dirq.c1 // SPDX-License-Identifier: GPL-2.0
3 * Low-Level PCI Support for PC -- Routing of Interrupts
5 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
72 if (rt->signature != PIRQ_SIGNATURE || in pirq_check_routing_table()
73 rt->version != PIRQ_VERSION || in pirq_check_routing_table()
74 rt->size % 16 || in pirq_check_routing_table()
75 rt->size < sizeof(struct irq_routing_table)) in pirq_check_routing_table()
78 for (i = 0; i < rt->size; i++) in pirq_check_routing_table()
91 * Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
127 for (i = 0; i < (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info); i++) { in pirq_peer_trick()
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/OK3568_Linux_fs/kernel/arch/powerpc/platforms/
H A Dfsl_uli1575.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ULI M1575 setup code - specific to Freescale boards
14 #include <asm/pci-bridge.h>
74 dev->class |= 0x1; in early_uli5249()
98 /* USB 1.1 OHCI controller 1: dev 28, func 0 - IRQ12 */ in quirk_uli1575()
101 /* USB 1.1 OHCI controller 2: dev 28, func 1 - IRQ9 */ in quirk_uli1575()
104 /* USB 1.1 OHCI controller 3: dev 28, func 2 - IRQ10 */ in quirk_uli1575()
107 /* Lan controller: dev 27, func 0 - IRQ6 */ in quirk_uli1575()
110 /* AC97 Audio controller: dev 29, func 0 - IRQ6 */ in quirk_uli1575()
113 /* Modem controller: dev 29, func 1 - IRQ6 */ in quirk_uli1575()
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/OK3568_Linux_fs/u-boot/arch/x86/include/asm/arch-ivybridge/
H A Dpch.h6 * Copyright (C) 2008-2009 coresystems GmbH
9 * SPDX-License-Identifier: GPL-2.0
186 #define INTA 1 macro
239 #define D22IP_IDERIP 8 /* IDE-R Pin */
356 #define INTEL_USB2_EN (1 << 18) /* Intel-Specific USB2 SMI logic */
361 #define BIOS_RLS (1 << 7) /* asserts SCI on bit set */
381 * pch_silicon_revision() - Read silicon device ID from the PCH
389 * pch_pch_iobp_update() - Update a pch register
/OK3568_Linux_fs/u-boot/doc/
H A DREADME.x865 # SPDX-License-Identifier: GPL-2.0+
8 U-Boot on x86
11 This document describes the information about U-Boot running on x86 targets,
15 ------
16 U-Boot supports running as a coreboot [1] payload on x86. So far only Link
19 most of the low-level details.
21 U-Boot is a main bootloader on Intel Edison board.
23 U-Boot also supports booting directly from x86 reset vector, without coreboot.
25 'bare metal', U-Boot acts like a BIOS replacement. The following platforms
28 - Bayley Bay CRB
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/OK3568_Linux_fs/kernel/arch/ia64/kernel/
H A Diosapic.c1 // SPDX-License-Identifier: GPL-2.0
7 * Copyright (C) 2000-2002 J.I. Lee <jung-ik.lee@intel.com>
8 * Copyright (C) 1999-2000, 2002-2003 Hewlett-Packard Co.
9 * David Mosberger-Tang <davidm@hpl.hp.com>
38 * 03/02/19 B. Helgaas Make pcat_compat system-wide, not per-IOSAPIC.
50 * (1) A PCI device raises one of the four interrupt pins (INTA, INTB, INTC,
51 * INTD). The device is uniquely identified by its bus-, and slot-number
63 * IOSAPIC pin into the IA-64 interrupt vector. This interrupt vector is then
67 * used as architecture-independent interrupt handling mechanism in Linux.
69 * IA-64 interrupt vector number <-> IRQ number mapping. On smaller
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/OK3568_Linux_fs/kernel/
H A DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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