xref: /OK3568_Linux_fs/kernel/drivers/irqchip/irq-ti-sci-inta.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Texas Instruments' K3 Interrupt Aggregator irqchip driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/
6*4882a593Smuzhiyun  *	Lokesh Vutla <lokeshvutla@ti.com>
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/err.h>
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun #include <linux/irq.h>
12*4882a593Smuzhiyun #include <linux/irqchip.h>
13*4882a593Smuzhiyun #include <linux/irqdomain.h>
14*4882a593Smuzhiyun #include <linux/interrupt.h>
15*4882a593Smuzhiyun #include <linux/msi.h>
16*4882a593Smuzhiyun #include <linux/module.h>
17*4882a593Smuzhiyun #include <linux/moduleparam.h>
18*4882a593Smuzhiyun #include <linux/of_address.h>
19*4882a593Smuzhiyun #include <linux/of_irq.h>
20*4882a593Smuzhiyun #include <linux/of_platform.h>
21*4882a593Smuzhiyun #include <linux/irqchip/chained_irq.h>
22*4882a593Smuzhiyun #include <linux/soc/ti/ti_sci_inta_msi.h>
23*4882a593Smuzhiyun #include <linux/soc/ti/ti_sci_protocol.h>
24*4882a593Smuzhiyun #include <asm-generic/msi.h>
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define TI_SCI_DEV_ID_MASK	0xffff
27*4882a593Smuzhiyun #define TI_SCI_DEV_ID_SHIFT	16
28*4882a593Smuzhiyun #define TI_SCI_IRQ_ID_MASK	0xffff
29*4882a593Smuzhiyun #define TI_SCI_IRQ_ID_SHIFT	0
30*4882a593Smuzhiyun #define HWIRQ_TO_DEVID(hwirq)	(((hwirq) >> (TI_SCI_DEV_ID_SHIFT)) & \
31*4882a593Smuzhiyun 				 (TI_SCI_DEV_ID_MASK))
32*4882a593Smuzhiyun #define HWIRQ_TO_IRQID(hwirq)	((hwirq) & (TI_SCI_IRQ_ID_MASK))
33*4882a593Smuzhiyun #define TO_HWIRQ(dev, index)	((((dev) & TI_SCI_DEV_ID_MASK) << \
34*4882a593Smuzhiyun 				 TI_SCI_DEV_ID_SHIFT) | \
35*4882a593Smuzhiyun 				((index) & TI_SCI_IRQ_ID_MASK))
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #define MAX_EVENTS_PER_VINT	64
38*4882a593Smuzhiyun #define VINT_ENABLE_SET_OFFSET	0x0
39*4882a593Smuzhiyun #define VINT_ENABLE_CLR_OFFSET	0x8
40*4882a593Smuzhiyun #define VINT_STATUS_OFFSET	0x18
41*4882a593Smuzhiyun #define VINT_STATUS_MASKED_OFFSET	0x20
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun /**
44*4882a593Smuzhiyun  * struct ti_sci_inta_event_desc - Description of an event coming to
45*4882a593Smuzhiyun  *				   Interrupt Aggregator. This serves
46*4882a593Smuzhiyun  *				   as a mapping table for global event,
47*4882a593Smuzhiyun  *				   hwirq and vint bit.
48*4882a593Smuzhiyun  * @global_event:	Global event number corresponding to this event
49*4882a593Smuzhiyun  * @hwirq:		Hwirq of the incoming interrupt
50*4882a593Smuzhiyun  * @vint_bit:		Corresponding vint bit to which this event is attached.
51*4882a593Smuzhiyun  */
52*4882a593Smuzhiyun struct ti_sci_inta_event_desc {
53*4882a593Smuzhiyun 	u16 global_event;
54*4882a593Smuzhiyun 	u32 hwirq;
55*4882a593Smuzhiyun 	u8 vint_bit;
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun /**
59*4882a593Smuzhiyun  * struct ti_sci_inta_vint_desc - Description of a virtual interrupt coming out
60*4882a593Smuzhiyun  *				  of Interrupt Aggregator.
61*4882a593Smuzhiyun  * @domain:		Pointer to IRQ domain to which this vint belongs.
62*4882a593Smuzhiyun  * @list:		List entry for the vint list
63*4882a593Smuzhiyun  * @event_map:		Bitmap to manage the allocation of events to vint.
64*4882a593Smuzhiyun  * @events:		Array of event descriptors assigned to this vint.
65*4882a593Smuzhiyun  * @parent_virq:	Linux IRQ number that gets attached to parent
66*4882a593Smuzhiyun  * @vint_id:		TISCI vint ID
67*4882a593Smuzhiyun  */
68*4882a593Smuzhiyun struct ti_sci_inta_vint_desc {
69*4882a593Smuzhiyun 	struct irq_domain *domain;
70*4882a593Smuzhiyun 	struct list_head list;
71*4882a593Smuzhiyun 	DECLARE_BITMAP(event_map, MAX_EVENTS_PER_VINT);
72*4882a593Smuzhiyun 	struct ti_sci_inta_event_desc events[MAX_EVENTS_PER_VINT];
73*4882a593Smuzhiyun 	unsigned int parent_virq;
74*4882a593Smuzhiyun 	u16 vint_id;
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun /**
78*4882a593Smuzhiyun  * struct ti_sci_inta_irq_domain - Structure representing a TISCI based
79*4882a593Smuzhiyun  *				   Interrupt Aggregator IRQ domain.
80*4882a593Smuzhiyun  * @sci:		Pointer to TISCI handle
81*4882a593Smuzhiyun  * @vint:		TISCI resource pointer representing IA inerrupts.
82*4882a593Smuzhiyun  * @global_event:	TISCI resource pointer representing global events.
83*4882a593Smuzhiyun  * @vint_list:		List of the vints active in the system
84*4882a593Smuzhiyun  * @vint_mutex:		Mutex to protect vint_list
85*4882a593Smuzhiyun  * @base:		Base address of the memory mapped IO registers
86*4882a593Smuzhiyun  * @pdev:		Pointer to platform device.
87*4882a593Smuzhiyun  * @ti_sci_id:		TI-SCI device identifier
88*4882a593Smuzhiyun  * @unmapped_cnt:	Number of @unmapped_dev_ids entries
89*4882a593Smuzhiyun  * @unmapped_dev_ids:	Pointer to an array of TI-SCI device identifiers of
90*4882a593Smuzhiyun  *			unmapped event sources.
91*4882a593Smuzhiyun  *			Unmapped Events are not part of the Global Event Map and
92*4882a593Smuzhiyun  *			they are converted to Global event within INTA to be
93*4882a593Smuzhiyun  *			received by the same INTA to generate an interrupt.
94*4882a593Smuzhiyun  *			In case an interrupt request comes for a device which is
95*4882a593Smuzhiyun  *			generating Unmapped Event, we must use the INTA's TI-SCI
96*4882a593Smuzhiyun  *			device identifier in place of the source device
97*4882a593Smuzhiyun  *			identifier to let sysfw know where it has to program the
98*4882a593Smuzhiyun  *			Global Event number.
99*4882a593Smuzhiyun  */
100*4882a593Smuzhiyun struct ti_sci_inta_irq_domain {
101*4882a593Smuzhiyun 	const struct ti_sci_handle *sci;
102*4882a593Smuzhiyun 	struct ti_sci_resource *vint;
103*4882a593Smuzhiyun 	struct ti_sci_resource *global_event;
104*4882a593Smuzhiyun 	struct list_head vint_list;
105*4882a593Smuzhiyun 	/* Mutex to protect vint list */
106*4882a593Smuzhiyun 	struct mutex vint_mutex;
107*4882a593Smuzhiyun 	void __iomem *base;
108*4882a593Smuzhiyun 	struct platform_device *pdev;
109*4882a593Smuzhiyun 	u32 ti_sci_id;
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	int unmapped_cnt;
112*4882a593Smuzhiyun 	u16 *unmapped_dev_ids;
113*4882a593Smuzhiyun };
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun #define to_vint_desc(e, i) container_of(e, struct ti_sci_inta_vint_desc, \
116*4882a593Smuzhiyun 					events[i])
117*4882a593Smuzhiyun 
ti_sci_inta_get_dev_id(struct ti_sci_inta_irq_domain * inta,u32 hwirq)118*4882a593Smuzhiyun static u16 ti_sci_inta_get_dev_id(struct ti_sci_inta_irq_domain *inta, u32 hwirq)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun 	u16 dev_id = HWIRQ_TO_DEVID(hwirq);
121*4882a593Smuzhiyun 	int i;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	if (inta->unmapped_cnt == 0)
124*4882a593Smuzhiyun 		return dev_id;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	/*
127*4882a593Smuzhiyun 	 * For devices sending Unmapped Events we must use the INTA's TI-SCI
128*4882a593Smuzhiyun 	 * device identifier number to be able to convert it to a Global Event
129*4882a593Smuzhiyun 	 * and map it to an interrupt.
130*4882a593Smuzhiyun 	 */
131*4882a593Smuzhiyun 	for (i = 0; i < inta->unmapped_cnt; i++) {
132*4882a593Smuzhiyun 		if (dev_id == inta->unmapped_dev_ids[i]) {
133*4882a593Smuzhiyun 			dev_id = inta->ti_sci_id;
134*4882a593Smuzhiyun 			break;
135*4882a593Smuzhiyun 		}
136*4882a593Smuzhiyun 	}
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	return dev_id;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun /**
142*4882a593Smuzhiyun  * ti_sci_inta_irq_handler() - Chained IRQ handler for the vint irqs
143*4882a593Smuzhiyun  * @desc:	Pointer to irq_desc corresponding to the irq
144*4882a593Smuzhiyun  */
ti_sci_inta_irq_handler(struct irq_desc * desc)145*4882a593Smuzhiyun static void ti_sci_inta_irq_handler(struct irq_desc *desc)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun 	struct ti_sci_inta_vint_desc *vint_desc;
148*4882a593Smuzhiyun 	struct ti_sci_inta_irq_domain *inta;
149*4882a593Smuzhiyun 	struct irq_domain *domain;
150*4882a593Smuzhiyun 	unsigned int virq, bit;
151*4882a593Smuzhiyun 	unsigned long val;
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	vint_desc = irq_desc_get_handler_data(desc);
154*4882a593Smuzhiyun 	domain = vint_desc->domain;
155*4882a593Smuzhiyun 	inta = domain->host_data;
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	chained_irq_enter(irq_desc_get_chip(desc), desc);
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	val = readq_relaxed(inta->base + vint_desc->vint_id * 0x1000 +
160*4882a593Smuzhiyun 			    VINT_STATUS_MASKED_OFFSET);
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	for_each_set_bit(bit, &val, MAX_EVENTS_PER_VINT) {
163*4882a593Smuzhiyun 		virq = irq_find_mapping(domain, vint_desc->events[bit].hwirq);
164*4882a593Smuzhiyun 		if (virq)
165*4882a593Smuzhiyun 			generic_handle_irq(virq);
166*4882a593Smuzhiyun 	}
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	chained_irq_exit(irq_desc_get_chip(desc), desc);
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun /**
172*4882a593Smuzhiyun  * ti_sci_inta_xlate_irq() - Translate hwirq to parent's hwirq.
173*4882a593Smuzhiyun  * @inta:	IRQ domain corresponding to Interrupt Aggregator
174*4882a593Smuzhiyun  * @irq:	Hardware irq corresponding to the above irq domain
175*4882a593Smuzhiyun  *
176*4882a593Smuzhiyun  * Return parent irq number if translation is available else -ENOENT.
177*4882a593Smuzhiyun  */
ti_sci_inta_xlate_irq(struct ti_sci_inta_irq_domain * inta,u16 vint_id)178*4882a593Smuzhiyun static int ti_sci_inta_xlate_irq(struct ti_sci_inta_irq_domain *inta,
179*4882a593Smuzhiyun 				 u16 vint_id)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun 	struct device_node *np = dev_of_node(&inta->pdev->dev);
182*4882a593Smuzhiyun 	u32 base, parent_base, size;
183*4882a593Smuzhiyun 	const __be32 *range;
184*4882a593Smuzhiyun 	int len;
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	range = of_get_property(np, "ti,interrupt-ranges", &len);
187*4882a593Smuzhiyun 	if (!range)
188*4882a593Smuzhiyun 		return vint_id;
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	for (len /= sizeof(*range); len >= 3; len -= 3) {
191*4882a593Smuzhiyun 		base = be32_to_cpu(*range++);
192*4882a593Smuzhiyun 		parent_base = be32_to_cpu(*range++);
193*4882a593Smuzhiyun 		size = be32_to_cpu(*range++);
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 		if (base <= vint_id && vint_id < base + size)
196*4882a593Smuzhiyun 			return vint_id - base + parent_base;
197*4882a593Smuzhiyun 	}
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	return -ENOENT;
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun /**
203*4882a593Smuzhiyun  * ti_sci_inta_alloc_parent_irq() - Allocate parent irq to Interrupt aggregator
204*4882a593Smuzhiyun  * @domain:	IRQ domain corresponding to Interrupt Aggregator
205*4882a593Smuzhiyun  *
206*4882a593Smuzhiyun  * Return 0 if all went well else corresponding error value.
207*4882a593Smuzhiyun  */
ti_sci_inta_alloc_parent_irq(struct irq_domain * domain)208*4882a593Smuzhiyun static struct ti_sci_inta_vint_desc *ti_sci_inta_alloc_parent_irq(struct irq_domain *domain)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun 	struct ti_sci_inta_irq_domain *inta = domain->host_data;
211*4882a593Smuzhiyun 	struct ti_sci_inta_vint_desc *vint_desc;
212*4882a593Smuzhiyun 	struct irq_fwspec parent_fwspec;
213*4882a593Smuzhiyun 	struct device_node *parent_node;
214*4882a593Smuzhiyun 	unsigned int parent_virq;
215*4882a593Smuzhiyun 	int p_hwirq, ret;
216*4882a593Smuzhiyun 	u16 vint_id;
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	vint_id = ti_sci_get_free_resource(inta->vint);
219*4882a593Smuzhiyun 	if (vint_id == TI_SCI_RESOURCE_NULL)
220*4882a593Smuzhiyun 		return ERR_PTR(-EINVAL);
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	p_hwirq = ti_sci_inta_xlate_irq(inta, vint_id);
223*4882a593Smuzhiyun 	if (p_hwirq < 0) {
224*4882a593Smuzhiyun 		ret = p_hwirq;
225*4882a593Smuzhiyun 		goto free_vint;
226*4882a593Smuzhiyun 	}
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	vint_desc = kzalloc(sizeof(*vint_desc), GFP_KERNEL);
229*4882a593Smuzhiyun 	if (!vint_desc) {
230*4882a593Smuzhiyun 		ret = -ENOMEM;
231*4882a593Smuzhiyun 		goto free_vint;
232*4882a593Smuzhiyun 	}
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	vint_desc->domain = domain;
235*4882a593Smuzhiyun 	vint_desc->vint_id = vint_id;
236*4882a593Smuzhiyun 	INIT_LIST_HEAD(&vint_desc->list);
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	parent_node = of_irq_find_parent(dev_of_node(&inta->pdev->dev));
239*4882a593Smuzhiyun 	parent_fwspec.fwnode = of_node_to_fwnode(parent_node);
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 	if (of_device_is_compatible(parent_node, "arm,gic-v3")) {
242*4882a593Smuzhiyun 		/* Parent is GIC */
243*4882a593Smuzhiyun 		parent_fwspec.param_count = 3;
244*4882a593Smuzhiyun 		parent_fwspec.param[0] = 0;
245*4882a593Smuzhiyun 		parent_fwspec.param[1] = p_hwirq - 32;
246*4882a593Smuzhiyun 		parent_fwspec.param[2] = IRQ_TYPE_LEVEL_HIGH;
247*4882a593Smuzhiyun 	} else {
248*4882a593Smuzhiyun 		/* Parent is Interrupt Router */
249*4882a593Smuzhiyun 		parent_fwspec.param_count = 1;
250*4882a593Smuzhiyun 		parent_fwspec.param[0] = p_hwirq;
251*4882a593Smuzhiyun 	}
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	parent_virq = irq_create_fwspec_mapping(&parent_fwspec);
254*4882a593Smuzhiyun 	if (parent_virq == 0) {
255*4882a593Smuzhiyun 		dev_err(&inta->pdev->dev, "Parent IRQ allocation failed\n");
256*4882a593Smuzhiyun 		ret = -EINVAL;
257*4882a593Smuzhiyun 		goto free_vint_desc;
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	}
260*4882a593Smuzhiyun 	vint_desc->parent_virq = parent_virq;
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	list_add_tail(&vint_desc->list, &inta->vint_list);
263*4882a593Smuzhiyun 	irq_set_chained_handler_and_data(vint_desc->parent_virq,
264*4882a593Smuzhiyun 					 ti_sci_inta_irq_handler, vint_desc);
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	return vint_desc;
267*4882a593Smuzhiyun free_vint_desc:
268*4882a593Smuzhiyun 	kfree(vint_desc);
269*4882a593Smuzhiyun free_vint:
270*4882a593Smuzhiyun 	ti_sci_release_resource(inta->vint, vint_id);
271*4882a593Smuzhiyun 	return ERR_PTR(ret);
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun /**
275*4882a593Smuzhiyun  * ti_sci_inta_alloc_event() - Attach an event to a IA vint.
276*4882a593Smuzhiyun  * @vint_desc:	Pointer to vint_desc to which the event gets attached
277*4882a593Smuzhiyun  * @free_bit:	Bit inside vint to which event gets attached
278*4882a593Smuzhiyun  * @hwirq:	hwirq of the input event
279*4882a593Smuzhiyun  *
280*4882a593Smuzhiyun  * Return event_desc pointer if all went ok else appropriate error value.
281*4882a593Smuzhiyun  */
ti_sci_inta_alloc_event(struct ti_sci_inta_vint_desc * vint_desc,u16 free_bit,u32 hwirq)282*4882a593Smuzhiyun static struct ti_sci_inta_event_desc *ti_sci_inta_alloc_event(struct ti_sci_inta_vint_desc *vint_desc,
283*4882a593Smuzhiyun 							      u16 free_bit,
284*4882a593Smuzhiyun 							      u32 hwirq)
285*4882a593Smuzhiyun {
286*4882a593Smuzhiyun 	struct ti_sci_inta_irq_domain *inta = vint_desc->domain->host_data;
287*4882a593Smuzhiyun 	struct ti_sci_inta_event_desc *event_desc;
288*4882a593Smuzhiyun 	u16 dev_id, dev_index;
289*4882a593Smuzhiyun 	int err;
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun 	dev_id = ti_sci_inta_get_dev_id(inta, hwirq);
292*4882a593Smuzhiyun 	dev_index = HWIRQ_TO_IRQID(hwirq);
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun 	event_desc = &vint_desc->events[free_bit];
295*4882a593Smuzhiyun 	event_desc->hwirq = hwirq;
296*4882a593Smuzhiyun 	event_desc->vint_bit = free_bit;
297*4882a593Smuzhiyun 	event_desc->global_event = ti_sci_get_free_resource(inta->global_event);
298*4882a593Smuzhiyun 	if (event_desc->global_event == TI_SCI_RESOURCE_NULL)
299*4882a593Smuzhiyun 		return ERR_PTR(-EINVAL);
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	err = inta->sci->ops.rm_irq_ops.set_event_map(inta->sci,
302*4882a593Smuzhiyun 						      dev_id, dev_index,
303*4882a593Smuzhiyun 						      inta->ti_sci_id,
304*4882a593Smuzhiyun 						      vint_desc->vint_id,
305*4882a593Smuzhiyun 						      event_desc->global_event,
306*4882a593Smuzhiyun 						      free_bit);
307*4882a593Smuzhiyun 	if (err)
308*4882a593Smuzhiyun 		goto free_global_event;
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	return event_desc;
311*4882a593Smuzhiyun free_global_event:
312*4882a593Smuzhiyun 	ti_sci_release_resource(inta->global_event, event_desc->global_event);
313*4882a593Smuzhiyun 	return ERR_PTR(err);
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun /**
317*4882a593Smuzhiyun  * ti_sci_inta_alloc_irq() -  Allocate an irq within INTA domain
318*4882a593Smuzhiyun  * @domain:	irq_domain pointer corresponding to INTA
319*4882a593Smuzhiyun  * @hwirq:	hwirq of the input event
320*4882a593Smuzhiyun  *
321*4882a593Smuzhiyun  * Note: Allocation happens in the following manner:
322*4882a593Smuzhiyun  *	- Find a free bit available in any of the vints available in the list.
323*4882a593Smuzhiyun  *	- If not found, allocate a vint from the vint pool
324*4882a593Smuzhiyun  *	- Attach the free bit to input hwirq.
325*4882a593Smuzhiyun  * Return event_desc if all went ok else appropriate error value.
326*4882a593Smuzhiyun  */
ti_sci_inta_alloc_irq(struct irq_domain * domain,u32 hwirq)327*4882a593Smuzhiyun static struct ti_sci_inta_event_desc *ti_sci_inta_alloc_irq(struct irq_domain *domain,
328*4882a593Smuzhiyun 							    u32 hwirq)
329*4882a593Smuzhiyun {
330*4882a593Smuzhiyun 	struct ti_sci_inta_irq_domain *inta = domain->host_data;
331*4882a593Smuzhiyun 	struct ti_sci_inta_vint_desc *vint_desc = NULL;
332*4882a593Smuzhiyun 	struct ti_sci_inta_event_desc *event_desc;
333*4882a593Smuzhiyun 	u16 free_bit;
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	mutex_lock(&inta->vint_mutex);
336*4882a593Smuzhiyun 	list_for_each_entry(vint_desc, &inta->vint_list, list) {
337*4882a593Smuzhiyun 		free_bit = find_first_zero_bit(vint_desc->event_map,
338*4882a593Smuzhiyun 					       MAX_EVENTS_PER_VINT);
339*4882a593Smuzhiyun 		if (free_bit != MAX_EVENTS_PER_VINT) {
340*4882a593Smuzhiyun 			set_bit(free_bit, vint_desc->event_map);
341*4882a593Smuzhiyun 			goto alloc_event;
342*4882a593Smuzhiyun 		}
343*4882a593Smuzhiyun 	}
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	/* No free bits available. Allocate a new vint */
346*4882a593Smuzhiyun 	vint_desc = ti_sci_inta_alloc_parent_irq(domain);
347*4882a593Smuzhiyun 	if (IS_ERR(vint_desc)) {
348*4882a593Smuzhiyun 		event_desc = ERR_CAST(vint_desc);
349*4882a593Smuzhiyun 		goto unlock;
350*4882a593Smuzhiyun 	}
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	free_bit = find_first_zero_bit(vint_desc->event_map,
353*4882a593Smuzhiyun 				       MAX_EVENTS_PER_VINT);
354*4882a593Smuzhiyun 	set_bit(free_bit, vint_desc->event_map);
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun alloc_event:
357*4882a593Smuzhiyun 	event_desc = ti_sci_inta_alloc_event(vint_desc, free_bit, hwirq);
358*4882a593Smuzhiyun 	if (IS_ERR(event_desc))
359*4882a593Smuzhiyun 		clear_bit(free_bit, vint_desc->event_map);
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun unlock:
362*4882a593Smuzhiyun 	mutex_unlock(&inta->vint_mutex);
363*4882a593Smuzhiyun 	return event_desc;
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun /**
367*4882a593Smuzhiyun  * ti_sci_inta_free_parent_irq() - Free a parent irq to INTA
368*4882a593Smuzhiyun  * @inta:	Pointer to inta domain.
369*4882a593Smuzhiyun  * @vint_desc:	Pointer to vint_desc that needs to be freed.
370*4882a593Smuzhiyun  */
ti_sci_inta_free_parent_irq(struct ti_sci_inta_irq_domain * inta,struct ti_sci_inta_vint_desc * vint_desc)371*4882a593Smuzhiyun static void ti_sci_inta_free_parent_irq(struct ti_sci_inta_irq_domain *inta,
372*4882a593Smuzhiyun 					struct ti_sci_inta_vint_desc *vint_desc)
373*4882a593Smuzhiyun {
374*4882a593Smuzhiyun 	if (find_first_bit(vint_desc->event_map, MAX_EVENTS_PER_VINT) == MAX_EVENTS_PER_VINT) {
375*4882a593Smuzhiyun 		list_del(&vint_desc->list);
376*4882a593Smuzhiyun 		ti_sci_release_resource(inta->vint, vint_desc->vint_id);
377*4882a593Smuzhiyun 		irq_dispose_mapping(vint_desc->parent_virq);
378*4882a593Smuzhiyun 		kfree(vint_desc);
379*4882a593Smuzhiyun 	}
380*4882a593Smuzhiyun }
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun /**
383*4882a593Smuzhiyun  * ti_sci_inta_free_irq() - Free an IRQ within INTA domain
384*4882a593Smuzhiyun  * @event_desc:	Pointer to event_desc that needs to be freed.
385*4882a593Smuzhiyun  * @hwirq:	Hwirq number within INTA domain that needs to be freed
386*4882a593Smuzhiyun  */
ti_sci_inta_free_irq(struct ti_sci_inta_event_desc * event_desc,u32 hwirq)387*4882a593Smuzhiyun static void ti_sci_inta_free_irq(struct ti_sci_inta_event_desc *event_desc,
388*4882a593Smuzhiyun 				 u32 hwirq)
389*4882a593Smuzhiyun {
390*4882a593Smuzhiyun 	struct ti_sci_inta_vint_desc *vint_desc;
391*4882a593Smuzhiyun 	struct ti_sci_inta_irq_domain *inta;
392*4882a593Smuzhiyun 	u16 dev_id;
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun 	vint_desc = to_vint_desc(event_desc, event_desc->vint_bit);
395*4882a593Smuzhiyun 	inta = vint_desc->domain->host_data;
396*4882a593Smuzhiyun 	dev_id = ti_sci_inta_get_dev_id(inta, hwirq);
397*4882a593Smuzhiyun 	/* free event irq */
398*4882a593Smuzhiyun 	mutex_lock(&inta->vint_mutex);
399*4882a593Smuzhiyun 	inta->sci->ops.rm_irq_ops.free_event_map(inta->sci,
400*4882a593Smuzhiyun 						 dev_id, HWIRQ_TO_IRQID(hwirq),
401*4882a593Smuzhiyun 						 inta->ti_sci_id,
402*4882a593Smuzhiyun 						 vint_desc->vint_id,
403*4882a593Smuzhiyun 						 event_desc->global_event,
404*4882a593Smuzhiyun 						 event_desc->vint_bit);
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	clear_bit(event_desc->vint_bit, vint_desc->event_map);
407*4882a593Smuzhiyun 	ti_sci_release_resource(inta->global_event, event_desc->global_event);
408*4882a593Smuzhiyun 	event_desc->global_event = TI_SCI_RESOURCE_NULL;
409*4882a593Smuzhiyun 	event_desc->hwirq = 0;
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun 	ti_sci_inta_free_parent_irq(inta, vint_desc);
412*4882a593Smuzhiyun 	mutex_unlock(&inta->vint_mutex);
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun /**
416*4882a593Smuzhiyun  * ti_sci_inta_request_resources() - Allocate resources for input irq
417*4882a593Smuzhiyun  * @data: Pointer to corresponding irq_data
418*4882a593Smuzhiyun  *
419*4882a593Smuzhiyun  * Note: This is the core api where the actual allocation happens for input
420*4882a593Smuzhiyun  *	 hwirq. This allocation involves creating a parent irq for vint.
421*4882a593Smuzhiyun  *	 If this is done in irq_domain_ops.alloc() then a deadlock is reached
422*4882a593Smuzhiyun  *	 for allocation. So this allocation is being done in request_resources()
423*4882a593Smuzhiyun  *
424*4882a593Smuzhiyun  * Return: 0 if all went well else corresponding error.
425*4882a593Smuzhiyun  */
ti_sci_inta_request_resources(struct irq_data * data)426*4882a593Smuzhiyun static int ti_sci_inta_request_resources(struct irq_data *data)
427*4882a593Smuzhiyun {
428*4882a593Smuzhiyun 	struct ti_sci_inta_event_desc *event_desc;
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun 	event_desc = ti_sci_inta_alloc_irq(data->domain, data->hwirq);
431*4882a593Smuzhiyun 	if (IS_ERR(event_desc))
432*4882a593Smuzhiyun 		return PTR_ERR(event_desc);
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 	data->chip_data = event_desc;
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 	return 0;
437*4882a593Smuzhiyun }
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun /**
440*4882a593Smuzhiyun  * ti_sci_inta_release_resources - Release resources for input irq
441*4882a593Smuzhiyun  * @data: Pointer to corresponding irq_data
442*4882a593Smuzhiyun  *
443*4882a593Smuzhiyun  * Note: Corresponding to request_resources(), all the unmapping and deletion
444*4882a593Smuzhiyun  *	 of parent vint irqs happens in this api.
445*4882a593Smuzhiyun  */
ti_sci_inta_release_resources(struct irq_data * data)446*4882a593Smuzhiyun static void ti_sci_inta_release_resources(struct irq_data *data)
447*4882a593Smuzhiyun {
448*4882a593Smuzhiyun 	struct ti_sci_inta_event_desc *event_desc;
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun 	event_desc = irq_data_get_irq_chip_data(data);
451*4882a593Smuzhiyun 	ti_sci_inta_free_irq(event_desc, data->hwirq);
452*4882a593Smuzhiyun }
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun /**
455*4882a593Smuzhiyun  * ti_sci_inta_manage_event() - Control the event based on the offset
456*4882a593Smuzhiyun  * @data:	Pointer to corresponding irq_data
457*4882a593Smuzhiyun  * @offset:	register offset using which event is controlled.
458*4882a593Smuzhiyun  */
ti_sci_inta_manage_event(struct irq_data * data,u32 offset)459*4882a593Smuzhiyun static void ti_sci_inta_manage_event(struct irq_data *data, u32 offset)
460*4882a593Smuzhiyun {
461*4882a593Smuzhiyun 	struct ti_sci_inta_event_desc *event_desc;
462*4882a593Smuzhiyun 	struct ti_sci_inta_vint_desc *vint_desc;
463*4882a593Smuzhiyun 	struct ti_sci_inta_irq_domain *inta;
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun 	event_desc = irq_data_get_irq_chip_data(data);
466*4882a593Smuzhiyun 	vint_desc = to_vint_desc(event_desc, event_desc->vint_bit);
467*4882a593Smuzhiyun 	inta = data->domain->host_data;
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 	writeq_relaxed(BIT(event_desc->vint_bit),
470*4882a593Smuzhiyun 		       inta->base + vint_desc->vint_id * 0x1000 + offset);
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun /**
474*4882a593Smuzhiyun  * ti_sci_inta_mask_irq() - Mask an event
475*4882a593Smuzhiyun  * @data:	Pointer to corresponding irq_data
476*4882a593Smuzhiyun  */
ti_sci_inta_mask_irq(struct irq_data * data)477*4882a593Smuzhiyun static void ti_sci_inta_mask_irq(struct irq_data *data)
478*4882a593Smuzhiyun {
479*4882a593Smuzhiyun 	ti_sci_inta_manage_event(data, VINT_ENABLE_CLR_OFFSET);
480*4882a593Smuzhiyun }
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun /**
483*4882a593Smuzhiyun  * ti_sci_inta_unmask_irq() - Unmask an event
484*4882a593Smuzhiyun  * @data:	Pointer to corresponding irq_data
485*4882a593Smuzhiyun  */
ti_sci_inta_unmask_irq(struct irq_data * data)486*4882a593Smuzhiyun static void ti_sci_inta_unmask_irq(struct irq_data *data)
487*4882a593Smuzhiyun {
488*4882a593Smuzhiyun 	ti_sci_inta_manage_event(data, VINT_ENABLE_SET_OFFSET);
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun /**
492*4882a593Smuzhiyun  * ti_sci_inta_ack_irq() - Ack an event
493*4882a593Smuzhiyun  * @data:	Pointer to corresponding irq_data
494*4882a593Smuzhiyun  */
ti_sci_inta_ack_irq(struct irq_data * data)495*4882a593Smuzhiyun static void ti_sci_inta_ack_irq(struct irq_data *data)
496*4882a593Smuzhiyun {
497*4882a593Smuzhiyun 	/*
498*4882a593Smuzhiyun 	 * Do not clear the event if hardware is capable of sending
499*4882a593Smuzhiyun 	 * a down event.
500*4882a593Smuzhiyun 	 */
501*4882a593Smuzhiyun 	if (irqd_get_trigger_type(data) != IRQF_TRIGGER_HIGH)
502*4882a593Smuzhiyun 		ti_sci_inta_manage_event(data, VINT_STATUS_OFFSET);
503*4882a593Smuzhiyun }
504*4882a593Smuzhiyun 
ti_sci_inta_set_affinity(struct irq_data * d,const struct cpumask * mask_val,bool force)505*4882a593Smuzhiyun static int ti_sci_inta_set_affinity(struct irq_data *d,
506*4882a593Smuzhiyun 				    const struct cpumask *mask_val, bool force)
507*4882a593Smuzhiyun {
508*4882a593Smuzhiyun 	return -EINVAL;
509*4882a593Smuzhiyun }
510*4882a593Smuzhiyun 
511*4882a593Smuzhiyun /**
512*4882a593Smuzhiyun  * ti_sci_inta_set_type() - Update the trigger type of the irq.
513*4882a593Smuzhiyun  * @data:	Pointer to corresponding irq_data
514*4882a593Smuzhiyun  * @type:	Trigger type as specified by user
515*4882a593Smuzhiyun  *
516*4882a593Smuzhiyun  * Note: This updates the handle_irq callback for level msi.
517*4882a593Smuzhiyun  *
518*4882a593Smuzhiyun  * Return 0 if all went well else appropriate error.
519*4882a593Smuzhiyun  */
ti_sci_inta_set_type(struct irq_data * data,unsigned int type)520*4882a593Smuzhiyun static int ti_sci_inta_set_type(struct irq_data *data, unsigned int type)
521*4882a593Smuzhiyun {
522*4882a593Smuzhiyun 	/*
523*4882a593Smuzhiyun 	 * .alloc default sets handle_edge_irq. But if the user specifies
524*4882a593Smuzhiyun 	 * that IRQ is level MSI, then update the handle to handle_level_irq
525*4882a593Smuzhiyun 	 */
526*4882a593Smuzhiyun 	switch (type & IRQ_TYPE_SENSE_MASK) {
527*4882a593Smuzhiyun 	case IRQF_TRIGGER_HIGH:
528*4882a593Smuzhiyun 		irq_set_handler_locked(data, handle_level_irq);
529*4882a593Smuzhiyun 		return 0;
530*4882a593Smuzhiyun 	case IRQF_TRIGGER_RISING:
531*4882a593Smuzhiyun 		return 0;
532*4882a593Smuzhiyun 	default:
533*4882a593Smuzhiyun 		return -EINVAL;
534*4882a593Smuzhiyun 	}
535*4882a593Smuzhiyun }
536*4882a593Smuzhiyun 
537*4882a593Smuzhiyun static struct irq_chip ti_sci_inta_irq_chip = {
538*4882a593Smuzhiyun 	.name			= "INTA",
539*4882a593Smuzhiyun 	.irq_ack		= ti_sci_inta_ack_irq,
540*4882a593Smuzhiyun 	.irq_mask		= ti_sci_inta_mask_irq,
541*4882a593Smuzhiyun 	.irq_set_type		= ti_sci_inta_set_type,
542*4882a593Smuzhiyun 	.irq_unmask		= ti_sci_inta_unmask_irq,
543*4882a593Smuzhiyun 	.irq_set_affinity	= ti_sci_inta_set_affinity,
544*4882a593Smuzhiyun 	.irq_request_resources	= ti_sci_inta_request_resources,
545*4882a593Smuzhiyun 	.irq_release_resources	= ti_sci_inta_release_resources,
546*4882a593Smuzhiyun };
547*4882a593Smuzhiyun 
548*4882a593Smuzhiyun /**
549*4882a593Smuzhiyun  * ti_sci_inta_irq_domain_free() - Free an IRQ from the IRQ domain
550*4882a593Smuzhiyun  * @domain:	Domain to which the irqs belong
551*4882a593Smuzhiyun  * @virq:	base linux virtual IRQ to be freed.
552*4882a593Smuzhiyun  * @nr_irqs:	Number of continuous irqs to be freed
553*4882a593Smuzhiyun  */
ti_sci_inta_irq_domain_free(struct irq_domain * domain,unsigned int virq,unsigned int nr_irqs)554*4882a593Smuzhiyun static void ti_sci_inta_irq_domain_free(struct irq_domain *domain,
555*4882a593Smuzhiyun 					unsigned int virq, unsigned int nr_irqs)
556*4882a593Smuzhiyun {
557*4882a593Smuzhiyun 	struct irq_data *data = irq_domain_get_irq_data(domain, virq);
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun 	irq_domain_reset_irq_data(data);
560*4882a593Smuzhiyun }
561*4882a593Smuzhiyun 
562*4882a593Smuzhiyun /**
563*4882a593Smuzhiyun  * ti_sci_inta_irq_domain_alloc() - Allocate Interrupt aggregator IRQs
564*4882a593Smuzhiyun  * @domain:	Point to the interrupt aggregator IRQ domain
565*4882a593Smuzhiyun  * @virq:	Corresponding Linux virtual IRQ number
566*4882a593Smuzhiyun  * @nr_irqs:	Continuous irqs to be allocated
567*4882a593Smuzhiyun  * @data:	Pointer to firmware specifier
568*4882a593Smuzhiyun  *
569*4882a593Smuzhiyun  * No actual allocation happens here.
570*4882a593Smuzhiyun  *
571*4882a593Smuzhiyun  * Return 0 if all went well else appropriate error value.
572*4882a593Smuzhiyun  */
ti_sci_inta_irq_domain_alloc(struct irq_domain * domain,unsigned int virq,unsigned int nr_irqs,void * data)573*4882a593Smuzhiyun static int ti_sci_inta_irq_domain_alloc(struct irq_domain *domain,
574*4882a593Smuzhiyun 					unsigned int virq, unsigned int nr_irqs,
575*4882a593Smuzhiyun 					void *data)
576*4882a593Smuzhiyun {
577*4882a593Smuzhiyun 	msi_alloc_info_t *arg = data;
578*4882a593Smuzhiyun 
579*4882a593Smuzhiyun 	irq_domain_set_info(domain, virq, arg->hwirq, &ti_sci_inta_irq_chip,
580*4882a593Smuzhiyun 			    NULL, handle_edge_irq, NULL, NULL);
581*4882a593Smuzhiyun 
582*4882a593Smuzhiyun 	return 0;
583*4882a593Smuzhiyun }
584*4882a593Smuzhiyun 
585*4882a593Smuzhiyun static const struct irq_domain_ops ti_sci_inta_irq_domain_ops = {
586*4882a593Smuzhiyun 	.free		= ti_sci_inta_irq_domain_free,
587*4882a593Smuzhiyun 	.alloc		= ti_sci_inta_irq_domain_alloc,
588*4882a593Smuzhiyun };
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun static struct irq_chip ti_sci_inta_msi_irq_chip = {
591*4882a593Smuzhiyun 	.name			= "MSI-INTA",
592*4882a593Smuzhiyun 	.flags			= IRQCHIP_SUPPORTS_LEVEL_MSI,
593*4882a593Smuzhiyun };
594*4882a593Smuzhiyun 
ti_sci_inta_msi_set_desc(msi_alloc_info_t * arg,struct msi_desc * desc)595*4882a593Smuzhiyun static void ti_sci_inta_msi_set_desc(msi_alloc_info_t *arg,
596*4882a593Smuzhiyun 				     struct msi_desc *desc)
597*4882a593Smuzhiyun {
598*4882a593Smuzhiyun 	struct platform_device *pdev = to_platform_device(desc->dev);
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun 	arg->desc = desc;
601*4882a593Smuzhiyun 	arg->hwirq = TO_HWIRQ(pdev->id, desc->inta.dev_index);
602*4882a593Smuzhiyun }
603*4882a593Smuzhiyun 
604*4882a593Smuzhiyun static struct msi_domain_ops ti_sci_inta_msi_ops = {
605*4882a593Smuzhiyun 	.set_desc	= ti_sci_inta_msi_set_desc,
606*4882a593Smuzhiyun };
607*4882a593Smuzhiyun 
608*4882a593Smuzhiyun static struct msi_domain_info ti_sci_inta_msi_domain_info = {
609*4882a593Smuzhiyun 	.flags	= (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
610*4882a593Smuzhiyun 		   MSI_FLAG_LEVEL_CAPABLE),
611*4882a593Smuzhiyun 	.ops	= &ti_sci_inta_msi_ops,
612*4882a593Smuzhiyun 	.chip	= &ti_sci_inta_msi_irq_chip,
613*4882a593Smuzhiyun };
614*4882a593Smuzhiyun 
ti_sci_inta_get_unmapped_sources(struct ti_sci_inta_irq_domain * inta)615*4882a593Smuzhiyun static int ti_sci_inta_get_unmapped_sources(struct ti_sci_inta_irq_domain *inta)
616*4882a593Smuzhiyun {
617*4882a593Smuzhiyun 	struct device *dev = &inta->pdev->dev;
618*4882a593Smuzhiyun 	struct device_node *node = dev_of_node(dev);
619*4882a593Smuzhiyun 	struct of_phandle_iterator it;
620*4882a593Smuzhiyun 	int count, err, ret, i;
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun 	count = of_count_phandle_with_args(node, "ti,unmapped-event-sources", NULL);
623*4882a593Smuzhiyun 	if (count <= 0)
624*4882a593Smuzhiyun 		return 0;
625*4882a593Smuzhiyun 
626*4882a593Smuzhiyun 	inta->unmapped_dev_ids = devm_kcalloc(dev, count,
627*4882a593Smuzhiyun 					      sizeof(*inta->unmapped_dev_ids),
628*4882a593Smuzhiyun 					      GFP_KERNEL);
629*4882a593Smuzhiyun 	if (!inta->unmapped_dev_ids)
630*4882a593Smuzhiyun 		return -ENOMEM;
631*4882a593Smuzhiyun 
632*4882a593Smuzhiyun 	i = 0;
633*4882a593Smuzhiyun 	of_for_each_phandle(&it, err, node, "ti,unmapped-event-sources", NULL, 0) {
634*4882a593Smuzhiyun 		u32 dev_id;
635*4882a593Smuzhiyun 
636*4882a593Smuzhiyun 		ret = of_property_read_u32(it.node, "ti,sci-dev-id", &dev_id);
637*4882a593Smuzhiyun 		if (ret) {
638*4882a593Smuzhiyun 			dev_err(dev, "ti,sci-dev-id read failure for %pOFf\n", it.node);
639*4882a593Smuzhiyun 			of_node_put(it.node);
640*4882a593Smuzhiyun 			return ret;
641*4882a593Smuzhiyun 		}
642*4882a593Smuzhiyun 		inta->unmapped_dev_ids[i++] = dev_id;
643*4882a593Smuzhiyun 	}
644*4882a593Smuzhiyun 
645*4882a593Smuzhiyun 	inta->unmapped_cnt = count;
646*4882a593Smuzhiyun 
647*4882a593Smuzhiyun 	return 0;
648*4882a593Smuzhiyun }
649*4882a593Smuzhiyun 
ti_sci_inta_irq_domain_probe(struct platform_device * pdev)650*4882a593Smuzhiyun static int ti_sci_inta_irq_domain_probe(struct platform_device *pdev)
651*4882a593Smuzhiyun {
652*4882a593Smuzhiyun 	struct irq_domain *parent_domain, *domain, *msi_domain;
653*4882a593Smuzhiyun 	struct device_node *parent_node, *node;
654*4882a593Smuzhiyun 	struct ti_sci_inta_irq_domain *inta;
655*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
656*4882a593Smuzhiyun 	struct resource *res;
657*4882a593Smuzhiyun 	int ret;
658*4882a593Smuzhiyun 
659*4882a593Smuzhiyun 	node = dev_of_node(dev);
660*4882a593Smuzhiyun 	parent_node = of_irq_find_parent(node);
661*4882a593Smuzhiyun 	if (!parent_node) {
662*4882a593Smuzhiyun 		dev_err(dev, "Failed to get IRQ parent node\n");
663*4882a593Smuzhiyun 		return -ENODEV;
664*4882a593Smuzhiyun 	}
665*4882a593Smuzhiyun 
666*4882a593Smuzhiyun 	parent_domain = irq_find_host(parent_node);
667*4882a593Smuzhiyun 	if (!parent_domain)
668*4882a593Smuzhiyun 		return -EPROBE_DEFER;
669*4882a593Smuzhiyun 
670*4882a593Smuzhiyun 	inta = devm_kzalloc(dev, sizeof(*inta), GFP_KERNEL);
671*4882a593Smuzhiyun 	if (!inta)
672*4882a593Smuzhiyun 		return -ENOMEM;
673*4882a593Smuzhiyun 
674*4882a593Smuzhiyun 	inta->pdev = pdev;
675*4882a593Smuzhiyun 	inta->sci = devm_ti_sci_get_by_phandle(dev, "ti,sci");
676*4882a593Smuzhiyun 	if (IS_ERR(inta->sci))
677*4882a593Smuzhiyun 		return dev_err_probe(dev, PTR_ERR(inta->sci),
678*4882a593Smuzhiyun 				     "ti,sci read fail\n");
679*4882a593Smuzhiyun 
680*4882a593Smuzhiyun 	ret = of_property_read_u32(dev->of_node, "ti,sci-dev-id", &inta->ti_sci_id);
681*4882a593Smuzhiyun 	if (ret) {
682*4882a593Smuzhiyun 		dev_err(dev, "missing 'ti,sci-dev-id' property\n");
683*4882a593Smuzhiyun 		return -EINVAL;
684*4882a593Smuzhiyun 	}
685*4882a593Smuzhiyun 
686*4882a593Smuzhiyun 	inta->vint = devm_ti_sci_get_resource(inta->sci, dev, inta->ti_sci_id,
687*4882a593Smuzhiyun 					      TI_SCI_RESASG_SUBTYPE_IA_VINT);
688*4882a593Smuzhiyun 	if (IS_ERR(inta->vint)) {
689*4882a593Smuzhiyun 		dev_err(dev, "VINT resource allocation failed\n");
690*4882a593Smuzhiyun 		return PTR_ERR(inta->vint);
691*4882a593Smuzhiyun 	}
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun 	inta->global_event = devm_ti_sci_get_resource(inta->sci, dev, inta->ti_sci_id,
694*4882a593Smuzhiyun 						      TI_SCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT);
695*4882a593Smuzhiyun 	if (IS_ERR(inta->global_event)) {
696*4882a593Smuzhiyun 		dev_err(dev, "Global event resource allocation failed\n");
697*4882a593Smuzhiyun 		return PTR_ERR(inta->global_event);
698*4882a593Smuzhiyun 	}
699*4882a593Smuzhiyun 
700*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
701*4882a593Smuzhiyun 	inta->base = devm_ioremap_resource(dev, res);
702*4882a593Smuzhiyun 	if (IS_ERR(inta->base))
703*4882a593Smuzhiyun 		return PTR_ERR(inta->base);
704*4882a593Smuzhiyun 
705*4882a593Smuzhiyun 	ret = ti_sci_inta_get_unmapped_sources(inta);
706*4882a593Smuzhiyun 	if (ret)
707*4882a593Smuzhiyun 		return ret;
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun 	domain = irq_domain_add_linear(dev_of_node(dev),
710*4882a593Smuzhiyun 				       ti_sci_get_num_resources(inta->vint),
711*4882a593Smuzhiyun 				       &ti_sci_inta_irq_domain_ops, inta);
712*4882a593Smuzhiyun 	if (!domain) {
713*4882a593Smuzhiyun 		dev_err(dev, "Failed to allocate IRQ domain\n");
714*4882a593Smuzhiyun 		return -ENOMEM;
715*4882a593Smuzhiyun 	}
716*4882a593Smuzhiyun 
717*4882a593Smuzhiyun 	msi_domain = ti_sci_inta_msi_create_irq_domain(of_node_to_fwnode(node),
718*4882a593Smuzhiyun 						&ti_sci_inta_msi_domain_info,
719*4882a593Smuzhiyun 						domain);
720*4882a593Smuzhiyun 	if (!msi_domain) {
721*4882a593Smuzhiyun 		irq_domain_remove(domain);
722*4882a593Smuzhiyun 		dev_err(dev, "Failed to allocate msi domain\n");
723*4882a593Smuzhiyun 		return -ENOMEM;
724*4882a593Smuzhiyun 	}
725*4882a593Smuzhiyun 
726*4882a593Smuzhiyun 	INIT_LIST_HEAD(&inta->vint_list);
727*4882a593Smuzhiyun 	mutex_init(&inta->vint_mutex);
728*4882a593Smuzhiyun 
729*4882a593Smuzhiyun 	dev_info(dev, "Interrupt Aggregator domain %d created\n", inta->ti_sci_id);
730*4882a593Smuzhiyun 
731*4882a593Smuzhiyun 	return 0;
732*4882a593Smuzhiyun }
733*4882a593Smuzhiyun 
734*4882a593Smuzhiyun static const struct of_device_id ti_sci_inta_irq_domain_of_match[] = {
735*4882a593Smuzhiyun 	{ .compatible = "ti,sci-inta", },
736*4882a593Smuzhiyun 	{ /* sentinel */ },
737*4882a593Smuzhiyun };
738*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ti_sci_inta_irq_domain_of_match);
739*4882a593Smuzhiyun 
740*4882a593Smuzhiyun static struct platform_driver ti_sci_inta_irq_domain_driver = {
741*4882a593Smuzhiyun 	.probe = ti_sci_inta_irq_domain_probe,
742*4882a593Smuzhiyun 	.driver = {
743*4882a593Smuzhiyun 		.name = "ti-sci-inta",
744*4882a593Smuzhiyun 		.of_match_table = ti_sci_inta_irq_domain_of_match,
745*4882a593Smuzhiyun 	},
746*4882a593Smuzhiyun };
747*4882a593Smuzhiyun module_platform_driver(ti_sci_inta_irq_domain_driver);
748*4882a593Smuzhiyun 
749*4882a593Smuzhiyun MODULE_AUTHOR("Lokesh Vutla <lokeshvutla@ti.com>");
750*4882a593Smuzhiyun MODULE_DESCRIPTION("K3 Interrupt Aggregator driver over TI SCI protocol");
751*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
752