Searched +full:rs485 +full:- +full:enabled +full:- +full:at +full:- +full:boot +full:- +full:time (Results 1 – 23 of 23) sorted by relevance
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * aks-cdu.dts - Device Tree file for AK signal CDU9 /dts-v1/;11 #include "ge863-pro3.dtsi"20 clock-frequency = <32768>;32 linux,rs485-enabled-at-boot-time;33 rs485-rts-delay = <0 0>;38 linux,rs485-enabled-at-boot-time;39 rs485-rts-delay = <0 0>;44 linux,rs485-enabled-at-boot-time;[all …]
1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause6 #include <dt-bindings/input/input.h>7 #include <dt-bindings/pwm/pwm.h>17 stdout-path = "serial0:115200n8";34 * line. Hence, the RX is always enabled here.36 rs485-rx-en {37 gpio-hog;39 output-low;40 line-name = "rs485-rx-en";45 gpio-line-names = "", "", "", "",[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * Copyright (C) 2013 Newflow Ltd - http://www.newflow.co.uk/5 /dts-v1/;15 cpu0-supply = <&dcdc2_reg>;25 compatible = "gpio-leds";30 default-state = "off";36 pinctrl-names = "default";37 pinctrl-0 = <&misc_pins>;40 pinctrl-single,pins = <46 pinctrl-single,pins = <[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * animeo_ip.dts - Device Tree file for Somfy Animeo IP Boards5 * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>8 /dts-v1/;13 compatible = "somfy,animeo-ip", "atmel,at91sam9260", "atmel,at91sam9";26 stdout-path = &usart2;35 clock-frequency = <32768>;39 clock-frequency = <18432000>;47 compatible = "atmel,tcb-timer";52 compatible = "atmel,tcb-timer";[all …]
1 // SPDX-License-Identifier: GPL-2.09 model = "Phytec AM335x phyBOARD-REGOR";10 compatible = "phytec,am335x-regor", "phytec,am335x-phycore-som", "ti,am33xx";13 compatible = "regulator-fixed";14 regulator-name = "vcc3v3";15 regulator-min-microvolt = <3300000>;16 regulator-max-microvolt = <3300000>;17 regulator-boot-on;22 compatible = "gpio-leds";23 pinctrl-names = "default";[all …]
1 // SPDX-License-Identifier: GPL-2.08 #include <dt-bindings/gpio/gpio.h>11 gpio-leds {12 compatible = "gpio-leds";13 pinctrl-names = "default";14 pinctrl-0 = <&pinctrl_gpio_leds>;17 label = "debug-led1";19 default-state = "off";20 linux,default-trigger = "heartbeat";24 label = "debug-led2";[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)7 * 2015 Gregory CLEMENT <gregory.clement@free-electrons.com>9 /dts-v1/;17 stdout-path = "serial0:115200n8";26 clock-frequency = <32768>;30 clock-frequency = <12000000>;42 pinctrl-names = "default";43 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat046 vqmmc-supply = <&vcc_3v3_reg>;47 vmmc-supply = <&vcc_3v3_reg>;[all …]
6 * Copyright (C) 2018 EETS GmbH - http://www.eets.ch/8 * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/10 * SPDX-License-Identifier: GPL-2.0+13 /dts-v1/;16 #include <dt-bindings/interrupt-controller/irq.h>17 #include <dt-bindings/leds/leds-pca9532.h>24 stdout-path = &uart3;29 cpu0-supply = <&vdd1_reg>;39 compatible = "regulator-fixed";40 regulator-name = "vbat";[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)3 // Copyright (C) 2016-2018 Zodiac Inflight Innovations5 /dts-v1/;10 compatible = "zii,vf610scu4-aib", "zii,vf610dev", "fsl,vf610";13 stdout-path = &uart0;21 gpio-leds {22 compatible = "gpio-leds";23 pinctrl-0 = <&pinctrl_leds_debug>;24 pinctrl-names = "default";29 linux,default-trigger = "heartbeat";[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 /dts-v1/;7 #include "imx53-m53.dtsi"13 gpio-keys {14 compatible = "gpio-keys";15 pinctrl-0 = <&pinctrl_power_button>;16 pinctrl-names = "default";18 power-button {25 gpio-poweroff {26 compatible = "gpio-poweroff";[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)3 * Copyright (C) 2016-2017 Zodiac Inflight Innovations6 #include <dt-bindings/gpio/gpio.h>7 #include <dt-bindings/sound/fsl-imx-audmux.h>11 stdout-path = &uart1;15 mdio-gpio0 = &mdio1;20 compatible = "virtual,mdio-gpio";21 #address-cells = <1>;22 #size-cells = <0>;23 pinctrl-names = "default";[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/serial/rs485.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: RS485 serial communications Bindings10 direction for the built-in half-duplex mode. The properties described11 hereafter shall be given to a half-duplex capable UART node.14 - Rob Herring <robh@kernel.org>17 rs485-rts-delay:18 description: prop-encoded-array <a b>[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#8 - Erwan Le Ray <erwan.leray@st.com>13 - $ref: rs485.yaml18 - st,stm32-uart19 - st,stm32f7-uart20 - st,stm32h7-uart37 st,hw-flow-ctrl:[all …]
4 - compatible : should be "ti,j721e-uart", "ti,am654-uart" for J721E controllers5 - compatible : should be "ti,am654-uart" for AM654 controllers6 - compatible : should be "ti,omap2-uart" for OMAP2 controllers7 - compatible : should be "ti,omap3-uart" for OMAP3 controllers8 - compatible : should be "ti,omap4-uart" for OMAP4 controllers9 - compatible : should be "ti,am4372-uart" for AM437x controllers10 - compatible : should be "ti,am3352-uart" for AM335x controllers11 - compatible : should be "ti,dra742-uart" for DRA7x controllers12 - reg : address and length of the register space13 - interrupts or interrupts-extended : Should contain the uart interrupt[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Fabio Estevam <fabio.estevam@nxp.com>13 - $ref: "serial.yaml"14 - $ref: "rs485.yaml"19 - const: fsl,imx1-uart20 - const: fsl,imx21-uart21 - items:[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/serial/fsl-lpuart.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Fugang Duan <fugang.duan@nxp.com>13 - $ref: "rs485.yaml"18 - enum:19 - fsl,vf610-lpuart20 - fsl,ls1021a-lpuart21 - fsl,ls1028a-lpuart[all …]
4 - compatible: Should be one of the following:5 - "atmel,at91rm9200-usart"6 - "atmel,at91sam9260-usart"7 - "microchip,sam9x60-usart"8 - "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart"9 - "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"10 - "microchip,sam9x60-dbgu", "microchip,sam9x60-usart"11 - reg: Should contain registers location and length12 - interrupts: Should contain interrupt13 - clock-names: tuple listing input clock names.[all …]
1 # SPDX-License-Identifier: GPL-2.024 non-standard serial ports, since the configuration information will52 If you did not notice yet and/or you have userspace from pre-3.7, it69 serial port. Doing so takes additional time at boot.75 bool "Support for Fintek F81216A LPC to 4 UART RS485 API"78 Selecting this option will add support for the RS485 capabilities102 your boot loader (grub or lilo or loadlin) about how to pass options103 to the kernel at boot time.)141 Note that serial ports on NetMos 9835 Multi-I/O cards are handled142 by the parport_serial driver, enabled with CONFIG_PARPORT_SERIAL.[all …]
1 // SPDX-License-Identifier: GPL-2.0+8 * Copyright (C) 2000-2001 Deep Blue Solutions Ltd.38 * lockdep: port->lock is initialized in two places, but we39 * want only one lock-class:43 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)46 * Max time with active RTS before/after data is sent.60 return !!(uport->status & UPSTAT_DCD_ENABLE); in uart_dcd_enabled()65 if (atomic_add_unless(&state->refcount, 1, 0)) in uart_port_ref()66 return state->uart_port; in uart_port_ref()72 if (atomic_dec_and_test(&uport->state->refcount)) in uart_port_deref()[all …]
1 // SPDX-License-Identifier: GPL-2.0+6 * Copyright (C) 2001-2002 Greg Kroah-Hartman <greg@kroah.com>49 #define DRIVER_AUTHOR "Greg Kroah-Hartman <greg@kroah.com> and David Iacovelli"165 struct TxFifo txfifo; /* transmit fifo -- size will be maxTxCredits */198 struct edge_boot_descriptor boot_descriptor; /* the boot firmware descriptor */346 * Boot ROM and Manufacture *353 struct device *dev = &edge_serial->serial->dev->dev; in update_edgeport_E2PROM()365 switch (edge_serial->product_info.iDownloadFile) { in update_edgeport_E2PROM()367 fw_name = "edgeport/boot.fw"; in update_edgeport_E2PROM()377 &edge_serial->serial->dev->dev); in update_edgeport_E2PROM()[all …]
1 // SPDX-License-Identifier: GPL-2.013 * Copyright (C) 2007-2009 Jiri Slaby <jirislaby@gmail.com>17 * extensively rewritten by Theodore Ts'o, 8/16/92 -- 9/14/92,137 Cyclom-Y/ISA boards at all addresses in here. If you want the138 driver to probe addresses at a different address, add it to165 /* This is the per-card data structure containing address, irq, number of175 * are accessed via settings in info->port.flags.226 * CD1400-based boards (rev. 6.00 or later), there is no need for special236 /* The Cyclom-Ye has placed the sequential chips in non-sequential237 * address order. This look-up table overcomes that problem.[all …]
1 // SPDX-License-Identifier: GPL-2.0+3 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.5 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).6 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>15 * - Fixed x86_64 cleanness110 { "CI-104J series", 4, },113 /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */114 { "CI-132 series", 4, MXSER_HAS2 },115 { "CI-134 series", 4, },116 { "CP-132 series", 2, },[all …]
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