1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyunmaintainers: 8*4882a593Smuzhiyun - Erwan Le Ray <erwan.leray@st.com> 9*4882a593Smuzhiyun 10*4882a593Smuzhiyuntitle: STMicroelectronics STM32 USART bindings 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunallOf: 13*4882a593Smuzhiyun - $ref: rs485.yaml 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunproperties: 16*4882a593Smuzhiyun compatible: 17*4882a593Smuzhiyun enum: 18*4882a593Smuzhiyun - st,stm32-uart 19*4882a593Smuzhiyun - st,stm32f7-uart 20*4882a593Smuzhiyun - st,stm32h7-uart 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun reg: 23*4882a593Smuzhiyun maxItems: 1 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun interrupts: 26*4882a593Smuzhiyun maxItems: 1 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun clocks: 29*4882a593Smuzhiyun maxItems: 1 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun resets: 32*4882a593Smuzhiyun maxItems: 1 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun label: 35*4882a593Smuzhiyun description: label associated with this uart 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun st,hw-flow-ctrl: 38*4882a593Smuzhiyun description: enable hardware flow control (deprecated) 39*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/flag 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun uart-has-rtscts: true 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun dmas: 44*4882a593Smuzhiyun minItems: 1 45*4882a593Smuzhiyun maxItems: 2 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun dma-names: 48*4882a593Smuzhiyun items: 49*4882a593Smuzhiyun enum: [ rx, tx ] 50*4882a593Smuzhiyun minItems: 1 51*4882a593Smuzhiyun maxItems: 2 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun cts-gpios: 54*4882a593Smuzhiyun maxItems: 1 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun rts-gpios: 57*4882a593Smuzhiyun maxItems: 1 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun wakeup-source: true 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun rs485-rts-delay: true 62*4882a593Smuzhiyun rs485-rts-active-low: true 63*4882a593Smuzhiyun linux,rs485-enabled-at-boot-time: true 64*4882a593Smuzhiyun rs485-rx-during-tx: true 65*4882a593Smuzhiyun 66*4882a593Smuzhiyunif: 67*4882a593Smuzhiyun required: 68*4882a593Smuzhiyun - st,hw-flow-ctrl 69*4882a593Smuzhiyunthen: 70*4882a593Smuzhiyun properties: 71*4882a593Smuzhiyun cts-gpios: false 72*4882a593Smuzhiyun rts-gpios: false 73*4882a593Smuzhiyun 74*4882a593Smuzhiyunrequired: 75*4882a593Smuzhiyun - compatible 76*4882a593Smuzhiyun - reg 77*4882a593Smuzhiyun - interrupts 78*4882a593Smuzhiyun - clocks 79*4882a593Smuzhiyun 80*4882a593SmuzhiyunadditionalProperties: 81*4882a593Smuzhiyun type: object 82*4882a593Smuzhiyun 83*4882a593Smuzhiyunexamples: 84*4882a593Smuzhiyun - | 85*4882a593Smuzhiyun #include <dt-bindings/clock/stm32mp1-clks.h> 86*4882a593Smuzhiyun usart1: serial@40011000 { 87*4882a593Smuzhiyun compatible = "st,stm32-uart"; 88*4882a593Smuzhiyun reg = <0x40011000 0x400>; 89*4882a593Smuzhiyun interrupts = <37>; 90*4882a593Smuzhiyun clocks = <&rcc 0 164>; 91*4882a593Smuzhiyun dmas = <&dma2 2 4 0x414 0x0>, 92*4882a593Smuzhiyun <&dma2 7 4 0x414 0x0>; 93*4882a593Smuzhiyun dma-names = "rx", "tx"; 94*4882a593Smuzhiyun rs485-rts-active-low; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun... 98