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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,disp.txt4 The Mediatek display subsystem consists of various DISP function blocks in the
10 All DISP device tree nodes must be siblings to the central MMSYS_CONFIG node.
14 DISP function blocks
19 interface, or writes pixels back to memory. All DISP function blocks have
29 - compatible: "mediatek,<chip>-disp-<function>", one of
30 "mediatek,<chip>-disp-ovl" - overlay (4 layers, blending, csc)
31 "mediatek,<chip>-disp-ovl-2l" - overlay (2 layers, blending, csc)
32 "mediatek,<chip>-disp-rdma" - read DMA / line buffer
33 "mediatek,<chip>-disp-wdma" - write DMA
34 "mediatek,<chip>-disp-ccorr" - color correction
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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi14 #include <dt-bindings/clock/mt8173-clk.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #include <dt-bindings/memory/mt8173-larb-port.h>
18 #include <dt-bindings/phy/phy.h>
19 #include <dt-bindings/power/mt8173-power.h>
20 #include <dt-bindings/reset/mt8173-resets.h>
21 #include <dt-bindings/gce/mt8173-gce.h>
22 #include <dt-bindings/thermal/thermal.h>
23 #include "mt8173-pinfunc.h"
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/mediatek/
H A Dmtk_drm_drv.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/soc/mediatek/mtk-mmsys.h>
14 #include <linux/dma-mapping.h>
51 if (info->num_planes != 1) in mtk_drm_mode_fb_create()
52 return ERR_PTR(-EINVAL); in mtk_drm_mode_fb_create()
168 struct mtk_drm_private *private = drm->dev_private; in mtk_drm_kms_init()
175 return -EPROBE_DEFER; in mtk_drm_kms_init()
177 pdev = of_find_device_by_node(private->mutex_node); in mtk_drm_kms_init()
179 dev_err(drm->dev, "Waiting for disp-mutex device %pOF\n", in mtk_drm_kms_init()
180 private->mutex_node); in mtk_drm_kms_init()
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H A Dmtk_disp_color.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/soc/mediatek/mtk-cmdq.h>
20 #define DISP_COLOR_START(comp) ((comp)->data->color_offset)
32 * struct mtk_disp_color - DISP_COLOR driver structure
33 * @ddp_comp - structure containing type enum and hardware resources
34 * @crtc - associated crtc to report irq events to
62 comp->regs + DISP_COLOR_CFG_MAIN); in mtk_color_start()
63 writel(0x1, comp->regs + DISP_COLOR_START(color)); in mtk_color_start()
78 ret = mtk_ddp_comp_register(drm_dev, &priv->ddp_comp); in mtk_disp_color_bind()
81 dev->of_node, ret); in mtk_disp_color_bind()
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H A Dmtk_disp_rdma.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/soc/mediatek/mtk-cmdq.h>
48 #define RDMA_FIFO_SIZE(rdma) ((rdma)->data->fifo_size)
58 * struct mtk_disp_rdma - DISP_RDMA driver structure
59 * @ddp_comp - structure containing type enum and hardware resources
60 * @crtc - associated crtc to report irq events to
76 struct mtk_ddp_comp *rdma = &priv->ddp_comp; in mtk_disp_rdma_irq_handler()
79 writel(0x0, rdma->regs + DISP_REG_RDMA_INT_STATUS); in mtk_disp_rdma_irq_handler()
81 if (!priv->crtc) in mtk_disp_rdma_irq_handler()
84 mtk_crtc_ddp_irq(priv->crtc, rdma); in mtk_disp_rdma_irq_handler()
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H A Dmtk_drm_ddp.c1 // SPDX-License-Identifier: GPL-2.0-only
192 return ERR_PTR(-EINVAL); in mtk_disp_mutex_get()
193 if (ddp->mutex[id].claimed) in mtk_disp_mutex_get()
194 return ERR_PTR(-EBUSY); in mtk_disp_mutex_get()
196 ddp->mutex[id].claimed = true; in mtk_disp_mutex_get()
198 return &ddp->mutex[id]; in mtk_disp_mutex_get()
204 mutex[mutex->id]); in mtk_disp_mutex_put()
206 WARN_ON(&ddp->mutex[mutex->id] != mutex); in mtk_disp_mutex_put()
208 mutex->claimed = false; in mtk_disp_mutex_put()
214 mutex[mutex->id]); in mtk_disp_mutex_prepare()
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H A Dmtk_disp_ovl.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/soc/mediatek/mtk-cmdq.h>
37 #define DISP_REG_OVL_ADDR(ovl, n) ((ovl)->data->addr + 0x20 * (n))
50 #define OVL_CON_CLRFMT_RGB565(ovl) ((ovl)->data->fmt_rgb565_is_0 ? \
52 #define OVL_CON_CLRFMT_RGB888(ovl) ((ovl)->data->fmt_rgb565_is_0 ? \
67 * struct mtk_disp_ovl - DISP_OVL driver structure
68 * @ddp_comp - structure containing type enum and hardware resources
69 * @crtc - associated crtc to report vblank events to
85 struct mtk_ddp_comp *ovl = &priv->ddp_comp; in mtk_disp_ovl_irq_handler()
88 writel(0x0, ovl->regs + DISP_REG_OVL_INTSTA); in mtk_disp_ovl_irq_handler()
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pwm/
H A Dpwm-mtk-disp.txt4 - compatible: should be "mediatek,<name>-disp-pwm":
5 - "mediatek,mt2701-disp-pwm": found on mt2701 SoC.
6 - "mediatek,mt6595-disp-pwm": found on mt6595 SoC.
7 - "mediatek,mt8173-disp-pwm": found on mt8173 SoC.
8 - reg: physical base address and length of the controller's registers.
9 - #pwm-cells: must be 2. See pwm.yaml in this directory for a description of
11 - clocks: phandle and clock specifier of the PWM reference clock.
12 - clock-names: must contain the following:
13 - "main": clock used to generate PWM signals.
14 - "mm": sync signals from the modules of mmsys.
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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dmt7623n.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright © 2017-2020 MediaTek Inc.
10 #include <dt-bindings/memory/mt2701-larb-port.h>
19 compatible = "mediatek,mt7623-g3dsys",
20 "mediatek,mt2701-g3dsys",
23 #clock-cells = <1>;
24 #reset-cells = <1>;
28 compatible = "mediatek,mt7623-mali", "arm,mali-450";
41 interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1",
46 clock-names = "bus", "core";
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H A Dmt2701.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt2701-clk.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/mt2701-power.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/memory/mt2701-larb-port.h>
14 #include <dt-bindings/reset/mt2701-resets.h>
15 #include "mt2701-pinfunc.h"
18 #address-cells = <2>;
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/iommu/
H A Dmediatek,iommu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yong Wu <yong.wu@mediatek.com>
16 ARM Short-Descriptor translation table format for address translation.
24 +--------+
26 gals0-rx gals1-rx (Global Async Local Sync rx)
29 gals0-tx gals1-tx (Global Async Local Sync tx)
31 +--------+
35 +----------------+-------
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/OK3568_Linux_fs/kernel/drivers/pwm/
H A Dpwm-mtk-disp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * MediaTek display pulse-width-modulation controller driver.
25 #define PWM_PERIOD_MASK ((1 << PWM_PERIOD_BIT_WIDTH) - 1)
60 void __iomem *address = mdp->base + offset; in mtk_disp_pwm_update_bits()
84 * period = (PWM_CLK_RATE * period_ns) / (10^9 * (clk_div + 1)) - 1 in mtk_disp_pwm_config()
87 rate = clk_get_rate(mdp->clk_main); in mtk_disp_pwm_config()
91 return -EINVAL; in mtk_disp_pwm_config()
96 period--; in mtk_disp_pwm_config()
101 err = clk_enable(mdp->clk_main); in mtk_disp_pwm_config()
105 err = clk_enable(mdp->clk_mm); in mtk_disp_pwm_config()
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/OK3568_Linux_fs/kernel/drivers/soc/mediatek/
H A Dmtk-scpsys.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <dt-bindings/power/mt2701-power.h>
17 #include <dt-bindings/power/mt2712-power.h>
18 #include <dt-bindings/power/mt6797-power.h>
19 #include <dt-bindings/power/mt7622-power.h>
20 #include <dt-bindings/power/mt7623a-power.h>
21 #include <dt-bindings/power/mt8173-power.h>
28 #define MTK_SCPD_CAPS(_scpd, _x) ((_scpd)->data->caps & (_x))
37 #define SPM_AUDIO_PWR_CON 0x029c /* MT8173, MT2712 */
72 #define PWR_STATUS_MFG_2D BIT(22) /* MT8173 */
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/OK3568_Linux_fs/kernel/drivers/iommu/
H A Dmtk_iommu.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015-2016 MediaTek Inc.
11 #include <linux/dma-direct.h>
12 #include <linux/dma-iommu.h>
124 ((((pdata)->flags) & (_x)) == (_x))
150 * |---A---|---B---|---C---|---D---|---E---|
151 * +--I/O--+------------Memory-------------+
157 * |---E---|---B---|---C---|---D---|
158 * +------------Memory-------------+
181 { .iova_base = 0x0, .size = SZ_4G}, /* disp: 0 ~ 4G */
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