Searched +full:jz4780 +full:- +full:dma (Results 1 – 17 of 17) sorted by relevance
1 // SPDX-License-Identifier: GPL-2.02 #include <dt-bindings/clock/jz4780-cgu.h>3 #include <dt-bindings/clock/ingenic,tcu.h>4 #include <dt-bindings/dma/jz4780-dma.h>7 #address-cells = <1>;8 #size-cells = <1>;9 compatible = "ingenic,jz4780";12 #address-cells = <1>;13 #size-cells = <0>;17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";[all …]
1 // SPDX-License-Identifier: GPL-2.02 #include <dt-bindings/clock/ingenic,tcu.h>3 #include <dt-bindings/clock/x1830-cgu.h>4 #include <dt-bindings/dma/x1830-dma.h>7 #address-cells = <1>;8 #size-cells = <1>;12 #address-cells = <1>;13 #size-cells = <0>;17 compatible = "ingenic,xburst-fpu2.0-mxu2.0";21 clock-names = "cpu";[all …]
1 // SPDX-License-Identifier: GPL-2.02 #include <dt-bindings/clock/ingenic,tcu.h>3 #include <dt-bindings/clock/x1000-cgu.h>4 #include <dt-bindings/dma/x1000-dma.h>7 #address-cells = <1>;8 #size-cells = <1>;12 #address-cells = <1>;13 #size-cells = <0>;17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";21 clock-names = "cpu";[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Paul Cercueil <paul@crapouillou.net>13 - $ref: mmc-controller.yaml#18 - enum:19 - ingenic,jz4740-mmc20 - ingenic,jz4725b-mmc21 - ingenic,jz4760-mmc22 - ingenic,jz4780-mmc[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Paul Cercueil <paul@crapouillou.net>13 - $ref: /schemas/i2c/i2c-controller.yaml#17 pattern: "^i2c@[0-9a-f]+$"21 - enum:22 - ingenic,jz4770-i2c23 - ingenic,x1000-i2c24 - items:[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Paul Cercueil <paul@crapouillou.net>13 - $ref: /schemas/serial.yaml#17 pattern: "^serial@[0-9a-f]+$"21 - enum:22 - ingenic,jz4740-uart23 - ingenic,jz4760-uart24 - ingenic,jz4780-uart[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/dma/ingenic,dma.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Ingenic SoCs DMA Controller DT bindings10 - Paul Cercueil <paul@crapouillou.net>13 - $ref: "dma-controller.yaml#"18 - ingenic,jz4740-dma19 - ingenic,jz4725b-dma20 - ingenic,jz4770-dma[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * Ingenic JZ4780 DMA controller6 * Author: Alex Smith <alex@alex-smith.me.uk>21 #include "virt-dma.h"37 /* Per-channel registers. */98 * struct jz4780_dma_hwdesc - descriptor structure read by the DMA controller.178 return container_of(jzchan->vchan.chan.device, struct jz4780_dma_dev, in jz4780_dma_chan_parent()185 return readl(jzdma->chn_base + reg + JZ_DMA_REG_CHAN(chn)); in jz4780_dma_chn_readl()191 writel(val, jzdma->chn_base + reg + JZ_DMA_REG_CHAN(chn)); in jz4780_dma_chn_writel()197 return readl(jzdma->ctrl_base + reg); in jz4780_dma_ctrl_readl()[all …]
1 # SPDX-License-Identifier: GPL-2.03 subdir-ccflags-$(CONFIG_DMADEVICES_DEBUG) := -DDEBUG4 subdir-ccflags-$(CONFIG_DMADEVICES_VDEBUG) += -DVERBOSE_DEBUG7 obj-$(CONFIG_DMA_ENGINE) += dmaengine.o8 obj-$(CONFIG_DMA_VIRTUAL_CHANNELS) += virt-dma.o9 obj-$(CONFIG_DMA_ACPI) += acpi-dma.o10 obj-$(CONFIG_DMA_OF) += of-dma.o13 obj-$(CONFIG_DMATEST) += dmatest.o16 obj-$(CONFIG_ALTERA_MSGDMA) += altera-msgdma.o17 obj-$(CONFIG_AMBA_PL08X) += amba-pl08x.o[all …]
1 # SPDX-License-Identifier: GPL-2.0-only3 # DMA engine configuration7 bool "DMA Engine support"10 DMA engines can do asynchronous data transfers without14 DMA Device drivers supported by the configured arch, it may18 bool "DMA Engine debugging"22 say N here. This enables DMA engine core and driver debugging.25 bool "DMA Engine verbose debugging"30 the DMA engine core and drivers.35 comment "DMA Devices"[all …]
1 // SPDX-License-Identifier: GPL-2.0-only6 * Pierre-Yves Mordret <pierre-yves.mordret@st.com>10 * Inspired by stm32-dma.c and dma-jz4780.c16 #include <linux/dma-mapping.h>33 #include "virt-dma.h"36 #define STM32_MDMA_SHIFT(n) (ffs(n) - 1)285 return container_of(chan->vchan.chan.device, struct stm32_mdma_device, in stm32_mdma_get_dev()301 return &chan->vchan.chan.dev->device; in chan2dev()306 return mdma_dev->ddev.dev; in mdma2dev()311 return readl_relaxed(dmadev->base + reg); in stm32_mdma_read()[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Paul Cercueil <paul@crapouillou.net>14 pattern: '^audio-controller@'18 - enum:19 - ingenic,jz4740-i2s20 - ingenic,jz4760-i2s21 - ingenic,jz4770-i2s22 - ingenic,jz4780-i2s[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>18 #include <linux/dma-mapping.h>27 #include "jz4740-i2s.h"116 return readl(i2s->base + reg); in jz4740_i2s_read()122 writel(value, i2s->base + reg); in jz4740_i2s_write()139 ret = clk_prepare_enable(i2s->clk_i2s); in jz4740_i2s_startup()163 clk_disable_unprepare(i2s->clk_i2s); in jz4740_i2s_shutdown()174 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in jz4740_i2s_trigger()193 return -EINVAL; in jz4740_i2s_trigger()[all …]
1 # SPDX-License-Identifier: GPL-2.0-only33 This option will enable the dma to work correctly, if you are using34 Qcom SOCs and MMC, you would probably need this option to get DMA working.44 If you have a STM32 sdmmc host with internal DMA say Y here.85 implements a hardware byte swapper using a 32-bit datum.114 disabled, it will steal the MMC cards away - rendering them245 This selects the SDHCI support for CNS3xxx System-on-Chip devices.322 This selects the SDHCI support for SiRF System-on-Chip devices.369 bool "DMA support on S3C SDHCI"372 Enable DMA support on the Samsung S3C SDHCI glue. The DMA[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>13 #include <linux/dma-mapping.h>19 #include <linux/mmc/slot-gpio.h>130 * is in-flight. This is used via the pre_req/post_req hooks.174 /* DMA support */179 /* The DMA trigger level is 8 words, that is to say, the DMA read180 * trigger is when data words in MSC_RXFIFO is >= 8 and the DMA write189 if (host->version >= JZ_MMC_JZ4725B) in jz4740_mmc_write_irq_mask()190 return writel(val, host->base + JZ_REG_MMC_IMASK); in jz4740_mmc_write_irq_mask()[all …]
9 -------------------------30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------97 W: *Web-page* with status/info[all …]
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