1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/i2c/ingenic,i2c.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Ingenic SoCs I2C controller devicetree bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Paul Cercueil <paul@crapouillou.net> 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunallOf: 13*4882a593Smuzhiyun - $ref: /schemas/i2c/i2c-controller.yaml# 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunproperties: 16*4882a593Smuzhiyun $nodename: 17*4882a593Smuzhiyun pattern: "^i2c@[0-9a-f]+$" 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun compatible: 20*4882a593Smuzhiyun oneOf: 21*4882a593Smuzhiyun - enum: 22*4882a593Smuzhiyun - ingenic,jz4770-i2c 23*4882a593Smuzhiyun - ingenic,x1000-i2c 24*4882a593Smuzhiyun - items: 25*4882a593Smuzhiyun - const: ingenic,jz4780-i2c 26*4882a593Smuzhiyun - const: ingenic,jz4770-i2c 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun reg: 29*4882a593Smuzhiyun maxItems: 1 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun interrupts: 32*4882a593Smuzhiyun maxItems: 1 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun clocks: 35*4882a593Smuzhiyun maxItems: 1 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun clock-frequency: 38*4882a593Smuzhiyun enum: [ 100000, 400000 ] 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun dmas: 41*4882a593Smuzhiyun items: 42*4882a593Smuzhiyun - description: DMA controller phandle and request line for RX 43*4882a593Smuzhiyun - description: DMA controller phandle and request line for TX 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun dma-names: 46*4882a593Smuzhiyun items: 47*4882a593Smuzhiyun - const: rx 48*4882a593Smuzhiyun - const: tx 49*4882a593Smuzhiyun 50*4882a593Smuzhiyunrequired: 51*4882a593Smuzhiyun - compatible 52*4882a593Smuzhiyun - reg 53*4882a593Smuzhiyun - interrupts 54*4882a593Smuzhiyun - clocks 55*4882a593Smuzhiyun - clock-frequency 56*4882a593Smuzhiyun - dmas 57*4882a593Smuzhiyun - dma-names 58*4882a593Smuzhiyun 59*4882a593SmuzhiyununevaluatedProperties: false 60*4882a593Smuzhiyun 61*4882a593Smuzhiyunexamples: 62*4882a593Smuzhiyun - | 63*4882a593Smuzhiyun #include <dt-bindings/clock/jz4780-cgu.h> 64*4882a593Smuzhiyun #include <dt-bindings/dma/jz4780-dma.h> 65*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/irq.h> 66*4882a593Smuzhiyun i2c@10054000 { 67*4882a593Smuzhiyun compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c"; 68*4882a593Smuzhiyun #address-cells = <1>; 69*4882a593Smuzhiyun #size-cells = <0>; 70*4882a593Smuzhiyun reg = <0x10054000 0x1000>; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun interrupt-parent = <&intc>; 73*4882a593Smuzhiyun interrupts = <56>; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun clocks = <&cgu JZ4780_CLK_SMB4>; 76*4882a593Smuzhiyun pinctrl-names = "default"; 77*4882a593Smuzhiyun pinctrl-0 = <&pins_i2c4_data>; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun dmas = <&dma JZ4780_DMA_SMB4_RX 0xffffffff>, 80*4882a593Smuzhiyun <&dma JZ4780_DMA_SMB4_TX 0xffffffff>; 81*4882a593Smuzhiyun dma-names = "rx", "tx"; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun clock-frequency = <400000>; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun rtc@51 { 86*4882a593Smuzhiyun compatible = "nxp,pcf8563"; 87*4882a593Smuzhiyun reg = <0x51>; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun interrupt-parent = <&gpf>; 90*4882a593Smuzhiyun interrupts = <30 IRQ_TYPE_LEVEL_LOW>; 91*4882a593Smuzhiyun }; 92*4882a593Smuzhiyun }; 93