Searched +full:exynos5250 +full:- +full:pmu (Results 1 – 25 of 25) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/arm/samsung/pmu.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Samsung Exynos SoC series Power Management Unit (PMU)10 - Krzysztof Kozlowski <krzk@kernel.org>18 - samsung,exynos3250-pmu19 - samsung,exynos4210-pmu20 - samsung,exynos4412-pmu21 - samsung,exynos5250-pmu[all …]
2 -------------------------------------------------5 - compatible : should be one of the listed compatibles:6 - "samsung,s5pv210-mipi-video-phy"7 - "samsung,exynos5420-mipi-video-phy"8 - "samsung,exynos5433-mipi-video-phy"9 - #phy-cells : from the generic phy bindings, must be 1;12 - syscon - phandle to the PMU system controller15 - samsung,pmu-syscon - phandle to the PMU system controller16 - samsung,disp-sysreg - phandle to the DISP system registers controller17 - samsung,cam0-sysreg - phandle to the CAM0 system registers controller[all …]
1 // SPDX-License-Identifier: GPL-2.05 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.28 arm_a7_pmu: arm-a7-pmu {29 compatible = "arm,cortex-a7-pmu";30 interrupt-parent = <&gic>;38 arm_a15_pmu: arm-a15-pmu {39 compatible = "arm,cortex-a15-pmu";40 interrupt-parent = <&combiner>;49 compatible = "arm,armv7-timer";54 clock-frequency = <24000000>;[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Samsung Exynos5250 SoC device tree source8 * Samsung Exynos5250 SoC device nodes are listed in this file.9 * Exynos5250 based board files can include this file and provide13 * Exynos5250 SoC. As device tree coverage for Exynos5250 increases,17 #include <dt-bindings/clock/exynos5250.h>19 #include "exynos4-cpu-thermal.dtsi"20 #include <dt-bindings/clock/exynos-audss-clk.h>23 compatible = "samsung,exynos5250", "samsung,exynos5";50 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: GPL-2.014 #include <dt-bindings/clock/exynos5410.h>15 #include <dt-bindings/clock/exynos-audss-clk.h>16 #include <dt-bindings/interrupt-controller/arm-gic.h>20 interrupt-parent = <&gic>;30 #address-cells = <1>;31 #size-cells = <0>;35 compatible = "arm,cortex-a15";37 clock-frequency = <1600000000>;42 compatible = "arm,cortex-a15";[all …]
1 // SPDX-License-Identifier: GPL-2.09 #include <dt-bindings/clock/exynos5260-clk.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/interrupt-controller/irq.h>15 interrupt-parent = <&gic>;16 #address-cells = <1>;17 #size-cells = <1>;34 #address-cells = <1>;35 #size-cells = <0>;39 compatible = "arm,cortex-a15";[all …]
1 // SPDX-License-Identifier: GPL-2.014 #include <dt-bindings/clock/exynos5420.h>15 #include <dt-bindings/clock/exynos-audss-clk.h>16 #include <dt-bindings/interrupt-controller/arm-gic.h>42 * by exynos5420-cpus.dtsi or exynos5422-cpus.dtsi.46 compatible = "operating-points-v2";47 opp-shared;49 opp-1800000000 {50 opp-hz = /bits/ 64 <1800000000>;51 opp-microvolt = <1250000 1250000 1500000>;[all …]
1 // SPDX-License-Identifier: GPL-2.019 #include "exynos4-cpu-thermal.dtsi"29 fimc-lite0 = &fimc_lite_0;30 fimc-lite1 = &fimc_lite_1;35 #address-cells = <1>;36 #size-cells = <0>;40 compatible = "arm,cortex-a9";43 clock-names = "cpu";44 operating-points-v2 = <&cpu0_opp_table>;45 #cooling-cells = <2>; /* min followed by max */[all …]
1 // SPDX-License-Identifier: GPL-2.017 #include "exynos4-cpu-thermal.dtsi"18 #include <dt-bindings/clock/exynos3250.h>19 #include <dt-bindings/interrupt-controller/arm-gic.h>20 #include <dt-bindings/interrupt-controller/irq.h>24 interrupt-parent = <&gic>;25 #address-cells = <1>;26 #size-cells = <1>;50 #address-cells = <1>;51 #size-cells = <0>;[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/watchdog/samsung-wdt.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Krzysztof Kozlowski <krzk@kernel.org>20 - samsung,s3c2410-wdt # for S3C241021 - samsung,s3c6410-wdt # for S3C6410, S5PV210 and Exynos422 - samsung,exynos5250-wdt # for Exynos525023 - samsung,exynos5420-wdt # for Exynos542024 - samsung,exynos7-wdt # for Exynos7[all …]
1 # SPDX-License-Identifier: GPL-2.03 obj-$(CONFIG_EXYNOS_ASV) += exynos-asv.o4 obj-$(CONFIG_EXYNOS_ASV_ARM) += exynos5422-asv.o6 obj-$(CONFIG_EXYNOS_CHIPID) += exynos-chipid.o7 obj-$(CONFIG_EXYNOS_PMU) += exynos-pmu.o9 obj-$(CONFIG_EXYNOS_PMU_ARM_DRIVERS) += exynos3250-pmu.o exynos4-pmu.o \10 exynos5250-pmu.o exynos5420-pmu.o11 obj-$(CONFIG_EXYNOS_PM_DOMAINS) += pm_domains.o12 obj-$(CONFIG_EXYNOS_REGULATOR_COUPLER) += exynos-regulator-coupler.o14 obj-$(CONFIG_SAMSUNG_PM_CHECK) += s3c-pm-check.o[all …]
1 // SPDX-License-Identifier: GPL-2.03 // Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.6 // Exynos - CPU PMU(Power Management Unit) support15 #include <linux/soc/samsung/exynos-regs-pmu.h>16 #include <linux/soc/samsung/exynos-pmu.h>18 #include "exynos-pmu.h"43 if (!pmu_context || !pmu_context->pmu_data) in exynos_sys_powerdown_conf()46 pmu_data = pmu_context->pmu_data; in exynos_sys_powerdown_conf()48 if (pmu_data->powerdown_conf) in exynos_sys_powerdown_conf()49 pmu_data->powerdown_conf(mode); in exynos_sys_powerdown_conf()[all …]
1 // SPDX-License-Identifier: GPL-2.03 // Copyright (c) 2011-2015 Samsung Electronics Co., Ltd.6 // Exynos5250 - CPU PMU (Power Management Unit) support8 #include <linux/soc/samsung/exynos-regs-pmu.h>9 #include <linux/soc/samsung/exynos-pmu.h>11 #include "exynos-pmu.h"
1 // SPDX-License-Identifier: GPL-2.05 // Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.15 #include <linux/soc/samsung/exynos-regs-pmu.h>18 #include <asm/hardware/cache-l2x0.h>33 .id = -1,52 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") { in exynos_sysram_init()62 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") { in exynos_sysram_init()78 if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid")) in exynos_fdt_map_chipid()86 iodesc.length = be32_to_cpu(reg[1]) - 1; in exynos_fdt_map_chipid()135 * Apparently, these SoCs are not able to wake-up from suspend using[all …]
1 // SPDX-License-Identifier: GPL-2.03 // Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.6 // Exynos - Suspend support8 // Based on arch/arm/mach-s3c2410/pm.c23 #include <linux/soc/samsung/exynos-pmu.h>24 #include <linux/soc/samsung/exynos-regs-pmu.h>27 #include <asm/hardware/cache-l2x0.h>36 #define REG_TABLE_END (-1U)41 * struct exynos_wkup_irq - PMU IRQ to mask mapping42 * @hwirq: Hardware IRQ signal of the PMU[all …]
1 // SPDX-License-Identifier: GPL-2.0-only11 #include <linux/clk-provider.h>39 clkout->pmu_debug_save = readl(clkout->reg + EXYNOS_PMU_DEBUG_REG); in exynos_clkout_suspend()46 writel(clkout->pmu_debug_save, clkout->reg + EXYNOS_PMU_DEBUG_REG); in exynos_clkout_resume()67 spin_lock_init(&clkout->slock); in exynos_clkout_init()87 clkout->reg = of_iomap(node, 0); in exynos_clkout_init()88 if (!clkout->reg) in exynos_clkout_init()91 clkout->gate.reg = clkout->reg + EXYNOS_PMU_DEBUG_REG; in exynos_clkout_init()92 clkout->gate.bit_idx = EXYNOS_CLKOUT_DISABLE_SHIFT; in exynos_clkout_init()93 clkout->gate.flags = CLK_GATE_SET_TO_DISABLE; in exynos_clkout_init()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only7 * Common Clock Framework support for Exynos5250 SoC.10 #include <dt-bindings/clock/exynos5250.h>11 #include <linux/clk-provider.h>17 #include "clk-cpu.h"18 #include "clk-exynos5-subcmu.h"606 GATE(CLK_PMU, "pmu", "div_aclk66", GATE_IP_PERIS, 2, CLK_IGNORE_UNUSED,776 { .compatible = "samsung,clock-xxti", .data = (void *)0, },796 hws = ctx->clk_data.hws; in exynos5250_clk_init()857 pr_info("Exynos5250: clock setup completed, armclk=%ld\n", in exynos5250_clk_init()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only20 #include <linux/soc/samsung/exynos-regs-pmu.h>35 /* Disable power isolation on DP-PHY */ in exynos_dp_video_phy_power_on()36 return regmap_update_bits(state->regs, state->drvdata->phy_ctrl_offset, in exynos_dp_video_phy_power_on()44 /* Enable power isolation on DP-PHY */ in exynos_dp_video_phy_power_off()45 return regmap_update_bits(state->regs, state->drvdata->phy_ctrl_offset, in exynos_dp_video_phy_power_off()65 .compatible = "samsung,exynos5250-dp-video-phy",68 .compatible = "samsung,exynos5420-dp-video-phy",78 struct device *dev = &pdev->dev; in exynos_dp_video_phy_probe()84 return -ENOMEM; in exynos_dp_video_phy_probe()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only18 #include "phy-samsung-usb2.h"23 struct samsung_usb2_phy_driver *drv = inst->drv; in samsung_usb2_phy_power_on()26 dev_dbg(drv->dev, "Request to power_on \"%s\" usb phy\n", in samsung_usb2_phy_power_on()27 inst->cfg->label); in samsung_usb2_phy_power_on()29 if (drv->vbus) { in samsung_usb2_phy_power_on()30 ret = regulator_enable(drv->vbus); in samsung_usb2_phy_power_on()35 ret = clk_prepare_enable(drv->clk); in samsung_usb2_phy_power_on()38 ret = clk_prepare_enable(drv->ref_clk); in samsung_usb2_phy_power_on()41 if (inst->cfg->power_on) { in samsung_usb2_phy_power_on()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only26 #include <linux/soc/samsung/exynos-regs-pmu.h>176 * struct exynos5_usbdrd_phy - driver data for USB 3.0 PHY218 phys[(inst)->index]); in to_usbdrd_phy()252 return -EINVAL; in exynos5_rate_to_clk()263 if (!inst->reg_pmu) in exynos5_usbdrd_phy_isol()268 regmap_update_bits(inst->reg_pmu, inst->pmu_offset, in exynos5_usbdrd_phy_isol()284 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST); in exynos5_usbdrd_pipe3_set_refclk()294 switch (phy_drd->extrefclk) { in exynos5_usbdrd_pipe3_set_refclk()312 dev_dbg(phy_drd->dev, "unsupported ref clk\n"); in exynos5_usbdrd_pipe3_set_refclk()[all …]
1 // SPDX-License-Identifier: GPL-2.0+20 #include <linux/soc/samsung/exynos-regs-pmu.h>22 #include "pinctrl-samsung.h"23 #include "pinctrl-exynos.h"45 void __iomem *clk_base = (void __iomem *)drvdata->retention_ctrl->priv; in s5pv210_retention_disable()62 ctrl = devm_kzalloc(drvdata->dev, sizeof(*ctrl), GFP_KERNEL); in s5pv210_retention_init()64 return ERR_PTR(-ENOMEM); in s5pv210_retention_init()66 np = of_find_compatible_node(NULL, NULL, "samsung,s5pv210-clock"); in s5pv210_retention_init()70 return ERR_PTR(-ENODEV); in s5pv210_retention_init()77 return ERR_PTR(-EINVAL); in s5pv210_retention_init()[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/iio/adc/samsung,exynos-adc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Krzysztof Kozlowski <krzk@kernel.org>15 - samsung,exynos-adc-v1 # Exynos525016 - samsung,exynos-adc-v217 - samsung,exynos3250-adc18 - samsung,exynos4212-adc # Exynos4212 and Exynos441219 - samsung,exynos7-adc[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later63 /* These quirks require that we have a PMU register map */87 * struct s3c2410_wdt_variant - Per-variant config data164 { .compatible = "samsung,s3c2410-wdt",166 { .compatible = "samsung,s3c6410-wdt",168 { .compatible = "samsung,exynos5250-wdt",170 { .compatible = "samsung,exynos5420-wdt",172 { .compatible = "samsung,exynos7-wdt",181 .name = "s3c2410-wdt",206 u32 mask_val = 1 << wdt->drv_data->mask_bit; in s3c2410wdt_mask_and_disable_reset()[all …]
9 -------------------------30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------97 W: *Web-page* with status/info[all …]
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