xref: /OK3568_Linux_fs/kernel/drivers/phy/samsung/phy-exynos-dp-video.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Samsung Exynos SoC series Display Port PHY driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
6*4882a593Smuzhiyun  * Author: Jingoo Han <jg1.han@samsung.com>
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/err.h>
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/mfd/syscon.h>
14*4882a593Smuzhiyun #include <linux/of.h>
15*4882a593Smuzhiyun #include <linux/of_address.h>
16*4882a593Smuzhiyun #include <linux/of_device.h>
17*4882a593Smuzhiyun #include <linux/phy/phy.h>
18*4882a593Smuzhiyun #include <linux/platform_device.h>
19*4882a593Smuzhiyun #include <linux/regmap.h>
20*4882a593Smuzhiyun #include <linux/soc/samsung/exynos-regs-pmu.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun struct exynos_dp_video_phy_drvdata {
23*4882a593Smuzhiyun 	u32 phy_ctrl_offset;
24*4882a593Smuzhiyun };
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun struct exynos_dp_video_phy {
27*4882a593Smuzhiyun 	struct regmap *regs;
28*4882a593Smuzhiyun 	const struct exynos_dp_video_phy_drvdata *drvdata;
29*4882a593Smuzhiyun };
30*4882a593Smuzhiyun 
exynos_dp_video_phy_power_on(struct phy * phy)31*4882a593Smuzhiyun static int exynos_dp_video_phy_power_on(struct phy *phy)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun 	struct exynos_dp_video_phy *state = phy_get_drvdata(phy);
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun 	/* Disable power isolation on DP-PHY */
36*4882a593Smuzhiyun 	return regmap_update_bits(state->regs, state->drvdata->phy_ctrl_offset,
37*4882a593Smuzhiyun 				  EXYNOS4_PHY_ENABLE, EXYNOS4_PHY_ENABLE);
38*4882a593Smuzhiyun }
39*4882a593Smuzhiyun 
exynos_dp_video_phy_power_off(struct phy * phy)40*4882a593Smuzhiyun static int exynos_dp_video_phy_power_off(struct phy *phy)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun 	struct exynos_dp_video_phy *state = phy_get_drvdata(phy);
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 	/* Enable power isolation on DP-PHY */
45*4882a593Smuzhiyun 	return regmap_update_bits(state->regs, state->drvdata->phy_ctrl_offset,
46*4882a593Smuzhiyun 				  EXYNOS4_PHY_ENABLE, 0);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun static const struct phy_ops exynos_dp_video_phy_ops = {
50*4882a593Smuzhiyun 	.power_on	= exynos_dp_video_phy_power_on,
51*4882a593Smuzhiyun 	.power_off	= exynos_dp_video_phy_power_off,
52*4882a593Smuzhiyun 	.owner		= THIS_MODULE,
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun static const struct exynos_dp_video_phy_drvdata exynos5250_dp_video_phy = {
56*4882a593Smuzhiyun 	.phy_ctrl_offset	= EXYNOS5_DPTX_PHY_CONTROL,
57*4882a593Smuzhiyun };
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun static const struct exynos_dp_video_phy_drvdata exynos5420_dp_video_phy = {
60*4882a593Smuzhiyun 	.phy_ctrl_offset	= EXYNOS5420_DPTX_PHY_CONTROL,
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun static const struct of_device_id exynos_dp_video_phy_of_match[] = {
64*4882a593Smuzhiyun 	{
65*4882a593Smuzhiyun 		.compatible = "samsung,exynos5250-dp-video-phy",
66*4882a593Smuzhiyun 		.data = &exynos5250_dp_video_phy,
67*4882a593Smuzhiyun 	}, {
68*4882a593Smuzhiyun 		.compatible = "samsung,exynos5420-dp-video-phy",
69*4882a593Smuzhiyun 		.data = &exynos5420_dp_video_phy,
70*4882a593Smuzhiyun 	},
71*4882a593Smuzhiyun 	{ },
72*4882a593Smuzhiyun };
73*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, exynos_dp_video_phy_of_match);
74*4882a593Smuzhiyun 
exynos_dp_video_phy_probe(struct platform_device * pdev)75*4882a593Smuzhiyun static int exynos_dp_video_phy_probe(struct platform_device *pdev)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun 	struct exynos_dp_video_phy *state;
78*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
79*4882a593Smuzhiyun 	struct phy_provider *phy_provider;
80*4882a593Smuzhiyun 	struct phy *phy;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL);
83*4882a593Smuzhiyun 	if (!state)
84*4882a593Smuzhiyun 		return -ENOMEM;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	state->regs = syscon_regmap_lookup_by_phandle(dev->of_node,
87*4882a593Smuzhiyun 						      "samsung,pmu-syscon");
88*4882a593Smuzhiyun 	if (IS_ERR(state->regs)) {
89*4882a593Smuzhiyun 		dev_err(dev, "Failed to lookup PMU regmap\n");
90*4882a593Smuzhiyun 		return PTR_ERR(state->regs);
91*4882a593Smuzhiyun 	}
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	state->drvdata = of_device_get_match_data(dev);
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	phy = devm_phy_create(dev, NULL, &exynos_dp_video_phy_ops);
96*4882a593Smuzhiyun 	if (IS_ERR(phy)) {
97*4882a593Smuzhiyun 		dev_err(dev, "failed to create Display Port PHY\n");
98*4882a593Smuzhiyun 		return PTR_ERR(phy);
99*4882a593Smuzhiyun 	}
100*4882a593Smuzhiyun 	phy_set_drvdata(phy, state);
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	return PTR_ERR_OR_ZERO(phy_provider);
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun static struct platform_driver exynos_dp_video_phy_driver = {
108*4882a593Smuzhiyun 	.probe	= exynos_dp_video_phy_probe,
109*4882a593Smuzhiyun 	.driver = {
110*4882a593Smuzhiyun 		.name	= "exynos-dp-video-phy",
111*4882a593Smuzhiyun 		.of_match_table	= exynos_dp_video_phy_of_match,
112*4882a593Smuzhiyun 		.suppress_bind_attrs = true,
113*4882a593Smuzhiyun 	}
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun module_platform_driver(exynos_dp_video_phy_driver);
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun MODULE_AUTHOR("Jingoo Han <jg1.han@samsung.com>");
118*4882a593Smuzhiyun MODULE_DESCRIPTION("Samsung Exynos SoC DP PHY driver");
119*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
120