| /OK3568_Linux_fs/kernel/drivers/gpu/arm/midgard/backend/gpu/ |
| H A D | mali_kbase_pm_policy.h | 75 * @shader_cores: A bitmask of shader cores which are necessary for the job 80 * work of ensuring the requested cores will remain powered until a matching 88 * kbase_pm_request_cores - Mark one or more cores as being required 93 * @shader_cores: A bitmask of shader cores which are necessary for the job 95 * This function is called by the job scheduler to mark one or more cores as 98 * The cores requested are reference counted and a subsequent call to 100 * made to dereference the cores as being 'needed'. 103 * requested cores in the system. Any core transitions needed will be begun 104 * immediately, but they might not complete/the cores might not be available 107 * Return: 0 if the cores were successfully requested, or -errno otherwise. [all …]
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| H A D | mali_kbase_js_affinity.c | 41 * all cores on slot 1 could be blocked by those using a coherent group in kbase_js_can_run_job_on_slot_no_lock() 62 * all cores */ in kbase_js_can_run_job_on_slot_no_lock() 79 * - all working cores will be powered on when this is called. 82 * and high cores in a core split will be evently distributed. 103 * If no cores are currently available (core availability policy is in kbase_js_choose_affinity() 162 /* All cores are available when no core split is in kbase_js_choose_affinity() 170 * If no cores are currently available in the desired core group(s) in kbase_js_choose_affinity() 192 * architectural issues where a job in slot A targetting cores used by in kbase_js_affinity_is_violating() 235 u64 cores; in kbase_js_affinity_retain_slot_cores() local 244 cores = affinity; in kbase_js_affinity_retain_slot_cores() [all …]
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| H A D | mali_kbase_pm_driver.c | 59 * @ACTION_PRESENT: The cores that are present 60 * @ACTION_READY: The cores that are ready 61 * @ACTION_PWRON: Power on the cores specified 62 * @ACTION_PWROFF: Power off the cores specified 63 * @ACTION_PWRTRANS: The cores that are transitioning 64 * @ACTION_PWRACTIVE: The cores that are active 176 * This function performs the action given by @action on a set of cores of a 182 * @cores: A bit mask of cores to perform the action on (low 32 bits) 183 * @action: The action to perform on the cores 187 u64 cores, in kbase_pm_invoke() argument [all …]
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| H A D | mali_kbase_pm_internal.h | 52 * kbase_pm_get_present_cores - Get details of the cores that are present in 56 * the cores (of a specified type) present in the GPU device and also a count of 57 * the number of cores. 63 * Return: The bit mask of cores present 69 * kbase_pm_get_active_cores - Get details of the cores that are currently 73 * the cores (of a specified type) that are actively processing work (i.e. 79 * Return: The bit mask of active cores 85 * kbase_pm_get_trans_cores - Get details of the cores that are currently 89 * the cores (of a specified type) that are currently transitioning between 95 * Return: The bit mask of transitioning cores [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | mp.c | 78 u32 cores, cpu_up_mask = 1; in fsl_layerscape_wake_seconday_cores() local 83 /* update for secondary cores */ in fsl_layerscape_wake_seconday_cores() 89 cores = cpu_mask(); in fsl_layerscape_wake_seconday_cores() 98 printf("Waking secondary cores to start from %lx\n", gd->relocaddr); in fsl_layerscape_wake_seconday_cores() 109 rst->brrl = cores; in fsl_layerscape_wake_seconday_cores() 113 * Release the cores out of reset one-at-a-time to avoid in fsl_layerscape_wake_seconday_cores() 141 gur_out32(&gur->brrl, cores); in fsl_layerscape_wake_seconday_cores() 144 /* Bootup online cores */ in fsl_layerscape_wake_seconday_cores() 145 scfg_out32(&scfg->corebcr, cores); in fsl_layerscape_wake_seconday_cores() 149 * cores then the pre-bootloader code will trap them in a "wfe" unless in fsl_layerscape_wake_seconday_cores() [all …]
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| /OK3568_Linux_fs/kernel/sound/soc/intel/skylake/ |
| H A D | skl-sst-dsp.c | 31 * successful first boot. Hence core 0 will be running and other cores 39 skl->cores.state[SKL_DSP_CORE0_ID] = SKL_DSP_RUNNING; in skl_dsp_init_core_state() 40 skl->cores.usage_count[SKL_DSP_CORE0_ID] = 1; in skl_dsp_init_core_state() 42 for (i = SKL_DSP_CORE0_ID + 1; i < skl->cores.count; i++) { in skl_dsp_init_core_state() 43 skl->cores.state[i] = SKL_DSP_RESET; in skl_dsp_init_core_state() 44 skl->cores.usage_count[i] = 0; in skl_dsp_init_core_state() 48 /* Get the mask for all enabled cores */ 55 core_mask = SKL_DSP_CORES_MASK(skl->cores.count); in skl_dsp_get_enabled_cores() 59 /* Cores having CPA bit set */ in skl_dsp_get_enabled_cores() 63 /* And cores having CRST bit cleared */ in skl_dsp_get_enabled_cores() [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/ |
| H A D | mali_kbase_dummy_job_wa.c | 114 u64 cores, u64 jc) in run_job() argument 124 cores & U32_MAX); in run_job() 126 cores >> 32); in run_job() 141 "Failed to run WA job on slot %d cores 0x%llx: done 0x%lx\n", in run_job() 142 slot, (unsigned long long)cores, in run_job() 154 int kbase_dummy_job_wa_execute(struct kbase_device *kbdev, u64 cores) in kbase_dummy_job_wa_execute() argument 180 /* power up requested cores */ in kbase_dummy_job_wa_execute() 181 kbase_reg_write(kbdev, SHADER_PWRON_LO, (cores & U32_MAX)); in kbase_dummy_job_wa_execute() 182 kbase_reg_write(kbdev, SHADER_PWRON_HI, (cores >> 32)); in kbase_dummy_job_wa_execute() 186 wait(kbdev, SHADER_READY_LO, (cores & U32_MAX), true); in kbase_dummy_job_wa_execute() [all …]
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| /OK3568_Linux_fs/kernel/Documentation/admin-guide/ |
| H A D | lockup-watchdogs.rst | 67 By default, the watchdog runs on all online cores. However, on a 69 on the housekeeping cores, not the cores specified in the "nohz_full" 71 the "nohz_full" cores, we would have to run timer ticks to activate 73 from protecting the user code on those cores from the kernel. 74 Of course, disabling it by default on the nohz_full cores means that 75 when those cores do enter the kernel, by default we will not be 77 to continue to run on the housekeeping (non-tickless) cores means 78 that we will continue to detect lockups properly on those cores. 80 In either case, the set of cores excluded from running the watchdog 82 nohz_full cores, this may be useful for debugging a case where the [all …]
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/lib/gcc/aarch64-none-linux-gnu/10.3.1/plugin/include/ |
| H A D | b-header-vars | 15 …ypes.h aarch64-opts.h aarch64-cores.def aarch64-arches.def aarch64-fusion-pairs.def aarch64-tuning… 20 …ypes.h aarch64-opts.h aarch64-cores.def aarch64-arches.def aarch64-fusion-pairs.def aarch64-tuning… 29 …cores.def aarch64-arches.def aarch64-fusion-pairs.def aarch64-tuning-flags.def real.h fixed-value.… 33 …flag-types.h options.h flag-types.h config/aarch64/aarch64-opts.h aarch64-cores.def aarch64-arches… 36 …flag-types.h options.h flag-types.h config/aarch64/aarch64-opts.h aarch64-cores.def aarch64-arches… 37 …flag-types.h options.h flag-types.h config/aarch64/aarch64-opts.h aarch64-cores.def aarch64-arches… 39 …ypes.h aarch64-opts.h aarch64-cores.def aarch64-arches.def aarch64-fusion-pairs.def aarch64-tuning… 40 …cores.def aarch64-arches.def aarch64-fusion-pairs.def aarch64-tuning-flags.def aarch64-cores.def h… 44 FLAGS_H=flags.h flag-types.h options.h flag-types.h config/aarch64/aarch64-opts.h aarch64-cores.def… 45 OPTIONS_H=options.h flag-types.h config/aarch64/aarch64-opts.h aarch64-cores.def aarch64-arches.def… [all …]
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| /OK3568_Linux_fs/buildroot/arch/ |
| H A D | Config.in.arm | 5 # for some cores, NEON support is optional 9 # For some cores, the FPU is optional 16 # for some cores, VFPv2 is optional 25 # for some cores, VFPv3 is optional 34 # for some cores, VFPv4 is optional 100 comment "armv4 cores" 124 comment "armv5 cores" 144 comment "armv6 cores" 179 comment "armv7a cores" 262 comment "armv7m cores" [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/backend/gpu/ |
| H A D | mali_kbase_pm_mcu_states.h | 36 * @ON_CORE_ATTR_UPDATE_PEND: The MCU is active and mask of enabled shader cores 48 * @HCTL_CORES_NOTIFY_PEND: Shader cores have powered up and firmware is being 49 * notified of the mask of enabled shader cores. 52 * enabled cores. 53 * @HCTL_SHADERS_READY_OFF: MCU has halted and cores need to be powered down 54 * @HCTL_SHADERS_PEND_OFF: Cores are transitioning to power down. 56 * specific cores, due to core_mask change request. 58 * undesired cores to become inactive. 59 * @HCTL_CORE_INACTIVE_PEND: Waiting for specific cores to become inactive. 60 * Once the cores become inactive their power down [all …]
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| H A D | mali_kbase_pm_defs.h | 44 * @KBASE_PM_CORE_SHADER: Shader cores 45 * @KBASE_PM_CORE_TILER: Tiler cores 181 * @timer: Timer for powering off the shader cores 184 * power down request is received before turning off the cores 187 * the cores. For simple power policies, this is equivalent 241 * holds the cores enabled in a hardware counters dump, 287 * @ca_cores_enabled: Cores that are currently available 298 * to have the same set of available cores as specified by 299 * @shaders_desired_mask. So would precisely indicate the cores 309 * shader cores to be on. This is used as an input to the [all …]
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| H A D | mali_kbase_pm_ca.h | 53 * Returns a mask of the currently available shader cores. 56 * Return: The bit mask of available cores 65 * @cores_ready: The bit mask of cores ready for job submission 66 * @cores_transitioning: The bit mask of cores that are transitioning power 81 * Returns a mask of the PM state synchronised shader cores for arranging 84 * Return: The bit mask of PM state synchronised cores
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| /OK3568_Linux_fs/buildroot/package/uhd/ |
| H A D | 0005-core-remove-boost-math-in-favor-of-std-cmath.patch | 30 host/lib/usrp/cores/rx_dsp_core_3000.cpp | 15 ++++++++------- 31 host/lib/usrp/cores/rx_frontend_core_3000.cpp | 14 ++++++++------ 34 diff --git a/host/lib/usrp/cores/rx_dsp_core_3000.cpp b/host/lib/usrp/cores/rx_dsp_core_3000.cpp 36 --- a/host/lib/usrp/cores/rx_dsp_core_3000.cpp 37 +++ b/host/lib/usrp/cores/rx_dsp_core_3000.cpp 44 #include <uhdlib/usrp/cores/dsp_core_utils.hpp> 45 #include <uhdlib/usrp/cores/rx_dsp_core_3000.hpp> 74 diff --git a/host/lib/usrp/cores/rx_frontend_core_3000.cpp b/host/lib/usrp/cores/rx_frontend_core_3… 76 --- a/host/lib/usrp/cores/rx_frontend_core_3000.cpp 77 +++ b/host/lib/usrp/cores/rx_frontend_core_3000.cpp
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| /OK3568_Linux_fs/kernel/drivers/remoteproc/ |
| H A D | ti_k3_r5_remoteproc.c | 74 * @cores: list of R5 cores within the cluster 79 struct list_head cores; member 254 /* assert local reset on all applicable cores */ in k3_r5_lockstep_reset() 255 list_for_each_entry(core, &cluster->cores, elem) { in k3_r5_lockstep_reset() 265 /* disable PSC modules on all applicable cores */ in k3_r5_lockstep_reset() 266 list_for_each_entry(core, &cluster->cores, elem) { in k3_r5_lockstep_reset() 279 list_for_each_entry_continue_reverse(core, &cluster->cores, elem) { in k3_r5_lockstep_reset() 284 core = list_last_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_lockstep_reset() 286 list_for_each_entry_from_reverse(core, &cluster->cores, elem) { in k3_r5_lockstep_reset() 299 /* enable PSC modules on all applicable cores */ in k3_r5_lockstep_release() [all …]
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/lib/gcc/aarch64-none-linux-gnu/10.3.1/plugin/include/config/aarch64/ |
| H A D | aarch64-cores.def | 20 /* This is a list of cores that implement AArch64. 48 /* ARM ('A') cores. */ 56 /* Cavium ('C') cores. */ 71 /* Ampere Computing cores. */ 76 /* APM ('P') cores. */ 79 /* Qualcomm ('Q') cores. */ 83 /* Samsung ('S') cores. */ 86 /* HXT ('h') cores. */ 91 /* Broadcom ('B') cores. */ 95 /* Cavium ('C') cores. */ [all …]
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| /OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/sandybridge/ |
| H A D | cache.json | 535 …clusive, hits to the L3 may require snooping the private L2 caches of any cores on the same socket… 546 …clusive, hits to the L3 may require snooping the private L2 caches of any cores on the same socket… 748 …efetch code reads that hit in the LLC and the snoop to one of the sibling cores hits the line in M… 760 …t needed as either the core-valid bit is not set or the shared line is present in multiple cores.", 772 … & prefetch code reads that hit in the LLC and the snoops sent to sibling cores return clean respo… 796 …emand & prefetch data reads that hit in the LLC and the snoops to sibling cores hit in either E/S … 808 …efetch data reads that hit in the LLC and the snoop to one of the sibling cores hits the line in M… 820 …t needed as either the core-valid bit is not set or the shared line is present in multiple cores.", 832 … & prefetch data reads that hit in the LLC and the snoops sent to sibling cores return clean respo… 856 …"Counts prefetch code reads that hit in the LLC and the snoops to sibling cores hit in either E/S … [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/ |
| H A D | nciutils.c | 262 nci_cores_t *cores; /**< Cores Parsed */ member 269 uint8 max_cores; /**< # Max cores indicated by Register */ 270 uint8 num_cores; /**< # discovered cores */ 355 static int nci_get_coreunit(nci_cores_t *cores, uint32 numcores, uint cid, 382 BCMATTACHFN(nci_get_coreunit)(nci_cores_t *cores, uint32 numcores, in BCMATTACHFN() 389 if ((cores[core_idx].coreid == core_id) && in BCMATTACHFN() 390 (GET_COREOFFSET(cores[core_idx].desc->iface_desc_1) != in BCMATTACHFN() 392 coreunit = cores[core_idx].coreunit + 1; in BCMATTACHFN() 425 * where all EROM parsed Cores are saved, 426 * using this all EROM Cores are Freed. [all …]
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| /OK3568_Linux_fs/kernel/arch/mips/include/asm/octeon/ |
| H A D | cvmx-coremask.h | 11 * Module to support operations on bitmap of cores. Coremask can be used to 12 * select a specific core, a group of cores, or all available cores, for 22 * Node 0: Cores 0 - 47 23 * Node 1: Cores 128 - 175 24 * Node 2: Cores 256 - 303 25 * Node 3: Cores 384 - 431
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| /OK3568_Linux_fs/yocto/poky/meta/recipes-devtools/gcc/gcc/ |
| H A D | 0001-aarch64-Update-Neoverse-N2-core-defini.patch | 10 * config/aarch64/aarch64-cores.def: Update Neoverse N2 core entry. 15 gcc/config/aarch64/aarch64-cores.def | 6 +++--- 18 diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def 20 --- a/gcc/config/aarch64/aarch64-cores.def 21 +++ b/gcc/config/aarch64/aarch64-cores.def 23 /* Qualcomm ('Q') cores. */
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| /OK3568_Linux_fs/kernel/drivers/crypto/cavium/cpt/ |
| H A D | cptpf_main.c | 25 * Disable cores specified by coremask 38 /* Disengage the cores from groups */ in cpt_disable_cores() 45 dev_err(dev, "Cores still busy %llx", coremask); in cpt_disable_cores() 54 /* Disable the cores */ in cpt_disable_cores() 62 * Enable cores specified by coremask 139 /* Assumes 0-9 are SE cores for UCODE_BASE registers and in cpt_load_microcode() 173 dev_err(dev, "Requested for more cores than available AE cores\n"); in do_cpt_init() 184 /* Convert requested cores to mask */ in do_cpt_init() 199 /* Enable AE cores for the group mask */ in do_cpt_init() 203 dev_err(dev, "Requested for more cores than available SE cores\n"); in do_cpt_init() [all …]
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| /OK3568_Linux_fs/kernel/drivers/phy/broadcom/ |
| H A D | phy-bcm-sr-pcie.c | 85 /* PIPEMUX = 3, RC 2x8, cores 0, 7 */ 87 /* PIPEMUX = 4, RC 4x4, cores 0, 1, 6, 7 */ 89 /* PIPEMUX = 5, RC 8x2, all 8 cores */ 91 /* PIPEMUX = 6, RC 3x4 + 2x2, cores 0, 2, 3, 6, 7 */ 93 /* PIPEMUX = 7, RC 1x4 + 6x2, cores 0, 2, 3, 4, 5, 6, 7 */ 95 /* PIPEMUX = 8, EP 1x8 + RC 4x2, cores 4, 5, 6, 7 */ 97 /* PIPEMUX = 9, EP 1x8 + RC 2x4, cores 6, 7 */ 99 /* PIPEMUX = 10, EP 2x4 + RC 2x4, cores 1, 6 */ 101 /* PIPEMUX = 11, EP 2x4 + RC 4x2, cores 2, 3, 4, 5 */ 103 /* PIPEMUX = 12, EP 1x4 + RC 6x2, cores 2, 3, 4, 5, 6, 7 */ [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/ |
| H A D | arm,vexpress-juno.yaml | 45 - description: CoreTile Express A9x4 (V2P-CA9) has 4 Cortex A9 CPU cores 51 - description: CoreTile Express A5x2 (V2P-CA5s) has 2 Cortex A5 CPU cores 58 cores in a MPCore configuration in a test chip on the core tile. See 64 A15 CPU cores in a test chip on the core tile. This is the first test 71 CPU cores and 3 Cortex A7 cores in a big.LITTLE MPCore configuration 77 cores in a test chip on the core tile. See ARM DDI 0498D. 84 AArch64 CPU cores. It has 2 Cortex A57 CPU cores and 4 Cortex A53 85 cores in a big.LITTLE configuration. It also features the MALI T624
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| /OK3568_Linux_fs/u-boot/doc/ |
| H A D | README.Heterogeneous-SoCs | 5 configuration and frequencies of all PowerPC cores and devices 7 SC3900/DSP cores and such devices like CPRI, MAPLE, MAPLE-ULB etc. 19 Code added in this file to print the DSP cores and other device's(CPRI, 25 required cores and devices from RCW and System frequency 29 Added API to get the number of SC cores in running system and Their BIT 44 Global structure updated for dsp cores and other components 73 DSP cores and other device's components have been added in this structure.
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/xilinx/ |
| H A D | video.txt | 1 DT bindings for Xilinx video IP cores 4 Xilinx video IP cores process video streams by acting as video sinks and/or 10 cores are represented as defined in ../video-interfaces.txt. 18 The following properties are common to all Xilinx video IP cores. 21 AXI bus between video IP cores, using its VF code as defined in "AXI4-Stream
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