1*4882a593SmuzhiyunDT bindings for Xilinx video IP cores 2*4882a593Smuzhiyun------------------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunXilinx video IP cores process video streams by acting as video sinks and/or 5*4882a593Smuzhiyunsources. They are connected by links through their input and output ports, 6*4882a593Smuzhiyuncreating a video pipeline. 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunEach video IP core is represented by an AMBA bus child node in the device 9*4882a593Smuzhiyuntree using bindings documented in this directory. Connections between the IP 10*4882a593Smuzhiyuncores are represented as defined in ../video-interfaces.txt. 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunThe whole pipeline is represented by an AMBA bus child node in the device 13*4882a593Smuzhiyuntree using bindings documented in ./xlnx,video.txt. 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunCommon properties 16*4882a593Smuzhiyun----------------- 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunThe following properties are common to all Xilinx video IP cores. 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun- xlnx,video-format: This property represents a video format transmitted on an 21*4882a593Smuzhiyun AXI bus between video IP cores, using its VF code as defined in "AXI4-Stream 22*4882a593Smuzhiyun Video IP and System Design Guide" [UG934]. How the format relates to the IP 23*4882a593Smuzhiyun core is described in the IP core bindings documentation. 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun- xlnx,video-width: This property qualifies the video format with the sample 26*4882a593Smuzhiyun width expressed as a number of bits per pixel component. All components must 27*4882a593Smuzhiyun use the same width. 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun- xlnx,cfa-pattern: When the video format is set to Mono/Sensor, this property 30*4882a593Smuzhiyun describes the sensor's color filter array pattern. Supported values are 31*4882a593Smuzhiyun "bggr", "gbrg", "grbg", "rggb" and "mono". If not specified, the pattern 32*4882a593Smuzhiyun defaults to "mono". 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun[UG934] https://www.xilinx.com/support/documentation/ip_documentation/axi_videoip/v1_0/ug934_axi_videoIP.pdf 36