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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pwm/
H A Dpwm-mediatek.txt19 - "pwm1-8": the eight per PWM clocks for mt2712
20 - "pwm1-6": the six per PWM clocks for mt7622
21 - "pwm1-5": the five per PWM clocks for mt7623
22 - "pwm1" : the PWM1 clock for mt7629
43 clock-names = "top", "main", "pwm1", "pwm2",
H A Dti,twl-pwm.txt4 On TWL4030 series: PWM1 and PWM2
5 On TWL6030 series: PWM0 and PWM1
H A Dpwm-lp3943.txt9 - ti,pwm0 or ti,pwm1: Output pin number(s) for PWM channel 0 or 1.
33 ti,pwm1 = <15>;
/OK3568_Linux_fs/kernel/drivers/hwmon/
H A Dadm1026.c278 struct pwm_data pwm1; /* Pwm control values */ member
351 data->pwm1.pwm = adm1026_read_value(client, in adm1026_update_device()
438 data->pwm1.enable = 2; in adm1026_update_device()
439 data->pwm1.auto_pwm_min = in adm1026_update_device()
440 PWM_MIN_FROM_REG(data->pwm1.pwm); in adm1026_update_device()
1267 return sprintf(buf, "%d\n", PWM_FROM_REG(data->pwm1.pwm)); in pwm1_show()
1276 if (data->pwm1.enable == 1) { in pwm1_store()
1285 data->pwm1.pwm = PWM_TO_REG(val); in pwm1_store()
1286 adm1026_write_value(client, ADM1026_REG_PWM, data->pwm1.pwm); in pwm1_store()
1297 return sprintf(buf, "%d\n", data->pwm1.auto_pwm_min); in temp1_auto_point1_pwm_show()
[all …]
H A Damc6821.c153 u8 pwm1; member
186 data->pwm1 = i2c_smbus_read_byte_data(client, in amc6821_update_device()
239 case 0: /*open loop: software sets pwm1*/ in amc6821_update_device()
253 * pwm1, currently not implemented in amc6821_update_device()
349 return sprintf(buf, "%d\n", data->pwm1); in pwm1_show()
364 data->pwm1 = clamp_val(val , 0, 255); in pwm1_store()
365 i2c_smbus_write_byte_data(client, AMC6821_REG_DCY, data->pwm1); in pwm1_store()
712 static SENSOR_DEVICE_ATTR_RW(pwm1, pwm1, 0);
H A Dlm63.c158 u8 pwm1[13]; /* 0: current output member
211 data->pwm1[1 + i] = i2c_smbus_read_byte_data(client, in lm63_update_lut()
251 data->pwm1[0] = i2c_smbus_read_byte_data(client, in lm63_update_device()
314 if (data->pwm1[1 + i - 1] > data->pwm1[1 + i] in lm63_lut_looks_bad()
370 pwm = data->pwm1[nr]; in show_pwm1()
372 pwm = data->pwm1[nr] >= 2 * data->pwm1_freq ? in show_pwm1()
373 255 : (data->pwm1[nr] * 255 + data->pwm1_freq) / in show_pwm1()
401 data->pwm1[nr] = data->pwm_highres ? val : in set_pwm1()
403 i2c_smbus_write_byte_data(client, reg, data->pwm1[nr]); in set_pwm1()
744 static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm1, set_pwm1, 0);
H A Dvt1211.c740 * 0 0 : pwm1/2 off temperature (pwm_auto_temp[0])
741 * 0 1 : pwm1/2 low speed temperature (pwm_auto_temp[1])
742 * 0 2 : pwm1/2 high speed temperature (pwm_auto_temp[2])
743 * 0 3 : pwm1/2 full speed temperature (pwm_auto_temp[3])
744 * 1 0 : pwm1/2 off temperature (pwm_auto_temp[0])
745 * 1 1 : pwm1/2 low speed temperature (pwm_auto_temp[1])
746 * 1 2 : pwm1/2 high speed temperature (pwm_auto_temp[2])
747 * 1 3 : pwm1/2 full speed temperature (pwm_auto_temp[3])
804 * 0 0 : pwm1 off (pwm_auto_pwm[0][0], hard-wired to 0)
805 * 0 1 : pwm1 low speed duty cycle (pwm_auto_pwm[0][1])
[all …]
/OK3568_Linux_fs/kernel/Documentation/hwmon/
H A Damc6821.rst52 pwm1 rw pwm1
69 pwm1 = pwm1_auto_point2_pwm. It can go from
86 pwm1 = pwm1_auto_point2_pwm. It can go from
H A Dg762.rst50 speed control (open-loop) via pwm1 described below, 2 for
57 pwm1:
64 the fan speed is programmed by setting a value between 0 and 255 via 'pwm1'
H A Dtc654.rst28 pwm1_mode determines if the pwm output is controlled via the pwm1 value
33 the pwm1 value. Setting pwm1_mode to 0 will cause the pwm output to be
H A Dthmc50.rst80 pwm1
85 The value of 0 for pwm1 also forces FAN_OFF signal from the chip,
/OK3568_Linux_fs/kernel/sound/soc/codecs/
H A Dtas5086.c591 SOC_DAPM_ENUM("PWM1 Output", tas5086_dapm_output_mux_enum[0]),
609 SND_SOC_DAPM_OUTPUT("PWM1"),
629 SND_SOC_DAPM_MUX("PWM1 Mux", SND_SOC_NOPM, 0, 0,
695 { "PWM1 Mux", "Channel 1 Mux", "Channel 1 Mux" },
702 { "PWM1 Mux", "Channel 2 Mux", "Channel 2 Mux" },
709 { "PWM1 Mux", "Channel 3 Mux", "Channel 3 Mux" },
716 { "PWM1 Mux", "Channel 4 Mux", "Channel 4 Mux" },
723 { "PWM1 Mux", "Channel 5 Mux", "Channel 5 Mux" },
730 { "PWM1 Mux", "Channel 6 Mux", "Channel 6 Mux" },
738 { "PWM1", NULL, "PWM1 Mux" },
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3318-a95x-z2.dts125 pwms = <&pwm1 0 5000 1>;
242 pwm1 {
243 pwm1_pin_pull_up: pwm1-pin-pull-up {
277 &pwm1 {
H A Drk3308b-evb-ext-v10.dtsi11 pwms = <&pwm1 0 25000 0>;
95 &pwm1 {
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dimx6q-dhcom-pdk2.dts27 pwms = <&pwm1 0 50000 PWM_POLARITY_INVERTED>;
223 pinctrl_pwm1: pwm1-grp {
253 &pwm1 {
H A Dimx6dl-aristainetos_4.dts17 pwms = <&pwm1 0 5000000>;
81 &pwm1 {
H A Dimx6qdl-cubox-i.dtsi67 pwms = <&pwm1 0 50000>;
178 pinctrl_cubox_i_pwm1: cubox-i-pwm1-front-led {
235 &pwm1 {
H A Dimx53-kp.dtsi16 pwms = <&pwm1 0 500000>;
165 &pwm1 {
H A Dsun5i-gr8.dtsi111 pwm1_pins: pwm1-pin {
113 function = "pwm1";
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/renesas/
H A Dr8a77995-draak.dts24 pwms = <&pwm1 0 50000>;
426 pwm1_pins: pwm1 {
428 function = "pwm1";
466 &pwm1 {
/OK3568_Linux_fs/kernel/Documentation/driver-api/thermal/
H A Dnouveau_thermal.rst63 * pwm1:
78 * 1: The fan can be driven in manual (use pwm1 to change the speed);
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra114/
H A Dpinmux.c48 PIN(SDMMC1_DAT1_PY6, SDMMC1, PWM1, SPI4, UARTA),
130 PIN(PU4, PWM1, UARTA, DISPLAYA, DISPLAYB),
162 PIN(GMI_AD9_PH1, PWM1, NAND, GMI, CLDVFS),
264 PIN(SDMMC3_DAT2_PB5, SDMMC3, PWM1, DISPLAYA, SPI3),
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/regulator/
H A Dpwm-regulator.txt63 pwms = <&pwm1 0 8448 0>;
80 pwms = <&pwm1 0 8448 0>;
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra124/
H A Dpinmux.c48 PIN(SDMMC1_DAT1_PY6, SDMMC1, PWM1, SPI4, UARTA),
130 PIN(PU4, PWM1, UARTA, GMI, DISPLAYB),
162 PIN(PH1, PWM1, TMDS, GMI, DISPLAYA),
264 PIN(SDMMC3_DAT2_PB5, SDMMC3, PWM1, DISPLAYA, SPI3),
/OK3568_Linux_fs/kernel/arch/mips/boot/dts/ingenic/
H A Dgcw0.dts427 pins_pwm1: pwm1 {
428 function = "pwm1";
429 groups = "pwm1";
491 /* PWM1 is in use, so use channel #2 for the clocksource */

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