1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (c) 2010-2014, NVIDIA CORPORATION. All rights reserved. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #include <common.h> 8*4882a593Smuzhiyun #include <asm/io.h> 9*4882a593Smuzhiyun #include <asm/arch/pinmux.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #define PIN(pin, f0, f1, f2, f3) \ 12*4882a593Smuzhiyun { \ 13*4882a593Smuzhiyun .funcs = { \ 14*4882a593Smuzhiyun PMUX_FUNC_##f0, \ 15*4882a593Smuzhiyun PMUX_FUNC_##f1, \ 16*4882a593Smuzhiyun PMUX_FUNC_##f2, \ 17*4882a593Smuzhiyun PMUX_FUNC_##f3, \ 18*4882a593Smuzhiyun }, \ 19*4882a593Smuzhiyun } 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define PIN_RESERVED {} 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun static const struct pmux_pingrp_desc tegra114_pingroups[] = { 24*4882a593Smuzhiyun /* pin, f0, f1, f2, f3 */ 25*4882a593Smuzhiyun /* Offset 0x3000 */ 26*4882a593Smuzhiyun PIN(ULPI_DATA0_PO1, SPI3, HSI, UARTA, ULPI), 27*4882a593Smuzhiyun PIN(ULPI_DATA1_PO2, SPI3, HSI, UARTA, ULPI), 28*4882a593Smuzhiyun PIN(ULPI_DATA2_PO3, SPI3, HSI, UARTA, ULPI), 29*4882a593Smuzhiyun PIN(ULPI_DATA3_PO4, SPI3, HSI, UARTA, ULPI), 30*4882a593Smuzhiyun PIN(ULPI_DATA4_PO5, SPI2, HSI, UARTA, ULPI), 31*4882a593Smuzhiyun PIN(ULPI_DATA5_PO6, SPI2, HSI, UARTA, ULPI), 32*4882a593Smuzhiyun PIN(ULPI_DATA6_PO7, SPI2, HSI, UARTA, ULPI), 33*4882a593Smuzhiyun PIN(ULPI_DATA7_PO0, SPI2, HSI, UARTA, ULPI), 34*4882a593Smuzhiyun PIN(ULPI_CLK_PY0, SPI1, SPI5, UARTD, ULPI), 35*4882a593Smuzhiyun PIN(ULPI_DIR_PY1, SPI1, SPI5, UARTD, ULPI), 36*4882a593Smuzhiyun PIN(ULPI_NXT_PY2, SPI1, SPI5, UARTD, ULPI), 37*4882a593Smuzhiyun PIN(ULPI_STP_PY3, SPI1, SPI5, UARTD, ULPI), 38*4882a593Smuzhiyun PIN(DAP3_FS_PP0, I2S2, SPI5, DISPLAYA, DISPLAYB), 39*4882a593Smuzhiyun PIN(DAP3_DIN_PP1, I2S2, SPI5, DISPLAYA, DISPLAYB), 40*4882a593Smuzhiyun PIN(DAP3_DOUT_PP2, I2S2, SPI5, DISPLAYA, DISPLAYB), 41*4882a593Smuzhiyun PIN(DAP3_SCLK_PP3, I2S2, SPI5, DISPLAYA, DISPLAYB), 42*4882a593Smuzhiyun PIN(PV0, USB, RSVD2, RSVD3, RSVD4), 43*4882a593Smuzhiyun PIN(PV1, RSVD1, RSVD2, RSVD3, RSVD4), 44*4882a593Smuzhiyun PIN(SDMMC1_CLK_PZ0, SDMMC1, CLK12, RSVD3, RSVD4), 45*4882a593Smuzhiyun PIN(SDMMC1_CMD_PZ1, SDMMC1, SPDIF, SPI4, UARTA), 46*4882a593Smuzhiyun PIN(SDMMC1_DAT3_PY4, SDMMC1, SPDIF, SPI4, UARTA), 47*4882a593Smuzhiyun PIN(SDMMC1_DAT2_PY5, SDMMC1, PWM0, SPI4, UARTA), 48*4882a593Smuzhiyun PIN(SDMMC1_DAT1_PY6, SDMMC1, PWM1, SPI4, UARTA), 49*4882a593Smuzhiyun PIN(SDMMC1_DAT0_PY7, SDMMC1, RSVD2, SPI4, UARTA), 50*4882a593Smuzhiyun PIN_RESERVED, 51*4882a593Smuzhiyun PIN_RESERVED, 52*4882a593Smuzhiyun /* Offset 0x3068 */ 53*4882a593Smuzhiyun PIN(CLK2_OUT_PW5, EXTPERIPH2, RSVD2, RSVD3, RSVD4), 54*4882a593Smuzhiyun PIN(CLK2_REQ_PCC5, DAP, RSVD2, RSVD3, RSVD4), 55*4882a593Smuzhiyun PIN_RESERVED, 56*4882a593Smuzhiyun PIN_RESERVED, 57*4882a593Smuzhiyun PIN_RESERVED, 58*4882a593Smuzhiyun PIN_RESERVED, 59*4882a593Smuzhiyun PIN_RESERVED, 60*4882a593Smuzhiyun PIN_RESERVED, 61*4882a593Smuzhiyun PIN_RESERVED, 62*4882a593Smuzhiyun PIN_RESERVED, 63*4882a593Smuzhiyun PIN_RESERVED, 64*4882a593Smuzhiyun PIN_RESERVED, 65*4882a593Smuzhiyun PIN_RESERVED, 66*4882a593Smuzhiyun PIN_RESERVED, 67*4882a593Smuzhiyun PIN_RESERVED, 68*4882a593Smuzhiyun PIN_RESERVED, 69*4882a593Smuzhiyun PIN_RESERVED, 70*4882a593Smuzhiyun PIN_RESERVED, 71*4882a593Smuzhiyun PIN_RESERVED, 72*4882a593Smuzhiyun PIN_RESERVED, 73*4882a593Smuzhiyun PIN_RESERVED, 74*4882a593Smuzhiyun PIN_RESERVED, 75*4882a593Smuzhiyun PIN_RESERVED, 76*4882a593Smuzhiyun PIN_RESERVED, 77*4882a593Smuzhiyun PIN_RESERVED, 78*4882a593Smuzhiyun PIN_RESERVED, 79*4882a593Smuzhiyun PIN_RESERVED, 80*4882a593Smuzhiyun PIN_RESERVED, 81*4882a593Smuzhiyun PIN_RESERVED, 82*4882a593Smuzhiyun PIN_RESERVED, 83*4882a593Smuzhiyun PIN_RESERVED, 84*4882a593Smuzhiyun PIN_RESERVED, 85*4882a593Smuzhiyun PIN_RESERVED, 86*4882a593Smuzhiyun PIN_RESERVED, 87*4882a593Smuzhiyun PIN_RESERVED, 88*4882a593Smuzhiyun PIN_RESERVED, 89*4882a593Smuzhiyun PIN_RESERVED, 90*4882a593Smuzhiyun PIN_RESERVED, 91*4882a593Smuzhiyun PIN_RESERVED, 92*4882a593Smuzhiyun PIN_RESERVED, 93*4882a593Smuzhiyun PIN_RESERVED, 94*4882a593Smuzhiyun PIN_RESERVED, 95*4882a593Smuzhiyun /* Offset 0x3110 */ 96*4882a593Smuzhiyun PIN(HDMI_INT_PN7, RSVD1, RSVD2, RSVD3, RSVD4), 97*4882a593Smuzhiyun PIN(DDC_SCL_PV4, I2C4, RSVD2, RSVD3, RSVD4), 98*4882a593Smuzhiyun PIN(DDC_SDA_PV5, I2C4, RSVD2, RSVD3, RSVD4), 99*4882a593Smuzhiyun PIN_RESERVED, 100*4882a593Smuzhiyun PIN_RESERVED, 101*4882a593Smuzhiyun PIN_RESERVED, 102*4882a593Smuzhiyun PIN_RESERVED, 103*4882a593Smuzhiyun PIN_RESERVED, 104*4882a593Smuzhiyun PIN_RESERVED, 105*4882a593Smuzhiyun PIN_RESERVED, 106*4882a593Smuzhiyun PIN_RESERVED, 107*4882a593Smuzhiyun PIN_RESERVED, 108*4882a593Smuzhiyun PIN_RESERVED, 109*4882a593Smuzhiyun PIN_RESERVED, 110*4882a593Smuzhiyun PIN_RESERVED, 111*4882a593Smuzhiyun PIN_RESERVED, 112*4882a593Smuzhiyun PIN_RESERVED, 113*4882a593Smuzhiyun PIN_RESERVED, 114*4882a593Smuzhiyun PIN_RESERVED, 115*4882a593Smuzhiyun PIN_RESERVED, 116*4882a593Smuzhiyun PIN_RESERVED, 117*4882a593Smuzhiyun /* Offset 0x3164 */ 118*4882a593Smuzhiyun PIN(UART2_RXD_PC3, IRDA, SPDIF, UARTA, SPI4), 119*4882a593Smuzhiyun PIN(UART2_TXD_PC2, IRDA, SPDIF, UARTA, SPI4), 120*4882a593Smuzhiyun PIN(UART2_RTS_N_PJ6, UARTA, UARTB, RSVD3, SPI4), 121*4882a593Smuzhiyun PIN(UART2_CTS_N_PJ5, UARTA, UARTB, RSVD3, SPI4), 122*4882a593Smuzhiyun PIN(UART3_TXD_PW6, UARTC, RSVD2, RSVD3, SPI4), 123*4882a593Smuzhiyun PIN(UART3_RXD_PW7, UARTC, RSVD2, RSVD3, SPI4), 124*4882a593Smuzhiyun PIN(UART3_CTS_N_PA1, UARTC, SDMMC1, DTV, SPI4), 125*4882a593Smuzhiyun PIN(UART3_RTS_N_PC0, UARTC, PWM0, DTV, DISPLAYA), 126*4882a593Smuzhiyun PIN(PU0, OWR, UARTA, RSVD3, RSVD4), 127*4882a593Smuzhiyun PIN(PU1, RSVD1, UARTA, RSVD3, RSVD4), 128*4882a593Smuzhiyun PIN(PU2, RSVD1, UARTA, RSVD3, RSVD4), 129*4882a593Smuzhiyun PIN(PU3, PWM0, UARTA, DISPLAYA, DISPLAYB), 130*4882a593Smuzhiyun PIN(PU4, PWM1, UARTA, DISPLAYA, DISPLAYB), 131*4882a593Smuzhiyun PIN(PU5, PWM2, UARTA, DISPLAYA, DISPLAYB), 132*4882a593Smuzhiyun PIN(PU6, PWM3, UARTA, USB, DISPLAYB), 133*4882a593Smuzhiyun PIN(GEN1_I2C_SDA_PC5, I2C1, RSVD2, RSVD3, RSVD4), 134*4882a593Smuzhiyun PIN(GEN1_I2C_SCL_PC4, I2C1, RSVD2, RSVD3, RSVD4), 135*4882a593Smuzhiyun PIN(DAP4_FS_PP4, I2S3, RSVD2, DTV, RSVD4), 136*4882a593Smuzhiyun PIN(DAP4_DIN_PP5, I2S3, RSVD2, RSVD3, RSVD4), 137*4882a593Smuzhiyun PIN(DAP4_DOUT_PP6, I2S3, RSVD2, DTV, RSVD4), 138*4882a593Smuzhiyun PIN(DAP4_SCLK_PP7, I2S3, RSVD2, RSVD3, RSVD4), 139*4882a593Smuzhiyun PIN(CLK3_OUT_PEE0, EXTPERIPH3, RSVD2, RSVD3, RSVD4), 140*4882a593Smuzhiyun PIN(CLK3_REQ_PEE1, DEV3, RSVD2, RSVD3, RSVD4), 141*4882a593Smuzhiyun PIN(GMI_WP_N_PC7, RSVD1, NAND, GMI, GMI_ALT), 142*4882a593Smuzhiyun PIN(GMI_IORDY_PI5, SDMMC2, RSVD2, GMI, TRACE), 143*4882a593Smuzhiyun PIN(GMI_WAIT_PI7, SPI4, NAND, GMI, DTV), 144*4882a593Smuzhiyun PIN(GMI_ADV_N_PK0, RSVD1, NAND, GMI, TRACE), 145*4882a593Smuzhiyun PIN(GMI_CLK_PK1, SDMMC2, NAND, GMI, TRACE), 146*4882a593Smuzhiyun PIN(GMI_CS0_N_PJ0, RSVD1, NAND, GMI, USB), 147*4882a593Smuzhiyun PIN(GMI_CS1_N_PJ2, RSVD1, NAND, GMI, SOC), 148*4882a593Smuzhiyun PIN(GMI_CS2_N_PK3, SDMMC2, NAND, GMI, TRACE), 149*4882a593Smuzhiyun PIN(GMI_CS3_N_PK4, SDMMC2, NAND, GMI, GMI_ALT), 150*4882a593Smuzhiyun PIN(GMI_CS4_N_PK2, USB, NAND, GMI, TRACE), 151*4882a593Smuzhiyun PIN(GMI_CS6_N_PI3, NAND, NAND_ALT, GMI, SPI4), 152*4882a593Smuzhiyun PIN(GMI_CS7_N_PI6, NAND, NAND_ALT, GMI, SDMMC2), 153*4882a593Smuzhiyun PIN(GMI_AD0_PG0, RSVD1, NAND, GMI, RSVD4), 154*4882a593Smuzhiyun PIN(GMI_AD1_PG1, RSVD1, NAND, GMI, RSVD4), 155*4882a593Smuzhiyun PIN(GMI_AD2_PG2, RSVD1, NAND, GMI, RSVD4), 156*4882a593Smuzhiyun PIN(GMI_AD3_PG3, RSVD1, NAND, GMI, RSVD4), 157*4882a593Smuzhiyun PIN(GMI_AD4_PG4, RSVD1, NAND, GMI, RSVD4), 158*4882a593Smuzhiyun PIN(GMI_AD5_PG5, RSVD1, NAND, GMI, SPI4), 159*4882a593Smuzhiyun PIN(GMI_AD6_PG6, RSVD1, NAND, GMI, SPI4), 160*4882a593Smuzhiyun PIN(GMI_AD7_PG7, RSVD1, NAND, GMI, SPI4), 161*4882a593Smuzhiyun PIN(GMI_AD8_PH0, PWM0, NAND, GMI, DTV), 162*4882a593Smuzhiyun PIN(GMI_AD9_PH1, PWM1, NAND, GMI, CLDVFS), 163*4882a593Smuzhiyun PIN(GMI_AD10_PH2, PWM2, NAND, GMI, CLDVFS), 164*4882a593Smuzhiyun PIN(GMI_AD11_PH3, PWM3, NAND, GMI, USB), 165*4882a593Smuzhiyun PIN(GMI_AD12_PH4, SDMMC2, NAND, GMI, RSVD4), 166*4882a593Smuzhiyun PIN(GMI_AD13_PH5, SDMMC2, NAND, GMI, RSVD4), 167*4882a593Smuzhiyun PIN(GMI_AD14_PH6, SDMMC2, NAND, GMI, DTV), 168*4882a593Smuzhiyun PIN(GMI_AD15_PH7, SDMMC2, NAND, GMI, DTV), 169*4882a593Smuzhiyun PIN(GMI_A16_PJ7, UARTD, TRACE, GMI, GMI_ALT), 170*4882a593Smuzhiyun PIN(GMI_A17_PB0, UARTD, RSVD2, GMI, TRACE), 171*4882a593Smuzhiyun PIN(GMI_A18_PB1, UARTD, RSVD2, GMI, TRACE), 172*4882a593Smuzhiyun PIN(GMI_A19_PK7, UARTD, SPI4, GMI, TRACE), 173*4882a593Smuzhiyun PIN(GMI_WR_N_PI0, RSVD1, NAND, GMI, SPI4), 174*4882a593Smuzhiyun PIN(GMI_OE_N_PI1, RSVD1, NAND, GMI, SOC), 175*4882a593Smuzhiyun PIN(GMI_DQS_P_PJ3, SDMMC2, NAND, GMI, TRACE), 176*4882a593Smuzhiyun PIN(GMI_RST_N_PI4, NAND, NAND_ALT, GMI, RSVD4), 177*4882a593Smuzhiyun PIN(GEN2_I2C_SCL_PT5, I2C2, RSVD2, GMI, RSVD4), 178*4882a593Smuzhiyun PIN(GEN2_I2C_SDA_PT6, I2C2, RSVD2, GMI, RSVD4), 179*4882a593Smuzhiyun PIN(SDMMC4_CLK_PCC4, SDMMC4, RSVD2, GMI, RSVD4), 180*4882a593Smuzhiyun PIN(SDMMC4_CMD_PT7, SDMMC4, RSVD2, GMI, RSVD4), 181*4882a593Smuzhiyun PIN(SDMMC4_DAT0_PAA0, SDMMC4, SPI3, GMI, RSVD4), 182*4882a593Smuzhiyun PIN(SDMMC4_DAT1_PAA1, SDMMC4, SPI3, GMI, RSVD4), 183*4882a593Smuzhiyun PIN(SDMMC4_DAT2_PAA2, SDMMC4, SPI3, GMI, RSVD4), 184*4882a593Smuzhiyun PIN(SDMMC4_DAT3_PAA3, SDMMC4, SPI3, GMI, RSVD4), 185*4882a593Smuzhiyun PIN(SDMMC4_DAT4_PAA4, SDMMC4, SPI3, GMI, RSVD4), 186*4882a593Smuzhiyun PIN(SDMMC4_DAT5_PAA5, SDMMC4, SPI3, GMI, RSVD4), 187*4882a593Smuzhiyun PIN(SDMMC4_DAT6_PAA6, SDMMC4, SPI3, GMI, RSVD4), 188*4882a593Smuzhiyun PIN(SDMMC4_DAT7_PAA7, SDMMC4, RSVD2, GMI, RSVD4), 189*4882a593Smuzhiyun PIN_RESERVED, 190*4882a593Smuzhiyun /* Offset 0x3284 */ 191*4882a593Smuzhiyun PIN(CAM_MCLK_PCC0, VI, VI_ALT1, VI_ALT3, RSVD4), 192*4882a593Smuzhiyun PIN(PCC1, I2S4, RSVD2, RSVD3, RSVD4), 193*4882a593Smuzhiyun PIN(PBB0, I2S4, VI, VI_ALT1, VI_ALT3), 194*4882a593Smuzhiyun PIN(CAM_I2C_SCL_PBB1, VGP1, I2C3, RSVD3, RSVD4), 195*4882a593Smuzhiyun PIN(CAM_I2C_SDA_PBB2, VGP2, I2C3, RSVD3, RSVD4), 196*4882a593Smuzhiyun PIN(PBB3, VGP3, DISPLAYA, DISPLAYB, RSVD4), 197*4882a593Smuzhiyun PIN(PBB4, VGP4, DISPLAYA, DISPLAYB, RSVD4), 198*4882a593Smuzhiyun PIN(PBB5, VGP5, DISPLAYA, DISPLAYB, RSVD4), 199*4882a593Smuzhiyun PIN(PBB6, VGP6, DISPLAYA, DISPLAYB, RSVD4), 200*4882a593Smuzhiyun PIN(PBB7, I2S4, RSVD2, RSVD3, RSVD4), 201*4882a593Smuzhiyun PIN(PCC2, I2S4, RSVD2, RSVD3, RSVD4), 202*4882a593Smuzhiyun PIN(JTAG_RTCK, RTCK, RSVD2, RSVD3, RSVD4), 203*4882a593Smuzhiyun PIN(PWR_I2C_SCL_PZ6, I2CPWR, RSVD2, RSVD3, RSVD4), 204*4882a593Smuzhiyun PIN(PWR_I2C_SDA_PZ7, I2CPWR, RSVD2, RSVD3, RSVD4), 205*4882a593Smuzhiyun PIN(KB_ROW0_PR0, KBC, RSVD2, RSVD3, RSVD4), 206*4882a593Smuzhiyun PIN(KB_ROW1_PR1, KBC, RSVD2, RSVD3, RSVD4), 207*4882a593Smuzhiyun PIN(KB_ROW2_PR2, KBC, RSVD2, RSVD3, RSVD4), 208*4882a593Smuzhiyun PIN(KB_ROW3_PR3, KBC, DISPLAYA, RSVD3, DISPLAYB), 209*4882a593Smuzhiyun PIN(KB_ROW4_PR4, KBC, DISPLAYA, SPI2, DISPLAYB), 210*4882a593Smuzhiyun PIN(KB_ROW5_PR5, KBC, DISPLAYA, SPI2, DISPLAYB), 211*4882a593Smuzhiyun PIN(KB_ROW6_PR6, KBC, DISPLAYA, DISPLAYA_ALT, DISPLAYB), 212*4882a593Smuzhiyun PIN(KB_ROW7_PR7, KBC, RSVD2, CLDVFS, UARTA), 213*4882a593Smuzhiyun PIN(KB_ROW8_PS0, KBC, RSVD2, CLDVFS, UARTA), 214*4882a593Smuzhiyun PIN(KB_ROW9_PS1, KBC, RSVD2, RSVD3, UARTA), 215*4882a593Smuzhiyun PIN(KB_ROW10_PS2, KBC, RSVD2, RSVD3, UARTA), 216*4882a593Smuzhiyun PIN_RESERVED, 217*4882a593Smuzhiyun PIN_RESERVED, 218*4882a593Smuzhiyun PIN_RESERVED, 219*4882a593Smuzhiyun PIN_RESERVED, 220*4882a593Smuzhiyun PIN_RESERVED, 221*4882a593Smuzhiyun /* Offset 0x32fc */ 222*4882a593Smuzhiyun PIN(KB_COL0_PQ0, KBC, USB, SPI2, EMC_DLL), 223*4882a593Smuzhiyun PIN(KB_COL1_PQ1, KBC, RSVD2, SPI2, EMC_DLL), 224*4882a593Smuzhiyun PIN(KB_COL2_PQ2, KBC, RSVD2, SPI2, RSVD4), 225*4882a593Smuzhiyun PIN(KB_COL3_PQ3, KBC, DISPLAYA, PWM2, UARTA), 226*4882a593Smuzhiyun PIN(KB_COL4_PQ4, KBC, OWR, SDMMC3, UARTA), 227*4882a593Smuzhiyun PIN(KB_COL5_PQ5, KBC, RSVD2, SDMMC1, RSVD4), 228*4882a593Smuzhiyun PIN(KB_COL6_PQ6, KBC, RSVD2, SPI2, RSVD4), 229*4882a593Smuzhiyun PIN(KB_COL7_PQ7, KBC, RSVD2, SPI2, RSVD4), 230*4882a593Smuzhiyun PIN(CLK_32K_OUT_PA0, BLINK, SOC, RSVD3, RSVD4), 231*4882a593Smuzhiyun PIN(SYS_CLK_REQ_PZ5, SYSCLK, RSVD2, RSVD3, RSVD4), 232*4882a593Smuzhiyun PIN(CORE_PWR_REQ, PWRON, RSVD2, RSVD3, RSVD4), 233*4882a593Smuzhiyun PIN(CPU_PWR_REQ, CPU, RSVD2, RSVD3, RSVD4), 234*4882a593Smuzhiyun PIN(PWR_INT_N, PMI, RSVD2, RSVD3, RSVD4), 235*4882a593Smuzhiyun PIN(CLK_32K_IN, CLK, RSVD2, RSVD3, RSVD4), 236*4882a593Smuzhiyun PIN(OWR, OWR, RSVD2, RSVD3, RSVD4), 237*4882a593Smuzhiyun PIN(DAP1_FS_PN0, I2S0, HDA, GMI, RSVD4), 238*4882a593Smuzhiyun PIN(DAP1_DIN_PN1, I2S0, HDA, GMI, RSVD4), 239*4882a593Smuzhiyun PIN(DAP1_DOUT_PN2, I2S0, HDA, GMI, RSVD4), 240*4882a593Smuzhiyun PIN(DAP1_SCLK_PN3, I2S0, HDA, GMI, RSVD4), 241*4882a593Smuzhiyun PIN(CLK1_REQ_PEE2, DAP, DAP1, RSVD3, RSVD4), 242*4882a593Smuzhiyun PIN(CLK1_OUT_PW4, EXTPERIPH1, DAP2, RSVD3, RSVD4), 243*4882a593Smuzhiyun PIN(SPDIF_IN_PK6, SPDIF, USB, RSVD3, RSVD4), 244*4882a593Smuzhiyun PIN(SPDIF_OUT_PK5, SPDIF, RSVD2, RSVD3, RSVD4), 245*4882a593Smuzhiyun PIN(DAP2_FS_PA2, I2S1, HDA, RSVD3, RSVD4), 246*4882a593Smuzhiyun PIN(DAP2_DIN_PA4, I2S1, HDA, RSVD3, RSVD4), 247*4882a593Smuzhiyun PIN(DAP2_DOUT_PA5, I2S1, HDA, RSVD3, RSVD4), 248*4882a593Smuzhiyun PIN(DAP2_SCLK_PA3, I2S1, HDA, RSVD3, RSVD4), 249*4882a593Smuzhiyun PIN(DVFS_PWM_PX0, SPI6, CLDVFS, RSVD3, RSVD4), 250*4882a593Smuzhiyun PIN(GPIO_X1_AUD_PX1, SPI6, RSVD2, RSVD3, RSVD4), 251*4882a593Smuzhiyun PIN(GPIO_X3_AUD_PX3, SPI6, SPI1, RSVD3, RSVD4), 252*4882a593Smuzhiyun PIN(DVFS_CLK_PX2, SPI6, CLDVFS, RSVD3, RSVD4), 253*4882a593Smuzhiyun PIN(GPIO_X4_AUD_PX4, RSVD1, SPI1, SPI2, DAP2), 254*4882a593Smuzhiyun PIN(GPIO_X5_AUD_PX5, RSVD1, SPI1, SPI2, RSVD4), 255*4882a593Smuzhiyun PIN(GPIO_X6_AUD_PX6, SPI6, SPI1, SPI2, RSVD4), 256*4882a593Smuzhiyun PIN(GPIO_X7_AUD_PX7, RSVD1, SPI1, SPI2, RSVD4), 257*4882a593Smuzhiyun PIN_RESERVED, 258*4882a593Smuzhiyun PIN_RESERVED, 259*4882a593Smuzhiyun /* Offset 0x3390 */ 260*4882a593Smuzhiyun PIN(SDMMC3_CLK_PA6, SDMMC3, RSVD2, RSVD3, SPI3), 261*4882a593Smuzhiyun PIN(SDMMC3_CMD_PA7, SDMMC3, PWM3, UARTA, SPI3), 262*4882a593Smuzhiyun PIN(SDMMC3_DAT0_PB7, SDMMC3, RSVD2, RSVD3, SPI3), 263*4882a593Smuzhiyun PIN(SDMMC3_DAT1_PB6, SDMMC3, PWM2, UARTA, SPI3), 264*4882a593Smuzhiyun PIN(SDMMC3_DAT2_PB5, SDMMC3, PWM1, DISPLAYA, SPI3), 265*4882a593Smuzhiyun PIN(SDMMC3_DAT3_PB4, SDMMC3, PWM0, DISPLAYB, SPI3), 266*4882a593Smuzhiyun PIN_RESERVED, 267*4882a593Smuzhiyun PIN_RESERVED, 268*4882a593Smuzhiyun PIN_RESERVED, 269*4882a593Smuzhiyun PIN_RESERVED, 270*4882a593Smuzhiyun PIN_RESERVED, 271*4882a593Smuzhiyun PIN_RESERVED, 272*4882a593Smuzhiyun PIN_RESERVED, 273*4882a593Smuzhiyun PIN_RESERVED, 274*4882a593Smuzhiyun PIN_RESERVED, 275*4882a593Smuzhiyun PIN_RESERVED, 276*4882a593Smuzhiyun PIN_RESERVED, 277*4882a593Smuzhiyun PIN_RESERVED, 278*4882a593Smuzhiyun PIN_RESERVED, 279*4882a593Smuzhiyun PIN_RESERVED, 280*4882a593Smuzhiyun /* Offset 0x33e0 */ 281*4882a593Smuzhiyun PIN(HDMI_CEC_PEE3, CEC, SDMMC3, RSVD3, SOC), 282*4882a593Smuzhiyun PIN(SDMMC1_WP_N_PV3, SDMMC1, CLK12, SPI4, UARTA), 283*4882a593Smuzhiyun PIN(SDMMC3_CD_N_PV2, SDMMC3, OWR, RSVD3, RSVD4), 284*4882a593Smuzhiyun PIN(GPIO_W2_AUD_PW2, SPI6, RSVD2, SPI2, I2C1), 285*4882a593Smuzhiyun PIN(GPIO_W3_AUD_PW3, SPI6, SPI1, SPI2, I2C1), 286*4882a593Smuzhiyun PIN(USB_VBUS_EN0_PN4, USB, RSVD2, RSVD3, RSVD4), 287*4882a593Smuzhiyun PIN(USB_VBUS_EN1_PN5, USB, RSVD2, RSVD3, RSVD4), 288*4882a593Smuzhiyun PIN(SDMMC3_CLK_LB_IN_PEE5, SDMMC3, RSVD2, RSVD3, RSVD4), 289*4882a593Smuzhiyun PIN(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3, RSVD2, RSVD3, RSVD4), 290*4882a593Smuzhiyun PIN(GMI_CLK_LB, SDMMC2, NAND, GMI, RSVD4), 291*4882a593Smuzhiyun PIN(RESET_OUT_N, RSVD1, RSVD2, RSVD3, RESET_OUT_N), 292*4882a593Smuzhiyun }; 293*4882a593Smuzhiyun const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra114_pingroups; 294