1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * support fot the imx6 based aristainetos board 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2014 Heiko Schocher <hs@denx.de> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun#include "imx6dl.dtsi" 9*4882a593Smuzhiyun#include "imx6qdl-aristainetos.dtsi" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun model = "aristainetos i.MX6 Dual Lite Board 4"; 13*4882a593Smuzhiyun compatible = "fsl,imx6dl"; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun backlight { 16*4882a593Smuzhiyun compatible = "pwm-backlight"; 17*4882a593Smuzhiyun pwms = <&pwm1 0 5000000>; 18*4882a593Smuzhiyun brightness-levels = <0 4 8 16 32 64 128 255>; 19*4882a593Smuzhiyun default-brightness-level = <7>; 20*4882a593Smuzhiyun enable-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 21*4882a593Smuzhiyun pinctrl-names = "default"; 22*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_backlight>; 23*4882a593Smuzhiyun status = "okay"; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun memory@10000000 { 27*4882a593Smuzhiyun device_type = "memory"; 28*4882a593Smuzhiyun reg = <0x10000000 0x40000000>; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun display0: disp0 { 32*4882a593Smuzhiyun compatible = "fsl,imx-parallel-display"; 33*4882a593Smuzhiyun interface-pix-fmt = "rgb24"; 34*4882a593Smuzhiyun pinctrl-names = "default"; 35*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_ipu_disp>; 36*4882a593Smuzhiyun status = "okay"; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun display-timings { 39*4882a593Smuzhiyun 480x800p60 { 40*4882a593Smuzhiyun native-mode; 41*4882a593Smuzhiyun clock-frequency = <30000000>; 42*4882a593Smuzhiyun hactive = <480>; 43*4882a593Smuzhiyun vactive = <800>; 44*4882a593Smuzhiyun hfront-porch = <59>; 45*4882a593Smuzhiyun hback-porch = <10>; 46*4882a593Smuzhiyun hsync-len = <10>; 47*4882a593Smuzhiyun vback-porch = <15>; 48*4882a593Smuzhiyun vfront-porch = <15>; 49*4882a593Smuzhiyun vsync-len = <15>; 50*4882a593Smuzhiyun hsync-active = <1>; 51*4882a593Smuzhiyun vsync-active = <1>; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun port { 56*4882a593Smuzhiyun display0_in: endpoint { 57*4882a593Smuzhiyun remote-endpoint = <&ipu1_di0_disp0>; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun}; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun&ecspi2 { 64*4882a593Smuzhiyun cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>; 65*4882a593Smuzhiyun pinctrl-names = "default"; 66*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_ecspi2>; 67*4882a593Smuzhiyun status = "okay"; 68*4882a593Smuzhiyun}; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun&i2c2 { 71*4882a593Smuzhiyun clock-frequency = <100000>; 72*4882a593Smuzhiyun pinctrl-names = "default"; 73*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_i2c2>; 74*4882a593Smuzhiyun status = "okay"; 75*4882a593Smuzhiyun}; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun&ipu1_di0_disp0 { 78*4882a593Smuzhiyun remote-endpoint = <&display0_in>; 79*4882a593Smuzhiyun}; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun&pwm1 { 82*4882a593Smuzhiyun #pwm-cells = <2>; 83*4882a593Smuzhiyun status = "okay"; 84*4882a593Smuzhiyun}; 85