1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/ { 8*4882a593Smuzhiyun backlight: backlight { 9*4882a593Smuzhiyun status = "okay"; 10*4882a593Smuzhiyun compatible = "pwm-backlight"; 11*4882a593Smuzhiyun pwms = <&pwm1 0 25000 0>; 12*4882a593Smuzhiyun brightness-levels = < 13*4882a593Smuzhiyun 0 1 2 3 4 5 6 7 14*4882a593Smuzhiyun 8 9 10 11 12 13 14 15 15*4882a593Smuzhiyun 16 17 18 19 20 21 22 23 16*4882a593Smuzhiyun 24 25 26 27 28 29 30 31 17*4882a593Smuzhiyun 32 33 34 35 36 37 38 39 18*4882a593Smuzhiyun 40 41 42 43 44 45 46 47 19*4882a593Smuzhiyun 48 49 50 51 52 53 54 55 20*4882a593Smuzhiyun 56 57 58 59 60 61 62 63 21*4882a593Smuzhiyun 64 65 66 67 68 69 70 71 22*4882a593Smuzhiyun 72 73 74 75 76 77 78 79 23*4882a593Smuzhiyun 80 81 82 83 84 85 86 87 24*4882a593Smuzhiyun 88 89 90 91 92 93 94 95 25*4882a593Smuzhiyun 96 97 98 99 100 101 102 103 26*4882a593Smuzhiyun 104 105 106 107 108 109 110 111 27*4882a593Smuzhiyun 112 113 114 115 116 117 118 119 28*4882a593Smuzhiyun 120 121 122 123 124 125 126 127 29*4882a593Smuzhiyun 128 129 130 131 132 133 134 135 30*4882a593Smuzhiyun 136 137 138 139 140 141 142 143 31*4882a593Smuzhiyun 144 145 146 147 148 149 150 151 32*4882a593Smuzhiyun 152 153 154 155 156 157 158 159 33*4882a593Smuzhiyun 160 161 162 163 164 165 166 167 34*4882a593Smuzhiyun 168 169 170 171 172 173 174 175 35*4882a593Smuzhiyun 176 177 178 179 180 181 182 183 36*4882a593Smuzhiyun 184 185 186 187 188 189 190 191 37*4882a593Smuzhiyun 192 193 194 195 196 197 198 199 38*4882a593Smuzhiyun 200 201 202 203 204 205 206 207 39*4882a593Smuzhiyun 208 209 210 211 212 213 214 215 40*4882a593Smuzhiyun 216 217 218 219 220 221 222 223 41*4882a593Smuzhiyun 224 225 226 227 228 229 230 231 42*4882a593Smuzhiyun 232 233 234 235 236 237 238 239 43*4882a593Smuzhiyun 240 241 242 243 244 245 246 247 44*4882a593Smuzhiyun 248 249 250 251 252 253 254 255>; 45*4882a593Smuzhiyun default-brightness-level = <200>; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun panel: panel { 49*4882a593Smuzhiyun compatible = "simple-panel"; 50*4882a593Smuzhiyun bus-format = <MEDIA_BUS_FMT_RGB888_1X24>; 51*4882a593Smuzhiyun backlight = <&backlight>; 52*4882a593Smuzhiyun enable-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 53*4882a593Smuzhiyun enable-delay-ms = <20>; 54*4882a593Smuzhiyun reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>; 55*4882a593Smuzhiyun reset-delay-ms = <10>; 56*4882a593Smuzhiyun prepare-delay-ms = <20>; 57*4882a593Smuzhiyun unprepare-delay-ms = <20>; 58*4882a593Smuzhiyun disable-delay-ms = <20>; 59*4882a593Smuzhiyun width-mm = <95>; 60*4882a593Smuzhiyun height-mm = <54>; 61*4882a593Smuzhiyun status = "okay"; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun display-timings { 64*4882a593Smuzhiyun native-mode = <&stt0430_enl2c_timing>; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun stt0430_enl2c_timing: timing0 { 67*4882a593Smuzhiyun clock-frequency = <12000000>; 68*4882a593Smuzhiyun hactive = <480>; 69*4882a593Smuzhiyun vactive = <272>; 70*4882a593Smuzhiyun hback-porch = <60>; 71*4882a593Smuzhiyun hfront-porch = <20>; 72*4882a593Smuzhiyun vback-porch = <28>; 73*4882a593Smuzhiyun vfront-porch = <20>; 74*4882a593Smuzhiyun hsync-len = <20>; 75*4882a593Smuzhiyun vsync-len = <20>; 76*4882a593Smuzhiyun hsync-active = <0>; 77*4882a593Smuzhiyun vsync-active = <0>; 78*4882a593Smuzhiyun de-active = <0>; 79*4882a593Smuzhiyun pixelclk-active = <0>; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun port { 84*4882a593Smuzhiyun panel_in_rgb: endpoint { 85*4882a593Smuzhiyun remote-endpoint = <&rgb_out_panel>; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun}; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun&display_subsystem { 92*4882a593Smuzhiyun status = "okay"; 93*4882a593Smuzhiyun}; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun&pwm1 { 96*4882a593Smuzhiyun status = "okay"; 97*4882a593Smuzhiyun}; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun&rgb { 100*4882a593Smuzhiyun status = "okay"; 101*4882a593Smuzhiyun pinctrl-names = "default"; 102*4882a593Smuzhiyun pinctrl-0 = <&lcdc_ctl &lcdc_rgb888_m1>; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun ports { 105*4882a593Smuzhiyun rgb_out: port@1 { 106*4882a593Smuzhiyun reg = <1>; 107*4882a593Smuzhiyun #address-cells = <1>; 108*4882a593Smuzhiyun #size-cells = <0>; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun rgb_out_panel: endpoint@0 { 111*4882a593Smuzhiyun reg = <0>; 112*4882a593Smuzhiyun remote-endpoint = <&panel_in_rgb>; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun}; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun&route_rgb { 119*4882a593Smuzhiyun status = "okay"; 120*4882a593Smuzhiyun}; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun&vop { 123*4882a593Smuzhiyun status = "okay"; 124*4882a593Smuzhiyun}; 125