1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * vt1211.c - driver for the VIA VT1211 Super-I/O chip integrated hardware
4*4882a593Smuzhiyun * monitoring features
5*4882a593Smuzhiyun * Copyright (C) 2006 Juerg Haefliger <juergh@gmail.com>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * This driver is based on the driver for kernel 2.4 by Mark D. Studebaker
8*4882a593Smuzhiyun * and its port to kernel 2.6 by Lars Ekman.
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/init.h>
15*4882a593Smuzhiyun #include <linux/slab.h>
16*4882a593Smuzhiyun #include <linux/jiffies.h>
17*4882a593Smuzhiyun #include <linux/platform_device.h>
18*4882a593Smuzhiyun #include <linux/hwmon.h>
19*4882a593Smuzhiyun #include <linux/hwmon-sysfs.h>
20*4882a593Smuzhiyun #include <linux/hwmon-vid.h>
21*4882a593Smuzhiyun #include <linux/err.h>
22*4882a593Smuzhiyun #include <linux/mutex.h>
23*4882a593Smuzhiyun #include <linux/ioport.h>
24*4882a593Smuzhiyun #include <linux/acpi.h>
25*4882a593Smuzhiyun #include <linux/io.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun static int uch_config = -1;
28*4882a593Smuzhiyun module_param(uch_config, int, 0);
29*4882a593Smuzhiyun MODULE_PARM_DESC(uch_config, "Initialize the universal channel configuration");
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun static int int_mode = -1;
32*4882a593Smuzhiyun module_param(int_mode, int, 0);
33*4882a593Smuzhiyun MODULE_PARM_DESC(int_mode, "Force the temperature interrupt mode");
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun static unsigned short force_id;
36*4882a593Smuzhiyun module_param(force_id, ushort, 0);
37*4882a593Smuzhiyun MODULE_PARM_DESC(force_id, "Override the detected device ID");
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun static struct platform_device *pdev;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun #define DRVNAME "vt1211"
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun /* ---------------------------------------------------------------------
44*4882a593Smuzhiyun * Registers
45*4882a593Smuzhiyun *
46*4882a593Smuzhiyun * The sensors are defined as follows.
47*4882a593Smuzhiyun *
48*4882a593Smuzhiyun * Sensor Voltage Mode Temp Mode Notes (from the datasheet)
49*4882a593Smuzhiyun * -------- ------------ --------- --------------------------
50*4882a593Smuzhiyun * Reading 1 temp1 Intel thermal diode
51*4882a593Smuzhiyun * Reading 3 temp2 Internal thermal diode
52*4882a593Smuzhiyun * UCH1/Reading2 in0 temp3 NTC type thermistor
53*4882a593Smuzhiyun * UCH2 in1 temp4 +2.5V
54*4882a593Smuzhiyun * UCH3 in2 temp5 VccP
55*4882a593Smuzhiyun * UCH4 in3 temp6 +5V
56*4882a593Smuzhiyun * UCH5 in4 temp7 +12V
57*4882a593Smuzhiyun * 3.3V in5 Internal VDD (+3.3V)
58*4882a593Smuzhiyun *
59*4882a593Smuzhiyun * --------------------------------------------------------------------- */
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun /* Voltages (in) numbered 0-5 (ix) */
62*4882a593Smuzhiyun #define VT1211_REG_IN(ix) (0x21 + (ix))
63*4882a593Smuzhiyun #define VT1211_REG_IN_MIN(ix) ((ix) == 0 ? 0x3e : 0x2a + 2 * (ix))
64*4882a593Smuzhiyun #define VT1211_REG_IN_MAX(ix) ((ix) == 0 ? 0x3d : 0x29 + 2 * (ix))
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /* Temperatures (temp) numbered 0-6 (ix) */
67*4882a593Smuzhiyun static u8 regtemp[] = {0x1f, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25};
68*4882a593Smuzhiyun static u8 regtempmax[] = {0x39, 0x1d, 0x3d, 0x2b, 0x2d, 0x2f, 0x31};
69*4882a593Smuzhiyun static u8 regtemphyst[] = {0x3a, 0x1e, 0x3e, 0x2c, 0x2e, 0x30, 0x32};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /* Fans numbered 0-1 (ix) */
72*4882a593Smuzhiyun #define VT1211_REG_FAN(ix) (0x29 + (ix))
73*4882a593Smuzhiyun #define VT1211_REG_FAN_MIN(ix) (0x3b + (ix))
74*4882a593Smuzhiyun #define VT1211_REG_FAN_DIV 0x47
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun /* PWMs numbered 0-1 (ix) */
77*4882a593Smuzhiyun /* Auto points numbered 0-3 (ap) */
78*4882a593Smuzhiyun #define VT1211_REG_PWM(ix) (0x60 + (ix))
79*4882a593Smuzhiyun #define VT1211_REG_PWM_CLK 0x50
80*4882a593Smuzhiyun #define VT1211_REG_PWM_CTL 0x51
81*4882a593Smuzhiyun #define VT1211_REG_PWM_AUTO_TEMP(ap) (0x55 - (ap))
82*4882a593Smuzhiyun #define VT1211_REG_PWM_AUTO_PWM(ix, ap) (0x58 + 2 * (ix) - (ap))
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /* Miscellaneous registers */
85*4882a593Smuzhiyun #define VT1211_REG_CONFIG 0x40
86*4882a593Smuzhiyun #define VT1211_REG_ALARM1 0x41
87*4882a593Smuzhiyun #define VT1211_REG_ALARM2 0x42
88*4882a593Smuzhiyun #define VT1211_REG_VID 0x45
89*4882a593Smuzhiyun #define VT1211_REG_UCH_CONFIG 0x4a
90*4882a593Smuzhiyun #define VT1211_REG_TEMP1_CONFIG 0x4b
91*4882a593Smuzhiyun #define VT1211_REG_TEMP2_CONFIG 0x4c
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun /* In, temp & fan alarm bits */
94*4882a593Smuzhiyun static const u8 bitalarmin[] = {11, 0, 1, 3, 8, 2, 9};
95*4882a593Smuzhiyun static const u8 bitalarmtemp[] = {4, 15, 11, 0, 1, 3, 8};
96*4882a593Smuzhiyun static const u8 bitalarmfan[] = {6, 7};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun /* ---------------------------------------------------------------------
99*4882a593Smuzhiyun * Data structures and manipulation thereof
100*4882a593Smuzhiyun * --------------------------------------------------------------------- */
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun struct vt1211_data {
103*4882a593Smuzhiyun unsigned short addr;
104*4882a593Smuzhiyun const char *name;
105*4882a593Smuzhiyun struct device *hwmon_dev;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun struct mutex update_lock;
108*4882a593Smuzhiyun char valid; /* !=0 if following fields are valid */
109*4882a593Smuzhiyun unsigned long last_updated; /* In jiffies */
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun /* Register values */
112*4882a593Smuzhiyun u8 in[6];
113*4882a593Smuzhiyun u8 in_max[6];
114*4882a593Smuzhiyun u8 in_min[6];
115*4882a593Smuzhiyun u8 temp[7];
116*4882a593Smuzhiyun u8 temp_max[7];
117*4882a593Smuzhiyun u8 temp_hyst[7];
118*4882a593Smuzhiyun u8 fan[2];
119*4882a593Smuzhiyun u8 fan_min[2];
120*4882a593Smuzhiyun u8 fan_div[2];
121*4882a593Smuzhiyun u8 fan_ctl;
122*4882a593Smuzhiyun u8 pwm[2];
123*4882a593Smuzhiyun u8 pwm_ctl[2];
124*4882a593Smuzhiyun u8 pwm_clk;
125*4882a593Smuzhiyun u8 pwm_auto_temp[4];
126*4882a593Smuzhiyun u8 pwm_auto_pwm[2][4];
127*4882a593Smuzhiyun u8 vid; /* Read once at init time */
128*4882a593Smuzhiyun u8 vrm;
129*4882a593Smuzhiyun u8 uch_config; /* Read once at init time */
130*4882a593Smuzhiyun u16 alarms;
131*4882a593Smuzhiyun };
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun /* ix = [0-5] */
134*4882a593Smuzhiyun #define ISVOLT(ix, uch_config) ((ix) > 4 ? 1 : \
135*4882a593Smuzhiyun !(((uch_config) >> ((ix) + 2)) & 1))
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun /* ix = [0-6] */
138*4882a593Smuzhiyun #define ISTEMP(ix, uch_config) ((ix) < 2 ? 1 : \
139*4882a593Smuzhiyun ((uch_config) >> (ix)) & 1)
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun /*
142*4882a593Smuzhiyun * in5 (ix = 5) is special. It's the internal 3.3V so it's scaled in the
143*4882a593Smuzhiyun * driver according to the VT1211 BIOS porting guide
144*4882a593Smuzhiyun */
145*4882a593Smuzhiyun #define IN_FROM_REG(ix, reg) ((reg) < 3 ? 0 : (ix) == 5 ? \
146*4882a593Smuzhiyun (((reg) - 3) * 15882 + 479) / 958 : \
147*4882a593Smuzhiyun (((reg) - 3) * 10000 + 479) / 958)
148*4882a593Smuzhiyun #define IN_TO_REG(ix, val) (clamp_val((ix) == 5 ? \
149*4882a593Smuzhiyun ((val) * 958 + 7941) / 15882 + 3 : \
150*4882a593Smuzhiyun ((val) * 958 + 5000) / 10000 + 3, 0, 255))
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun /*
153*4882a593Smuzhiyun * temp1 (ix = 0) is an intel thermal diode which is scaled in user space.
154*4882a593Smuzhiyun * temp2 (ix = 1) is the internal temp diode so it's scaled in the driver
155*4882a593Smuzhiyun * according to some measurements that I took on an EPIA M10000.
156*4882a593Smuzhiyun * temp3-7 are thermistor based so the driver returns the voltage measured at
157*4882a593Smuzhiyun * the pin (range 0V - 2.2V).
158*4882a593Smuzhiyun */
159*4882a593Smuzhiyun #define TEMP_FROM_REG(ix, reg) ((ix) == 0 ? (reg) * 1000 : \
160*4882a593Smuzhiyun (ix) == 1 ? (reg) < 51 ? 0 : \
161*4882a593Smuzhiyun ((reg) - 51) * 1000 : \
162*4882a593Smuzhiyun ((253 - (reg)) * 2200 + 105) / 210)
163*4882a593Smuzhiyun #define TEMP_TO_REG(ix, val) clamp_val( \
164*4882a593Smuzhiyun ((ix) == 0 ? ((val) + 500) / 1000 : \
165*4882a593Smuzhiyun (ix) == 1 ? ((val) + 500) / 1000 + 51 : \
166*4882a593Smuzhiyun 253 - ((val) * 210 + 1100) / 2200), 0, 255)
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun #define DIV_FROM_REG(reg) (1 << (reg))
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun #define RPM_FROM_REG(reg, div) (((reg) == 0) || ((reg) == 255) ? 0 : \
171*4882a593Smuzhiyun 1310720 / (reg) / DIV_FROM_REG(div))
172*4882a593Smuzhiyun #define RPM_TO_REG(val, div) ((val) == 0 ? 255 : \
173*4882a593Smuzhiyun clamp_val((1310720 / (val) / \
174*4882a593Smuzhiyun DIV_FROM_REG(div)), 1, 254))
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun /* ---------------------------------------------------------------------
177*4882a593Smuzhiyun * Super-I/O constants and functions
178*4882a593Smuzhiyun * --------------------------------------------------------------------- */
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun /*
181*4882a593Smuzhiyun * Configuration index port registers
182*4882a593Smuzhiyun * The vt1211 can live at 2 different addresses so we need to probe both
183*4882a593Smuzhiyun */
184*4882a593Smuzhiyun #define SIO_REG_CIP1 0x2e
185*4882a593Smuzhiyun #define SIO_REG_CIP2 0x4e
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun /* Configuration registers */
188*4882a593Smuzhiyun #define SIO_VT1211_LDN 0x07 /* logical device number */
189*4882a593Smuzhiyun #define SIO_VT1211_DEVID 0x20 /* device ID */
190*4882a593Smuzhiyun #define SIO_VT1211_DEVREV 0x21 /* device revision */
191*4882a593Smuzhiyun #define SIO_VT1211_ACTIVE 0x30 /* HW monitor active */
192*4882a593Smuzhiyun #define SIO_VT1211_BADDR 0x60 /* base I/O address */
193*4882a593Smuzhiyun #define SIO_VT1211_ID 0x3c /* VT1211 device ID */
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun /* VT1211 logical device numbers */
196*4882a593Smuzhiyun #define SIO_VT1211_LDN_HWMON 0x0b /* HW monitor */
197*4882a593Smuzhiyun
superio_outb(int sio_cip,int reg,int val)198*4882a593Smuzhiyun static inline void superio_outb(int sio_cip, int reg, int val)
199*4882a593Smuzhiyun {
200*4882a593Smuzhiyun outb(reg, sio_cip);
201*4882a593Smuzhiyun outb(val, sio_cip + 1);
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun
superio_inb(int sio_cip,int reg)204*4882a593Smuzhiyun static inline int superio_inb(int sio_cip, int reg)
205*4882a593Smuzhiyun {
206*4882a593Smuzhiyun outb(reg, sio_cip);
207*4882a593Smuzhiyun return inb(sio_cip + 1);
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun
superio_select(int sio_cip,int ldn)210*4882a593Smuzhiyun static inline void superio_select(int sio_cip, int ldn)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun outb(SIO_VT1211_LDN, sio_cip);
213*4882a593Smuzhiyun outb(ldn, sio_cip + 1);
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
superio_enter(int sio_cip)216*4882a593Smuzhiyun static inline int superio_enter(int sio_cip)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun if (!request_muxed_region(sio_cip, 2, DRVNAME))
219*4882a593Smuzhiyun return -EBUSY;
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun outb(0x87, sio_cip);
222*4882a593Smuzhiyun outb(0x87, sio_cip);
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun return 0;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
superio_exit(int sio_cip)227*4882a593Smuzhiyun static inline void superio_exit(int sio_cip)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun outb(0xaa, sio_cip);
230*4882a593Smuzhiyun release_region(sio_cip, 2);
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun /* ---------------------------------------------------------------------
234*4882a593Smuzhiyun * Device I/O access
235*4882a593Smuzhiyun * --------------------------------------------------------------------- */
236*4882a593Smuzhiyun
vt1211_read8(struct vt1211_data * data,u8 reg)237*4882a593Smuzhiyun static inline u8 vt1211_read8(struct vt1211_data *data, u8 reg)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun return inb(data->addr + reg);
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
vt1211_write8(struct vt1211_data * data,u8 reg,u8 val)242*4882a593Smuzhiyun static inline void vt1211_write8(struct vt1211_data *data, u8 reg, u8 val)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun outb(val, data->addr + reg);
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
vt1211_update_device(struct device * dev)247*4882a593Smuzhiyun static struct vt1211_data *vt1211_update_device(struct device *dev)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun struct vt1211_data *data = dev_get_drvdata(dev);
250*4882a593Smuzhiyun int ix, val;
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun mutex_lock(&data->update_lock);
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun /* registers cache is refreshed after 1 second */
255*4882a593Smuzhiyun if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
256*4882a593Smuzhiyun /* read VID */
257*4882a593Smuzhiyun data->vid = vt1211_read8(data, VT1211_REG_VID) & 0x1f;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun /* voltage (in) registers */
260*4882a593Smuzhiyun for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
261*4882a593Smuzhiyun if (ISVOLT(ix, data->uch_config)) {
262*4882a593Smuzhiyun data->in[ix] = vt1211_read8(data,
263*4882a593Smuzhiyun VT1211_REG_IN(ix));
264*4882a593Smuzhiyun data->in_min[ix] = vt1211_read8(data,
265*4882a593Smuzhiyun VT1211_REG_IN_MIN(ix));
266*4882a593Smuzhiyun data->in_max[ix] = vt1211_read8(data,
267*4882a593Smuzhiyun VT1211_REG_IN_MAX(ix));
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun /* temp registers */
272*4882a593Smuzhiyun for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
273*4882a593Smuzhiyun if (ISTEMP(ix, data->uch_config)) {
274*4882a593Smuzhiyun data->temp[ix] = vt1211_read8(data,
275*4882a593Smuzhiyun regtemp[ix]);
276*4882a593Smuzhiyun data->temp_max[ix] = vt1211_read8(data,
277*4882a593Smuzhiyun regtempmax[ix]);
278*4882a593Smuzhiyun data->temp_hyst[ix] = vt1211_read8(data,
279*4882a593Smuzhiyun regtemphyst[ix]);
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun /* fan & pwm registers */
284*4882a593Smuzhiyun for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) {
285*4882a593Smuzhiyun data->fan[ix] = vt1211_read8(data,
286*4882a593Smuzhiyun VT1211_REG_FAN(ix));
287*4882a593Smuzhiyun data->fan_min[ix] = vt1211_read8(data,
288*4882a593Smuzhiyun VT1211_REG_FAN_MIN(ix));
289*4882a593Smuzhiyun data->pwm[ix] = vt1211_read8(data,
290*4882a593Smuzhiyun VT1211_REG_PWM(ix));
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun val = vt1211_read8(data, VT1211_REG_FAN_DIV);
293*4882a593Smuzhiyun data->fan_div[0] = (val >> 4) & 3;
294*4882a593Smuzhiyun data->fan_div[1] = (val >> 6) & 3;
295*4882a593Smuzhiyun data->fan_ctl = val & 0xf;
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun val = vt1211_read8(data, VT1211_REG_PWM_CTL);
298*4882a593Smuzhiyun data->pwm_ctl[0] = val & 0xf;
299*4882a593Smuzhiyun data->pwm_ctl[1] = (val >> 4) & 0xf;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun data->pwm_clk = vt1211_read8(data, VT1211_REG_PWM_CLK);
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun /* pwm & temp auto point registers */
304*4882a593Smuzhiyun data->pwm_auto_pwm[0][1] = vt1211_read8(data,
305*4882a593Smuzhiyun VT1211_REG_PWM_AUTO_PWM(0, 1));
306*4882a593Smuzhiyun data->pwm_auto_pwm[0][2] = vt1211_read8(data,
307*4882a593Smuzhiyun VT1211_REG_PWM_AUTO_PWM(0, 2));
308*4882a593Smuzhiyun data->pwm_auto_pwm[1][1] = vt1211_read8(data,
309*4882a593Smuzhiyun VT1211_REG_PWM_AUTO_PWM(1, 1));
310*4882a593Smuzhiyun data->pwm_auto_pwm[1][2] = vt1211_read8(data,
311*4882a593Smuzhiyun VT1211_REG_PWM_AUTO_PWM(1, 2));
312*4882a593Smuzhiyun for (ix = 0; ix < ARRAY_SIZE(data->pwm_auto_temp); ix++) {
313*4882a593Smuzhiyun data->pwm_auto_temp[ix] = vt1211_read8(data,
314*4882a593Smuzhiyun VT1211_REG_PWM_AUTO_TEMP(ix));
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun /* alarm registers */
318*4882a593Smuzhiyun data->alarms = (vt1211_read8(data, VT1211_REG_ALARM2) << 8) |
319*4882a593Smuzhiyun vt1211_read8(data, VT1211_REG_ALARM1);
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun data->last_updated = jiffies;
322*4882a593Smuzhiyun data->valid = 1;
323*4882a593Smuzhiyun }
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun return data;
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun /* ---------------------------------------------------------------------
331*4882a593Smuzhiyun * Voltage sysfs interfaces
332*4882a593Smuzhiyun * ix = [0-5]
333*4882a593Smuzhiyun * --------------------------------------------------------------------- */
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun #define SHOW_IN_INPUT 0
336*4882a593Smuzhiyun #define SHOW_SET_IN_MIN 1
337*4882a593Smuzhiyun #define SHOW_SET_IN_MAX 2
338*4882a593Smuzhiyun #define SHOW_IN_ALARM 3
339*4882a593Smuzhiyun
show_in(struct device * dev,struct device_attribute * attr,char * buf)340*4882a593Smuzhiyun static ssize_t show_in(struct device *dev, struct device_attribute *attr,
341*4882a593Smuzhiyun char *buf)
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun struct vt1211_data *data = vt1211_update_device(dev);
344*4882a593Smuzhiyun struct sensor_device_attribute_2 *sensor_attr_2 =
345*4882a593Smuzhiyun to_sensor_dev_attr_2(attr);
346*4882a593Smuzhiyun int ix = sensor_attr_2->index;
347*4882a593Smuzhiyun int fn = sensor_attr_2->nr;
348*4882a593Smuzhiyun int res;
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun switch (fn) {
351*4882a593Smuzhiyun case SHOW_IN_INPUT:
352*4882a593Smuzhiyun res = IN_FROM_REG(ix, data->in[ix]);
353*4882a593Smuzhiyun break;
354*4882a593Smuzhiyun case SHOW_SET_IN_MIN:
355*4882a593Smuzhiyun res = IN_FROM_REG(ix, data->in_min[ix]);
356*4882a593Smuzhiyun break;
357*4882a593Smuzhiyun case SHOW_SET_IN_MAX:
358*4882a593Smuzhiyun res = IN_FROM_REG(ix, data->in_max[ix]);
359*4882a593Smuzhiyun break;
360*4882a593Smuzhiyun case SHOW_IN_ALARM:
361*4882a593Smuzhiyun res = (data->alarms >> bitalarmin[ix]) & 1;
362*4882a593Smuzhiyun break;
363*4882a593Smuzhiyun default:
364*4882a593Smuzhiyun res = 0;
365*4882a593Smuzhiyun dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
366*4882a593Smuzhiyun }
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun return sprintf(buf, "%d\n", res);
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun
set_in(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)371*4882a593Smuzhiyun static ssize_t set_in(struct device *dev, struct device_attribute *attr,
372*4882a593Smuzhiyun const char *buf, size_t count)
373*4882a593Smuzhiyun {
374*4882a593Smuzhiyun struct vt1211_data *data = dev_get_drvdata(dev);
375*4882a593Smuzhiyun struct sensor_device_attribute_2 *sensor_attr_2 =
376*4882a593Smuzhiyun to_sensor_dev_attr_2(attr);
377*4882a593Smuzhiyun int ix = sensor_attr_2->index;
378*4882a593Smuzhiyun int fn = sensor_attr_2->nr;
379*4882a593Smuzhiyun long val;
380*4882a593Smuzhiyun int err;
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
383*4882a593Smuzhiyun if (err)
384*4882a593Smuzhiyun return err;
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun mutex_lock(&data->update_lock);
387*4882a593Smuzhiyun switch (fn) {
388*4882a593Smuzhiyun case SHOW_SET_IN_MIN:
389*4882a593Smuzhiyun data->in_min[ix] = IN_TO_REG(ix, val);
390*4882a593Smuzhiyun vt1211_write8(data, VT1211_REG_IN_MIN(ix), data->in_min[ix]);
391*4882a593Smuzhiyun break;
392*4882a593Smuzhiyun case SHOW_SET_IN_MAX:
393*4882a593Smuzhiyun data->in_max[ix] = IN_TO_REG(ix, val);
394*4882a593Smuzhiyun vt1211_write8(data, VT1211_REG_IN_MAX(ix), data->in_max[ix]);
395*4882a593Smuzhiyun break;
396*4882a593Smuzhiyun default:
397*4882a593Smuzhiyun dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
398*4882a593Smuzhiyun }
399*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun return count;
402*4882a593Smuzhiyun }
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun /* ---------------------------------------------------------------------
405*4882a593Smuzhiyun * Temperature sysfs interfaces
406*4882a593Smuzhiyun * ix = [0-6]
407*4882a593Smuzhiyun * --------------------------------------------------------------------- */
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun #define SHOW_TEMP_INPUT 0
410*4882a593Smuzhiyun #define SHOW_SET_TEMP_MAX 1
411*4882a593Smuzhiyun #define SHOW_SET_TEMP_MAX_HYST 2
412*4882a593Smuzhiyun #define SHOW_TEMP_ALARM 3
413*4882a593Smuzhiyun
show_temp(struct device * dev,struct device_attribute * attr,char * buf)414*4882a593Smuzhiyun static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
415*4882a593Smuzhiyun char *buf)
416*4882a593Smuzhiyun {
417*4882a593Smuzhiyun struct vt1211_data *data = vt1211_update_device(dev);
418*4882a593Smuzhiyun struct sensor_device_attribute_2 *sensor_attr_2 =
419*4882a593Smuzhiyun to_sensor_dev_attr_2(attr);
420*4882a593Smuzhiyun int ix = sensor_attr_2->index;
421*4882a593Smuzhiyun int fn = sensor_attr_2->nr;
422*4882a593Smuzhiyun int res;
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun switch (fn) {
425*4882a593Smuzhiyun case SHOW_TEMP_INPUT:
426*4882a593Smuzhiyun res = TEMP_FROM_REG(ix, data->temp[ix]);
427*4882a593Smuzhiyun break;
428*4882a593Smuzhiyun case SHOW_SET_TEMP_MAX:
429*4882a593Smuzhiyun res = TEMP_FROM_REG(ix, data->temp_max[ix]);
430*4882a593Smuzhiyun break;
431*4882a593Smuzhiyun case SHOW_SET_TEMP_MAX_HYST:
432*4882a593Smuzhiyun res = TEMP_FROM_REG(ix, data->temp_hyst[ix]);
433*4882a593Smuzhiyun break;
434*4882a593Smuzhiyun case SHOW_TEMP_ALARM:
435*4882a593Smuzhiyun res = (data->alarms >> bitalarmtemp[ix]) & 1;
436*4882a593Smuzhiyun break;
437*4882a593Smuzhiyun default:
438*4882a593Smuzhiyun res = 0;
439*4882a593Smuzhiyun dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
440*4882a593Smuzhiyun }
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun return sprintf(buf, "%d\n", res);
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun
set_temp(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)445*4882a593Smuzhiyun static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
446*4882a593Smuzhiyun const char *buf, size_t count)
447*4882a593Smuzhiyun {
448*4882a593Smuzhiyun struct vt1211_data *data = dev_get_drvdata(dev);
449*4882a593Smuzhiyun struct sensor_device_attribute_2 *sensor_attr_2 =
450*4882a593Smuzhiyun to_sensor_dev_attr_2(attr);
451*4882a593Smuzhiyun int ix = sensor_attr_2->index;
452*4882a593Smuzhiyun int fn = sensor_attr_2->nr;
453*4882a593Smuzhiyun long val;
454*4882a593Smuzhiyun int err;
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
457*4882a593Smuzhiyun if (err)
458*4882a593Smuzhiyun return err;
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun mutex_lock(&data->update_lock);
461*4882a593Smuzhiyun switch (fn) {
462*4882a593Smuzhiyun case SHOW_SET_TEMP_MAX:
463*4882a593Smuzhiyun data->temp_max[ix] = TEMP_TO_REG(ix, val);
464*4882a593Smuzhiyun vt1211_write8(data, regtempmax[ix],
465*4882a593Smuzhiyun data->temp_max[ix]);
466*4882a593Smuzhiyun break;
467*4882a593Smuzhiyun case SHOW_SET_TEMP_MAX_HYST:
468*4882a593Smuzhiyun data->temp_hyst[ix] = TEMP_TO_REG(ix, val);
469*4882a593Smuzhiyun vt1211_write8(data, regtemphyst[ix],
470*4882a593Smuzhiyun data->temp_hyst[ix]);
471*4882a593Smuzhiyun break;
472*4882a593Smuzhiyun default:
473*4882a593Smuzhiyun dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
474*4882a593Smuzhiyun }
475*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun return count;
478*4882a593Smuzhiyun }
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun /* ---------------------------------------------------------------------
481*4882a593Smuzhiyun * Fan sysfs interfaces
482*4882a593Smuzhiyun * ix = [0-1]
483*4882a593Smuzhiyun * --------------------------------------------------------------------- */
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun #define SHOW_FAN_INPUT 0
486*4882a593Smuzhiyun #define SHOW_SET_FAN_MIN 1
487*4882a593Smuzhiyun #define SHOW_SET_FAN_DIV 2
488*4882a593Smuzhiyun #define SHOW_FAN_ALARM 3
489*4882a593Smuzhiyun
show_fan(struct device * dev,struct device_attribute * attr,char * buf)490*4882a593Smuzhiyun static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
491*4882a593Smuzhiyun char *buf)
492*4882a593Smuzhiyun {
493*4882a593Smuzhiyun struct vt1211_data *data = vt1211_update_device(dev);
494*4882a593Smuzhiyun struct sensor_device_attribute_2 *sensor_attr_2 =
495*4882a593Smuzhiyun to_sensor_dev_attr_2(attr);
496*4882a593Smuzhiyun int ix = sensor_attr_2->index;
497*4882a593Smuzhiyun int fn = sensor_attr_2->nr;
498*4882a593Smuzhiyun int res;
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun switch (fn) {
501*4882a593Smuzhiyun case SHOW_FAN_INPUT:
502*4882a593Smuzhiyun res = RPM_FROM_REG(data->fan[ix], data->fan_div[ix]);
503*4882a593Smuzhiyun break;
504*4882a593Smuzhiyun case SHOW_SET_FAN_MIN:
505*4882a593Smuzhiyun res = RPM_FROM_REG(data->fan_min[ix], data->fan_div[ix]);
506*4882a593Smuzhiyun break;
507*4882a593Smuzhiyun case SHOW_SET_FAN_DIV:
508*4882a593Smuzhiyun res = DIV_FROM_REG(data->fan_div[ix]);
509*4882a593Smuzhiyun break;
510*4882a593Smuzhiyun case SHOW_FAN_ALARM:
511*4882a593Smuzhiyun res = (data->alarms >> bitalarmfan[ix]) & 1;
512*4882a593Smuzhiyun break;
513*4882a593Smuzhiyun default:
514*4882a593Smuzhiyun res = 0;
515*4882a593Smuzhiyun dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
516*4882a593Smuzhiyun }
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun return sprintf(buf, "%d\n", res);
519*4882a593Smuzhiyun }
520*4882a593Smuzhiyun
set_fan(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)521*4882a593Smuzhiyun static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
522*4882a593Smuzhiyun const char *buf, size_t count)
523*4882a593Smuzhiyun {
524*4882a593Smuzhiyun struct vt1211_data *data = dev_get_drvdata(dev);
525*4882a593Smuzhiyun struct sensor_device_attribute_2 *sensor_attr_2 =
526*4882a593Smuzhiyun to_sensor_dev_attr_2(attr);
527*4882a593Smuzhiyun int ix = sensor_attr_2->index;
528*4882a593Smuzhiyun int fn = sensor_attr_2->nr;
529*4882a593Smuzhiyun int reg;
530*4882a593Smuzhiyun unsigned long val;
531*4882a593Smuzhiyun int err;
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun err = kstrtoul(buf, 10, &val);
534*4882a593Smuzhiyun if (err)
535*4882a593Smuzhiyun return err;
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun mutex_lock(&data->update_lock);
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun /* sync the data cache */
540*4882a593Smuzhiyun reg = vt1211_read8(data, VT1211_REG_FAN_DIV);
541*4882a593Smuzhiyun data->fan_div[0] = (reg >> 4) & 3;
542*4882a593Smuzhiyun data->fan_div[1] = (reg >> 6) & 3;
543*4882a593Smuzhiyun data->fan_ctl = reg & 0xf;
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun switch (fn) {
546*4882a593Smuzhiyun case SHOW_SET_FAN_MIN:
547*4882a593Smuzhiyun data->fan_min[ix] = RPM_TO_REG(val, data->fan_div[ix]);
548*4882a593Smuzhiyun vt1211_write8(data, VT1211_REG_FAN_MIN(ix),
549*4882a593Smuzhiyun data->fan_min[ix]);
550*4882a593Smuzhiyun break;
551*4882a593Smuzhiyun case SHOW_SET_FAN_DIV:
552*4882a593Smuzhiyun switch (val) {
553*4882a593Smuzhiyun case 1:
554*4882a593Smuzhiyun data->fan_div[ix] = 0;
555*4882a593Smuzhiyun break;
556*4882a593Smuzhiyun case 2:
557*4882a593Smuzhiyun data->fan_div[ix] = 1;
558*4882a593Smuzhiyun break;
559*4882a593Smuzhiyun case 4:
560*4882a593Smuzhiyun data->fan_div[ix] = 2;
561*4882a593Smuzhiyun break;
562*4882a593Smuzhiyun case 8:
563*4882a593Smuzhiyun data->fan_div[ix] = 3;
564*4882a593Smuzhiyun break;
565*4882a593Smuzhiyun default:
566*4882a593Smuzhiyun count = -EINVAL;
567*4882a593Smuzhiyun dev_warn(dev,
568*4882a593Smuzhiyun "fan div value %ld not supported. Choose one of 1, 2, 4, or 8.\n",
569*4882a593Smuzhiyun val);
570*4882a593Smuzhiyun goto EXIT;
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun vt1211_write8(data, VT1211_REG_FAN_DIV,
573*4882a593Smuzhiyun ((data->fan_div[1] << 6) |
574*4882a593Smuzhiyun (data->fan_div[0] << 4) |
575*4882a593Smuzhiyun data->fan_ctl));
576*4882a593Smuzhiyun break;
577*4882a593Smuzhiyun default:
578*4882a593Smuzhiyun dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun EXIT:
582*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
583*4882a593Smuzhiyun return count;
584*4882a593Smuzhiyun }
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun /* ---------------------------------------------------------------------
587*4882a593Smuzhiyun * PWM sysfs interfaces
588*4882a593Smuzhiyun * ix = [0-1]
589*4882a593Smuzhiyun * --------------------------------------------------------------------- */
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun #define SHOW_PWM 0
592*4882a593Smuzhiyun #define SHOW_SET_PWM_ENABLE 1
593*4882a593Smuzhiyun #define SHOW_SET_PWM_FREQ 2
594*4882a593Smuzhiyun #define SHOW_SET_PWM_AUTO_CHANNELS_TEMP 3
595*4882a593Smuzhiyun
show_pwm(struct device * dev,struct device_attribute * attr,char * buf)596*4882a593Smuzhiyun static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
597*4882a593Smuzhiyun char *buf)
598*4882a593Smuzhiyun {
599*4882a593Smuzhiyun struct vt1211_data *data = vt1211_update_device(dev);
600*4882a593Smuzhiyun struct sensor_device_attribute_2 *sensor_attr_2 =
601*4882a593Smuzhiyun to_sensor_dev_attr_2(attr);
602*4882a593Smuzhiyun int ix = sensor_attr_2->index;
603*4882a593Smuzhiyun int fn = sensor_attr_2->nr;
604*4882a593Smuzhiyun int res;
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun switch (fn) {
607*4882a593Smuzhiyun case SHOW_PWM:
608*4882a593Smuzhiyun res = data->pwm[ix];
609*4882a593Smuzhiyun break;
610*4882a593Smuzhiyun case SHOW_SET_PWM_ENABLE:
611*4882a593Smuzhiyun res = ((data->pwm_ctl[ix] >> 3) & 1) ? 2 : 0;
612*4882a593Smuzhiyun break;
613*4882a593Smuzhiyun case SHOW_SET_PWM_FREQ:
614*4882a593Smuzhiyun res = 90000 >> (data->pwm_clk & 7);
615*4882a593Smuzhiyun break;
616*4882a593Smuzhiyun case SHOW_SET_PWM_AUTO_CHANNELS_TEMP:
617*4882a593Smuzhiyun res = (data->pwm_ctl[ix] & 7) + 1;
618*4882a593Smuzhiyun break;
619*4882a593Smuzhiyun default:
620*4882a593Smuzhiyun res = 0;
621*4882a593Smuzhiyun dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
622*4882a593Smuzhiyun }
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun return sprintf(buf, "%d\n", res);
625*4882a593Smuzhiyun }
626*4882a593Smuzhiyun
set_pwm(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)627*4882a593Smuzhiyun static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
628*4882a593Smuzhiyun const char *buf, size_t count)
629*4882a593Smuzhiyun {
630*4882a593Smuzhiyun struct vt1211_data *data = dev_get_drvdata(dev);
631*4882a593Smuzhiyun struct sensor_device_attribute_2 *sensor_attr_2 =
632*4882a593Smuzhiyun to_sensor_dev_attr_2(attr);
633*4882a593Smuzhiyun int ix = sensor_attr_2->index;
634*4882a593Smuzhiyun int fn = sensor_attr_2->nr;
635*4882a593Smuzhiyun int tmp, reg;
636*4882a593Smuzhiyun unsigned long val;
637*4882a593Smuzhiyun int err;
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun err = kstrtoul(buf, 10, &val);
640*4882a593Smuzhiyun if (err)
641*4882a593Smuzhiyun return err;
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun mutex_lock(&data->update_lock);
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun switch (fn) {
646*4882a593Smuzhiyun case SHOW_SET_PWM_ENABLE:
647*4882a593Smuzhiyun /* sync the data cache */
648*4882a593Smuzhiyun reg = vt1211_read8(data, VT1211_REG_FAN_DIV);
649*4882a593Smuzhiyun data->fan_div[0] = (reg >> 4) & 3;
650*4882a593Smuzhiyun data->fan_div[1] = (reg >> 6) & 3;
651*4882a593Smuzhiyun data->fan_ctl = reg & 0xf;
652*4882a593Smuzhiyun reg = vt1211_read8(data, VT1211_REG_PWM_CTL);
653*4882a593Smuzhiyun data->pwm_ctl[0] = reg & 0xf;
654*4882a593Smuzhiyun data->pwm_ctl[1] = (reg >> 4) & 0xf;
655*4882a593Smuzhiyun switch (val) {
656*4882a593Smuzhiyun case 0:
657*4882a593Smuzhiyun data->pwm_ctl[ix] &= 7;
658*4882a593Smuzhiyun /*
659*4882a593Smuzhiyun * disable SmartGuardian if both PWM outputs are
660*4882a593Smuzhiyun * disabled
661*4882a593Smuzhiyun */
662*4882a593Smuzhiyun if ((data->pwm_ctl[ix ^ 1] & 1) == 0)
663*4882a593Smuzhiyun data->fan_ctl &= 0xe;
664*4882a593Smuzhiyun break;
665*4882a593Smuzhiyun case 2:
666*4882a593Smuzhiyun data->pwm_ctl[ix] |= 8;
667*4882a593Smuzhiyun data->fan_ctl |= 1;
668*4882a593Smuzhiyun break;
669*4882a593Smuzhiyun default:
670*4882a593Smuzhiyun count = -EINVAL;
671*4882a593Smuzhiyun dev_warn(dev,
672*4882a593Smuzhiyun "pwm mode %ld not supported. Choose one of 0 or 2.\n",
673*4882a593Smuzhiyun val);
674*4882a593Smuzhiyun goto EXIT;
675*4882a593Smuzhiyun }
676*4882a593Smuzhiyun vt1211_write8(data, VT1211_REG_PWM_CTL,
677*4882a593Smuzhiyun ((data->pwm_ctl[1] << 4) |
678*4882a593Smuzhiyun data->pwm_ctl[0]));
679*4882a593Smuzhiyun vt1211_write8(data, VT1211_REG_FAN_DIV,
680*4882a593Smuzhiyun ((data->fan_div[1] << 6) |
681*4882a593Smuzhiyun (data->fan_div[0] << 4) |
682*4882a593Smuzhiyun data->fan_ctl));
683*4882a593Smuzhiyun break;
684*4882a593Smuzhiyun case SHOW_SET_PWM_FREQ:
685*4882a593Smuzhiyun val = 135000 / clamp_val(val, 135000 >> 7, 135000);
686*4882a593Smuzhiyun /* calculate tmp = log2(val) */
687*4882a593Smuzhiyun tmp = 0;
688*4882a593Smuzhiyun for (val >>= 1; val > 0; val >>= 1)
689*4882a593Smuzhiyun tmp++;
690*4882a593Smuzhiyun /* sync the data cache */
691*4882a593Smuzhiyun reg = vt1211_read8(data, VT1211_REG_PWM_CLK);
692*4882a593Smuzhiyun data->pwm_clk = (reg & 0xf8) | tmp;
693*4882a593Smuzhiyun vt1211_write8(data, VT1211_REG_PWM_CLK, data->pwm_clk);
694*4882a593Smuzhiyun break;
695*4882a593Smuzhiyun case SHOW_SET_PWM_AUTO_CHANNELS_TEMP:
696*4882a593Smuzhiyun if (val < 1 || val > 7) {
697*4882a593Smuzhiyun count = -EINVAL;
698*4882a593Smuzhiyun dev_warn(dev,
699*4882a593Smuzhiyun "temp channel %ld not supported. Choose a value between 1 and 7.\n",
700*4882a593Smuzhiyun val);
701*4882a593Smuzhiyun goto EXIT;
702*4882a593Smuzhiyun }
703*4882a593Smuzhiyun if (!ISTEMP(val - 1, data->uch_config)) {
704*4882a593Smuzhiyun count = -EINVAL;
705*4882a593Smuzhiyun dev_warn(dev, "temp channel %ld is not available.\n",
706*4882a593Smuzhiyun val);
707*4882a593Smuzhiyun goto EXIT;
708*4882a593Smuzhiyun }
709*4882a593Smuzhiyun /* sync the data cache */
710*4882a593Smuzhiyun reg = vt1211_read8(data, VT1211_REG_PWM_CTL);
711*4882a593Smuzhiyun data->pwm_ctl[0] = reg & 0xf;
712*4882a593Smuzhiyun data->pwm_ctl[1] = (reg >> 4) & 0xf;
713*4882a593Smuzhiyun data->pwm_ctl[ix] = (data->pwm_ctl[ix] & 8) | (val - 1);
714*4882a593Smuzhiyun vt1211_write8(data, VT1211_REG_PWM_CTL,
715*4882a593Smuzhiyun ((data->pwm_ctl[1] << 4) | data->pwm_ctl[0]));
716*4882a593Smuzhiyun break;
717*4882a593Smuzhiyun default:
718*4882a593Smuzhiyun dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
719*4882a593Smuzhiyun }
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun EXIT:
722*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
723*4882a593Smuzhiyun return count;
724*4882a593Smuzhiyun }
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun /* ---------------------------------------------------------------------
727*4882a593Smuzhiyun * PWM auto point definitions
728*4882a593Smuzhiyun * ix = [0-1]
729*4882a593Smuzhiyun * ap = [0-3]
730*4882a593Smuzhiyun * --------------------------------------------------------------------- */
731*4882a593Smuzhiyun
732*4882a593Smuzhiyun /*
733*4882a593Smuzhiyun * pwm[ix+1]_auto_point[ap+1]_temp mapping table:
734*4882a593Smuzhiyun * Note that there is only a single set of temp auto points that controls both
735*4882a593Smuzhiyun * PWM controllers. We still create 2 sets of sysfs files to make it look
736*4882a593Smuzhiyun * more consistent even though they map to the same registers.
737*4882a593Smuzhiyun *
738*4882a593Smuzhiyun * ix ap : description
739*4882a593Smuzhiyun * -------------------
740*4882a593Smuzhiyun * 0 0 : pwm1/2 off temperature (pwm_auto_temp[0])
741*4882a593Smuzhiyun * 0 1 : pwm1/2 low speed temperature (pwm_auto_temp[1])
742*4882a593Smuzhiyun * 0 2 : pwm1/2 high speed temperature (pwm_auto_temp[2])
743*4882a593Smuzhiyun * 0 3 : pwm1/2 full speed temperature (pwm_auto_temp[3])
744*4882a593Smuzhiyun * 1 0 : pwm1/2 off temperature (pwm_auto_temp[0])
745*4882a593Smuzhiyun * 1 1 : pwm1/2 low speed temperature (pwm_auto_temp[1])
746*4882a593Smuzhiyun * 1 2 : pwm1/2 high speed temperature (pwm_auto_temp[2])
747*4882a593Smuzhiyun * 1 3 : pwm1/2 full speed temperature (pwm_auto_temp[3])
748*4882a593Smuzhiyun */
749*4882a593Smuzhiyun
show_pwm_auto_point_temp(struct device * dev,struct device_attribute * attr,char * buf)750*4882a593Smuzhiyun static ssize_t show_pwm_auto_point_temp(struct device *dev,
751*4882a593Smuzhiyun struct device_attribute *attr,
752*4882a593Smuzhiyun char *buf)
753*4882a593Smuzhiyun {
754*4882a593Smuzhiyun struct vt1211_data *data = vt1211_update_device(dev);
755*4882a593Smuzhiyun struct sensor_device_attribute_2 *sensor_attr_2 =
756*4882a593Smuzhiyun to_sensor_dev_attr_2(attr);
757*4882a593Smuzhiyun int ix = sensor_attr_2->index;
758*4882a593Smuzhiyun int ap = sensor_attr_2->nr;
759*4882a593Smuzhiyun
760*4882a593Smuzhiyun return sprintf(buf, "%d\n", TEMP_FROM_REG(data->pwm_ctl[ix] & 7,
761*4882a593Smuzhiyun data->pwm_auto_temp[ap]));
762*4882a593Smuzhiyun }
763*4882a593Smuzhiyun
set_pwm_auto_point_temp(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)764*4882a593Smuzhiyun static ssize_t set_pwm_auto_point_temp(struct device *dev,
765*4882a593Smuzhiyun struct device_attribute *attr,
766*4882a593Smuzhiyun const char *buf, size_t count)
767*4882a593Smuzhiyun {
768*4882a593Smuzhiyun struct vt1211_data *data = dev_get_drvdata(dev);
769*4882a593Smuzhiyun struct sensor_device_attribute_2 *sensor_attr_2 =
770*4882a593Smuzhiyun to_sensor_dev_attr_2(attr);
771*4882a593Smuzhiyun int ix = sensor_attr_2->index;
772*4882a593Smuzhiyun int ap = sensor_attr_2->nr;
773*4882a593Smuzhiyun int reg;
774*4882a593Smuzhiyun long val;
775*4882a593Smuzhiyun int err;
776*4882a593Smuzhiyun
777*4882a593Smuzhiyun err = kstrtol(buf, 10, &val);
778*4882a593Smuzhiyun if (err)
779*4882a593Smuzhiyun return err;
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun
782*4882a593Smuzhiyun mutex_lock(&data->update_lock);
783*4882a593Smuzhiyun
784*4882a593Smuzhiyun /* sync the data cache */
785*4882a593Smuzhiyun reg = vt1211_read8(data, VT1211_REG_PWM_CTL);
786*4882a593Smuzhiyun data->pwm_ctl[0] = reg & 0xf;
787*4882a593Smuzhiyun data->pwm_ctl[1] = (reg >> 4) & 0xf;
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun data->pwm_auto_temp[ap] = TEMP_TO_REG(data->pwm_ctl[ix] & 7, val);
790*4882a593Smuzhiyun vt1211_write8(data, VT1211_REG_PWM_AUTO_TEMP(ap),
791*4882a593Smuzhiyun data->pwm_auto_temp[ap]);
792*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun return count;
795*4882a593Smuzhiyun }
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun /*
798*4882a593Smuzhiyun * pwm[ix+1]_auto_point[ap+1]_pwm mapping table:
799*4882a593Smuzhiyun * Note that the PWM auto points 0 & 3 are hard-wired in the VT1211 and can't
800*4882a593Smuzhiyun * be changed.
801*4882a593Smuzhiyun *
802*4882a593Smuzhiyun * ix ap : description
803*4882a593Smuzhiyun * -------------------
804*4882a593Smuzhiyun * 0 0 : pwm1 off (pwm_auto_pwm[0][0], hard-wired to 0)
805*4882a593Smuzhiyun * 0 1 : pwm1 low speed duty cycle (pwm_auto_pwm[0][1])
806*4882a593Smuzhiyun * 0 2 : pwm1 high speed duty cycle (pwm_auto_pwm[0][2])
807*4882a593Smuzhiyun * 0 3 : pwm1 full speed (pwm_auto_pwm[0][3], hard-wired to 255)
808*4882a593Smuzhiyun * 1 0 : pwm2 off (pwm_auto_pwm[1][0], hard-wired to 0)
809*4882a593Smuzhiyun * 1 1 : pwm2 low speed duty cycle (pwm_auto_pwm[1][1])
810*4882a593Smuzhiyun * 1 2 : pwm2 high speed duty cycle (pwm_auto_pwm[1][2])
811*4882a593Smuzhiyun * 1 3 : pwm2 full speed (pwm_auto_pwm[1][3], hard-wired to 255)
812*4882a593Smuzhiyun */
813*4882a593Smuzhiyun
show_pwm_auto_point_pwm(struct device * dev,struct device_attribute * attr,char * buf)814*4882a593Smuzhiyun static ssize_t show_pwm_auto_point_pwm(struct device *dev,
815*4882a593Smuzhiyun struct device_attribute *attr,
816*4882a593Smuzhiyun char *buf)
817*4882a593Smuzhiyun {
818*4882a593Smuzhiyun struct vt1211_data *data = vt1211_update_device(dev);
819*4882a593Smuzhiyun struct sensor_device_attribute_2 *sensor_attr_2 =
820*4882a593Smuzhiyun to_sensor_dev_attr_2(attr);
821*4882a593Smuzhiyun int ix = sensor_attr_2->index;
822*4882a593Smuzhiyun int ap = sensor_attr_2->nr;
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun return sprintf(buf, "%d\n", data->pwm_auto_pwm[ix][ap]);
825*4882a593Smuzhiyun }
826*4882a593Smuzhiyun
set_pwm_auto_point_pwm(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)827*4882a593Smuzhiyun static ssize_t set_pwm_auto_point_pwm(struct device *dev,
828*4882a593Smuzhiyun struct device_attribute *attr,
829*4882a593Smuzhiyun const char *buf, size_t count)
830*4882a593Smuzhiyun {
831*4882a593Smuzhiyun struct vt1211_data *data = dev_get_drvdata(dev);
832*4882a593Smuzhiyun struct sensor_device_attribute_2 *sensor_attr_2 =
833*4882a593Smuzhiyun to_sensor_dev_attr_2(attr);
834*4882a593Smuzhiyun int ix = sensor_attr_2->index;
835*4882a593Smuzhiyun int ap = sensor_attr_2->nr;
836*4882a593Smuzhiyun unsigned long val;
837*4882a593Smuzhiyun int err;
838*4882a593Smuzhiyun
839*4882a593Smuzhiyun err = kstrtoul(buf, 10, &val);
840*4882a593Smuzhiyun if (err)
841*4882a593Smuzhiyun return err;
842*4882a593Smuzhiyun
843*4882a593Smuzhiyun mutex_lock(&data->update_lock);
844*4882a593Smuzhiyun data->pwm_auto_pwm[ix][ap] = clamp_val(val, 0, 255);
845*4882a593Smuzhiyun vt1211_write8(data, VT1211_REG_PWM_AUTO_PWM(ix, ap),
846*4882a593Smuzhiyun data->pwm_auto_pwm[ix][ap]);
847*4882a593Smuzhiyun mutex_unlock(&data->update_lock);
848*4882a593Smuzhiyun
849*4882a593Smuzhiyun return count;
850*4882a593Smuzhiyun }
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun /* ---------------------------------------------------------------------
853*4882a593Smuzhiyun * Miscellaneous sysfs interfaces (VRM, VID, name, and (legacy) alarms)
854*4882a593Smuzhiyun * --------------------------------------------------------------------- */
855*4882a593Smuzhiyun
show_vrm(struct device * dev,struct device_attribute * attr,char * buf)856*4882a593Smuzhiyun static ssize_t show_vrm(struct device *dev, struct device_attribute *attr,
857*4882a593Smuzhiyun char *buf)
858*4882a593Smuzhiyun {
859*4882a593Smuzhiyun struct vt1211_data *data = dev_get_drvdata(dev);
860*4882a593Smuzhiyun
861*4882a593Smuzhiyun return sprintf(buf, "%d\n", data->vrm);
862*4882a593Smuzhiyun }
863*4882a593Smuzhiyun
set_vrm(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)864*4882a593Smuzhiyun static ssize_t set_vrm(struct device *dev, struct device_attribute *attr,
865*4882a593Smuzhiyun const char *buf, size_t count)
866*4882a593Smuzhiyun {
867*4882a593Smuzhiyun struct vt1211_data *data = dev_get_drvdata(dev);
868*4882a593Smuzhiyun unsigned long val;
869*4882a593Smuzhiyun int err;
870*4882a593Smuzhiyun
871*4882a593Smuzhiyun err = kstrtoul(buf, 10, &val);
872*4882a593Smuzhiyun if (err)
873*4882a593Smuzhiyun return err;
874*4882a593Smuzhiyun
875*4882a593Smuzhiyun if (val > 255)
876*4882a593Smuzhiyun return -EINVAL;
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun data->vrm = val;
879*4882a593Smuzhiyun
880*4882a593Smuzhiyun return count;
881*4882a593Smuzhiyun }
882*4882a593Smuzhiyun
show_vid(struct device * dev,struct device_attribute * attr,char * buf)883*4882a593Smuzhiyun static ssize_t show_vid(struct device *dev, struct device_attribute *attr,
884*4882a593Smuzhiyun char *buf)
885*4882a593Smuzhiyun {
886*4882a593Smuzhiyun struct vt1211_data *data = dev_get_drvdata(dev);
887*4882a593Smuzhiyun
888*4882a593Smuzhiyun return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
889*4882a593Smuzhiyun }
890*4882a593Smuzhiyun
show_name(struct device * dev,struct device_attribute * attr,char * buf)891*4882a593Smuzhiyun static ssize_t show_name(struct device *dev,
892*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
893*4882a593Smuzhiyun {
894*4882a593Smuzhiyun struct vt1211_data *data = dev_get_drvdata(dev);
895*4882a593Smuzhiyun
896*4882a593Smuzhiyun return sprintf(buf, "%s\n", data->name);
897*4882a593Smuzhiyun }
898*4882a593Smuzhiyun
show_alarms(struct device * dev,struct device_attribute * attr,char * buf)899*4882a593Smuzhiyun static ssize_t show_alarms(struct device *dev,
900*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
901*4882a593Smuzhiyun {
902*4882a593Smuzhiyun struct vt1211_data *data = vt1211_update_device(dev);
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun return sprintf(buf, "%d\n", data->alarms);
905*4882a593Smuzhiyun }
906*4882a593Smuzhiyun
907*4882a593Smuzhiyun /* ---------------------------------------------------------------------
908*4882a593Smuzhiyun * Device attribute structs
909*4882a593Smuzhiyun * --------------------------------------------------------------------- */
910*4882a593Smuzhiyun
911*4882a593Smuzhiyun #define SENSOR_ATTR_IN(ix) \
912*4882a593Smuzhiyun { SENSOR_ATTR_2(in##ix##_input, S_IRUGO, \
913*4882a593Smuzhiyun show_in, NULL, SHOW_IN_INPUT, ix), \
914*4882a593Smuzhiyun SENSOR_ATTR_2(in##ix##_min, S_IRUGO | S_IWUSR, \
915*4882a593Smuzhiyun show_in, set_in, SHOW_SET_IN_MIN, ix), \
916*4882a593Smuzhiyun SENSOR_ATTR_2(in##ix##_max, S_IRUGO | S_IWUSR, \
917*4882a593Smuzhiyun show_in, set_in, SHOW_SET_IN_MAX, ix), \
918*4882a593Smuzhiyun SENSOR_ATTR_2(in##ix##_alarm, S_IRUGO, \
919*4882a593Smuzhiyun show_in, NULL, SHOW_IN_ALARM, ix) \
920*4882a593Smuzhiyun }
921*4882a593Smuzhiyun
922*4882a593Smuzhiyun static struct sensor_device_attribute_2 vt1211_sysfs_in[][4] = {
923*4882a593Smuzhiyun SENSOR_ATTR_IN(0),
924*4882a593Smuzhiyun SENSOR_ATTR_IN(1),
925*4882a593Smuzhiyun SENSOR_ATTR_IN(2),
926*4882a593Smuzhiyun SENSOR_ATTR_IN(3),
927*4882a593Smuzhiyun SENSOR_ATTR_IN(4),
928*4882a593Smuzhiyun SENSOR_ATTR_IN(5)
929*4882a593Smuzhiyun };
930*4882a593Smuzhiyun
931*4882a593Smuzhiyun #define IN_UNIT_ATTRS(X) \
932*4882a593Smuzhiyun { &vt1211_sysfs_in[X][0].dev_attr.attr, \
933*4882a593Smuzhiyun &vt1211_sysfs_in[X][1].dev_attr.attr, \
934*4882a593Smuzhiyun &vt1211_sysfs_in[X][2].dev_attr.attr, \
935*4882a593Smuzhiyun &vt1211_sysfs_in[X][3].dev_attr.attr, \
936*4882a593Smuzhiyun NULL \
937*4882a593Smuzhiyun }
938*4882a593Smuzhiyun
939*4882a593Smuzhiyun static struct attribute *vt1211_in_attr[][5] = {
940*4882a593Smuzhiyun IN_UNIT_ATTRS(0),
941*4882a593Smuzhiyun IN_UNIT_ATTRS(1),
942*4882a593Smuzhiyun IN_UNIT_ATTRS(2),
943*4882a593Smuzhiyun IN_UNIT_ATTRS(3),
944*4882a593Smuzhiyun IN_UNIT_ATTRS(4),
945*4882a593Smuzhiyun IN_UNIT_ATTRS(5)
946*4882a593Smuzhiyun };
947*4882a593Smuzhiyun
948*4882a593Smuzhiyun static const struct attribute_group vt1211_in_attr_group[] = {
949*4882a593Smuzhiyun { .attrs = vt1211_in_attr[0] },
950*4882a593Smuzhiyun { .attrs = vt1211_in_attr[1] },
951*4882a593Smuzhiyun { .attrs = vt1211_in_attr[2] },
952*4882a593Smuzhiyun { .attrs = vt1211_in_attr[3] },
953*4882a593Smuzhiyun { .attrs = vt1211_in_attr[4] },
954*4882a593Smuzhiyun { .attrs = vt1211_in_attr[5] }
955*4882a593Smuzhiyun };
956*4882a593Smuzhiyun
957*4882a593Smuzhiyun #define SENSOR_ATTR_TEMP(ix) \
958*4882a593Smuzhiyun { SENSOR_ATTR_2(temp##ix##_input, S_IRUGO, \
959*4882a593Smuzhiyun show_temp, NULL, SHOW_TEMP_INPUT, ix-1), \
960*4882a593Smuzhiyun SENSOR_ATTR_2(temp##ix##_max, S_IRUGO | S_IWUSR, \
961*4882a593Smuzhiyun show_temp, set_temp, SHOW_SET_TEMP_MAX, ix-1), \
962*4882a593Smuzhiyun SENSOR_ATTR_2(temp##ix##_max_hyst, S_IRUGO | S_IWUSR, \
963*4882a593Smuzhiyun show_temp, set_temp, SHOW_SET_TEMP_MAX_HYST, ix-1), \
964*4882a593Smuzhiyun SENSOR_ATTR_2(temp##ix##_alarm, S_IRUGO, \
965*4882a593Smuzhiyun show_temp, NULL, SHOW_TEMP_ALARM, ix-1) \
966*4882a593Smuzhiyun }
967*4882a593Smuzhiyun
968*4882a593Smuzhiyun static struct sensor_device_attribute_2 vt1211_sysfs_temp[][4] = {
969*4882a593Smuzhiyun SENSOR_ATTR_TEMP(1),
970*4882a593Smuzhiyun SENSOR_ATTR_TEMP(2),
971*4882a593Smuzhiyun SENSOR_ATTR_TEMP(3),
972*4882a593Smuzhiyun SENSOR_ATTR_TEMP(4),
973*4882a593Smuzhiyun SENSOR_ATTR_TEMP(5),
974*4882a593Smuzhiyun SENSOR_ATTR_TEMP(6),
975*4882a593Smuzhiyun SENSOR_ATTR_TEMP(7),
976*4882a593Smuzhiyun };
977*4882a593Smuzhiyun
978*4882a593Smuzhiyun #define TEMP_UNIT_ATTRS(X) \
979*4882a593Smuzhiyun { &vt1211_sysfs_temp[X][0].dev_attr.attr, \
980*4882a593Smuzhiyun &vt1211_sysfs_temp[X][1].dev_attr.attr, \
981*4882a593Smuzhiyun &vt1211_sysfs_temp[X][2].dev_attr.attr, \
982*4882a593Smuzhiyun &vt1211_sysfs_temp[X][3].dev_attr.attr, \
983*4882a593Smuzhiyun NULL \
984*4882a593Smuzhiyun }
985*4882a593Smuzhiyun
986*4882a593Smuzhiyun static struct attribute *vt1211_temp_attr[][5] = {
987*4882a593Smuzhiyun TEMP_UNIT_ATTRS(0),
988*4882a593Smuzhiyun TEMP_UNIT_ATTRS(1),
989*4882a593Smuzhiyun TEMP_UNIT_ATTRS(2),
990*4882a593Smuzhiyun TEMP_UNIT_ATTRS(3),
991*4882a593Smuzhiyun TEMP_UNIT_ATTRS(4),
992*4882a593Smuzhiyun TEMP_UNIT_ATTRS(5),
993*4882a593Smuzhiyun TEMP_UNIT_ATTRS(6)
994*4882a593Smuzhiyun };
995*4882a593Smuzhiyun
996*4882a593Smuzhiyun static const struct attribute_group vt1211_temp_attr_group[] = {
997*4882a593Smuzhiyun { .attrs = vt1211_temp_attr[0] },
998*4882a593Smuzhiyun { .attrs = vt1211_temp_attr[1] },
999*4882a593Smuzhiyun { .attrs = vt1211_temp_attr[2] },
1000*4882a593Smuzhiyun { .attrs = vt1211_temp_attr[3] },
1001*4882a593Smuzhiyun { .attrs = vt1211_temp_attr[4] },
1002*4882a593Smuzhiyun { .attrs = vt1211_temp_attr[5] },
1003*4882a593Smuzhiyun { .attrs = vt1211_temp_attr[6] }
1004*4882a593Smuzhiyun };
1005*4882a593Smuzhiyun
1006*4882a593Smuzhiyun #define SENSOR_ATTR_FAN(ix) \
1007*4882a593Smuzhiyun SENSOR_ATTR_2(fan##ix##_input, S_IRUGO, \
1008*4882a593Smuzhiyun show_fan, NULL, SHOW_FAN_INPUT, ix-1), \
1009*4882a593Smuzhiyun SENSOR_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
1010*4882a593Smuzhiyun show_fan, set_fan, SHOW_SET_FAN_MIN, ix-1), \
1011*4882a593Smuzhiyun SENSOR_ATTR_2(fan##ix##_div, S_IRUGO | S_IWUSR, \
1012*4882a593Smuzhiyun show_fan, set_fan, SHOW_SET_FAN_DIV, ix-1), \
1013*4882a593Smuzhiyun SENSOR_ATTR_2(fan##ix##_alarm, S_IRUGO, \
1014*4882a593Smuzhiyun show_fan, NULL, SHOW_FAN_ALARM, ix-1)
1015*4882a593Smuzhiyun
1016*4882a593Smuzhiyun #define SENSOR_ATTR_PWM(ix) \
1017*4882a593Smuzhiyun SENSOR_ATTR_2(pwm##ix, S_IRUGO, \
1018*4882a593Smuzhiyun show_pwm, NULL, SHOW_PWM, ix-1), \
1019*4882a593Smuzhiyun SENSOR_ATTR_2(pwm##ix##_enable, S_IRUGO | S_IWUSR, \
1020*4882a593Smuzhiyun show_pwm, set_pwm, SHOW_SET_PWM_ENABLE, ix-1), \
1021*4882a593Smuzhiyun SENSOR_ATTR_2(pwm##ix##_auto_channels_temp, S_IRUGO | S_IWUSR, \
1022*4882a593Smuzhiyun show_pwm, set_pwm, SHOW_SET_PWM_AUTO_CHANNELS_TEMP, ix-1)
1023*4882a593Smuzhiyun
1024*4882a593Smuzhiyun #define SENSOR_ATTR_PWM_FREQ(ix) \
1025*4882a593Smuzhiyun SENSOR_ATTR_2(pwm##ix##_freq, S_IRUGO | S_IWUSR, \
1026*4882a593Smuzhiyun show_pwm, set_pwm, SHOW_SET_PWM_FREQ, ix-1)
1027*4882a593Smuzhiyun
1028*4882a593Smuzhiyun #define SENSOR_ATTR_PWM_FREQ_RO(ix) \
1029*4882a593Smuzhiyun SENSOR_ATTR_2(pwm##ix##_freq, S_IRUGO, \
1030*4882a593Smuzhiyun show_pwm, NULL, SHOW_SET_PWM_FREQ, ix-1)
1031*4882a593Smuzhiyun
1032*4882a593Smuzhiyun #define SENSOR_ATTR_PWM_AUTO_POINT_TEMP(ix, ap) \
1033*4882a593Smuzhiyun SENSOR_ATTR_2(pwm##ix##_auto_point##ap##_temp, S_IRUGO | S_IWUSR, \
1034*4882a593Smuzhiyun show_pwm_auto_point_temp, set_pwm_auto_point_temp, \
1035*4882a593Smuzhiyun ap-1, ix-1)
1036*4882a593Smuzhiyun
1037*4882a593Smuzhiyun #define SENSOR_ATTR_PWM_AUTO_POINT_TEMP_RO(ix, ap) \
1038*4882a593Smuzhiyun SENSOR_ATTR_2(pwm##ix##_auto_point##ap##_temp, S_IRUGO, \
1039*4882a593Smuzhiyun show_pwm_auto_point_temp, NULL, \
1040*4882a593Smuzhiyun ap-1, ix-1)
1041*4882a593Smuzhiyun
1042*4882a593Smuzhiyun #define SENSOR_ATTR_PWM_AUTO_POINT_PWM(ix, ap) \
1043*4882a593Smuzhiyun SENSOR_ATTR_2(pwm##ix##_auto_point##ap##_pwm, S_IRUGO | S_IWUSR, \
1044*4882a593Smuzhiyun show_pwm_auto_point_pwm, set_pwm_auto_point_pwm, \
1045*4882a593Smuzhiyun ap-1, ix-1)
1046*4882a593Smuzhiyun
1047*4882a593Smuzhiyun #define SENSOR_ATTR_PWM_AUTO_POINT_PWM_RO(ix, ap) \
1048*4882a593Smuzhiyun SENSOR_ATTR_2(pwm##ix##_auto_point##ap##_pwm, S_IRUGO, \
1049*4882a593Smuzhiyun show_pwm_auto_point_pwm, NULL, \
1050*4882a593Smuzhiyun ap-1, ix-1)
1051*4882a593Smuzhiyun
1052*4882a593Smuzhiyun static struct sensor_device_attribute_2 vt1211_sysfs_fan_pwm[] = {
1053*4882a593Smuzhiyun SENSOR_ATTR_FAN(1),
1054*4882a593Smuzhiyun SENSOR_ATTR_FAN(2),
1055*4882a593Smuzhiyun SENSOR_ATTR_PWM(1),
1056*4882a593Smuzhiyun SENSOR_ATTR_PWM(2),
1057*4882a593Smuzhiyun SENSOR_ATTR_PWM_FREQ(1),
1058*4882a593Smuzhiyun SENSOR_ATTR_PWM_FREQ_RO(2),
1059*4882a593Smuzhiyun SENSOR_ATTR_PWM_AUTO_POINT_TEMP(1, 1),
1060*4882a593Smuzhiyun SENSOR_ATTR_PWM_AUTO_POINT_TEMP(1, 2),
1061*4882a593Smuzhiyun SENSOR_ATTR_PWM_AUTO_POINT_TEMP(1, 3),
1062*4882a593Smuzhiyun SENSOR_ATTR_PWM_AUTO_POINT_TEMP(1, 4),
1063*4882a593Smuzhiyun SENSOR_ATTR_PWM_AUTO_POINT_TEMP_RO(2, 1),
1064*4882a593Smuzhiyun SENSOR_ATTR_PWM_AUTO_POINT_TEMP_RO(2, 2),
1065*4882a593Smuzhiyun SENSOR_ATTR_PWM_AUTO_POINT_TEMP_RO(2, 3),
1066*4882a593Smuzhiyun SENSOR_ATTR_PWM_AUTO_POINT_TEMP_RO(2, 4),
1067*4882a593Smuzhiyun SENSOR_ATTR_PWM_AUTO_POINT_PWM_RO(1, 1),
1068*4882a593Smuzhiyun SENSOR_ATTR_PWM_AUTO_POINT_PWM(1, 2),
1069*4882a593Smuzhiyun SENSOR_ATTR_PWM_AUTO_POINT_PWM(1, 3),
1070*4882a593Smuzhiyun SENSOR_ATTR_PWM_AUTO_POINT_PWM_RO(1, 4),
1071*4882a593Smuzhiyun SENSOR_ATTR_PWM_AUTO_POINT_PWM_RO(2, 1),
1072*4882a593Smuzhiyun SENSOR_ATTR_PWM_AUTO_POINT_PWM(2, 2),
1073*4882a593Smuzhiyun SENSOR_ATTR_PWM_AUTO_POINT_PWM(2, 3),
1074*4882a593Smuzhiyun SENSOR_ATTR_PWM_AUTO_POINT_PWM_RO(2, 4),
1075*4882a593Smuzhiyun };
1076*4882a593Smuzhiyun
1077*4882a593Smuzhiyun static struct device_attribute vt1211_sysfs_misc[] = {
1078*4882a593Smuzhiyun __ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm, set_vrm),
1079*4882a593Smuzhiyun __ATTR(cpu0_vid, S_IRUGO, show_vid, NULL),
1080*4882a593Smuzhiyun __ATTR(name, S_IRUGO, show_name, NULL),
1081*4882a593Smuzhiyun __ATTR(alarms, S_IRUGO, show_alarms, NULL),
1082*4882a593Smuzhiyun };
1083*4882a593Smuzhiyun
1084*4882a593Smuzhiyun /* ---------------------------------------------------------------------
1085*4882a593Smuzhiyun * Device registration and initialization
1086*4882a593Smuzhiyun * --------------------------------------------------------------------- */
1087*4882a593Smuzhiyun
vt1211_init_device(struct vt1211_data * data)1088*4882a593Smuzhiyun static void vt1211_init_device(struct vt1211_data *data)
1089*4882a593Smuzhiyun {
1090*4882a593Smuzhiyun /* set VRM */
1091*4882a593Smuzhiyun data->vrm = vid_which_vrm();
1092*4882a593Smuzhiyun
1093*4882a593Smuzhiyun /* Read (and initialize) UCH config */
1094*4882a593Smuzhiyun data->uch_config = vt1211_read8(data, VT1211_REG_UCH_CONFIG);
1095*4882a593Smuzhiyun if (uch_config > -1) {
1096*4882a593Smuzhiyun data->uch_config = (data->uch_config & 0x83) |
1097*4882a593Smuzhiyun (uch_config << 2);
1098*4882a593Smuzhiyun vt1211_write8(data, VT1211_REG_UCH_CONFIG, data->uch_config);
1099*4882a593Smuzhiyun }
1100*4882a593Smuzhiyun
1101*4882a593Smuzhiyun /*
1102*4882a593Smuzhiyun * Initialize the interrupt mode (if request at module load time).
1103*4882a593Smuzhiyun * The VT1211 implements 3 different modes for clearing interrupts:
1104*4882a593Smuzhiyun * 0: Clear INT when status register is read. Regenerate INT as long
1105*4882a593Smuzhiyun * as temp stays above hysteresis limit.
1106*4882a593Smuzhiyun * 1: Clear INT when status register is read. DON'T regenerate INT
1107*4882a593Smuzhiyun * until temp falls below hysteresis limit and exceeds hot limit
1108*4882a593Smuzhiyun * again.
1109*4882a593Smuzhiyun * 2: Clear INT when temp falls below max limit.
1110*4882a593Smuzhiyun *
1111*4882a593Smuzhiyun * The driver only allows to force mode 0 since that's the only one
1112*4882a593Smuzhiyun * that makes sense for 'sensors'
1113*4882a593Smuzhiyun */
1114*4882a593Smuzhiyun if (int_mode == 0) {
1115*4882a593Smuzhiyun vt1211_write8(data, VT1211_REG_TEMP1_CONFIG, 0);
1116*4882a593Smuzhiyun vt1211_write8(data, VT1211_REG_TEMP2_CONFIG, 0);
1117*4882a593Smuzhiyun }
1118*4882a593Smuzhiyun
1119*4882a593Smuzhiyun /* Fill in some hard wired values into our data struct */
1120*4882a593Smuzhiyun data->pwm_auto_pwm[0][3] = 255;
1121*4882a593Smuzhiyun data->pwm_auto_pwm[1][3] = 255;
1122*4882a593Smuzhiyun }
1123*4882a593Smuzhiyun
vt1211_remove_sysfs(struct platform_device * pdev)1124*4882a593Smuzhiyun static void vt1211_remove_sysfs(struct platform_device *pdev)
1125*4882a593Smuzhiyun {
1126*4882a593Smuzhiyun struct device *dev = &pdev->dev;
1127*4882a593Smuzhiyun int i;
1128*4882a593Smuzhiyun
1129*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(vt1211_in_attr_group); i++)
1130*4882a593Smuzhiyun sysfs_remove_group(&dev->kobj, &vt1211_in_attr_group[i]);
1131*4882a593Smuzhiyun
1132*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(vt1211_temp_attr_group); i++)
1133*4882a593Smuzhiyun sysfs_remove_group(&dev->kobj, &vt1211_temp_attr_group[i]);
1134*4882a593Smuzhiyun
1135*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(vt1211_sysfs_fan_pwm); i++) {
1136*4882a593Smuzhiyun device_remove_file(dev,
1137*4882a593Smuzhiyun &vt1211_sysfs_fan_pwm[i].dev_attr);
1138*4882a593Smuzhiyun }
1139*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(vt1211_sysfs_misc); i++)
1140*4882a593Smuzhiyun device_remove_file(dev, &vt1211_sysfs_misc[i]);
1141*4882a593Smuzhiyun }
1142*4882a593Smuzhiyun
vt1211_probe(struct platform_device * pdev)1143*4882a593Smuzhiyun static int vt1211_probe(struct platform_device *pdev)
1144*4882a593Smuzhiyun {
1145*4882a593Smuzhiyun struct device *dev = &pdev->dev;
1146*4882a593Smuzhiyun struct vt1211_data *data;
1147*4882a593Smuzhiyun struct resource *res;
1148*4882a593Smuzhiyun int i, err;
1149*4882a593Smuzhiyun
1150*4882a593Smuzhiyun data = devm_kzalloc(dev, sizeof(struct vt1211_data), GFP_KERNEL);
1151*4882a593Smuzhiyun if (!data)
1152*4882a593Smuzhiyun return -ENOMEM;
1153*4882a593Smuzhiyun
1154*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1155*4882a593Smuzhiyun if (!devm_request_region(dev, res->start, resource_size(res),
1156*4882a593Smuzhiyun DRVNAME)) {
1157*4882a593Smuzhiyun dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1158*4882a593Smuzhiyun (unsigned long)res->start, (unsigned long)res->end);
1159*4882a593Smuzhiyun return -EBUSY;
1160*4882a593Smuzhiyun }
1161*4882a593Smuzhiyun data->addr = res->start;
1162*4882a593Smuzhiyun data->name = DRVNAME;
1163*4882a593Smuzhiyun mutex_init(&data->update_lock);
1164*4882a593Smuzhiyun
1165*4882a593Smuzhiyun platform_set_drvdata(pdev, data);
1166*4882a593Smuzhiyun
1167*4882a593Smuzhiyun /* Initialize the VT1211 chip */
1168*4882a593Smuzhiyun vt1211_init_device(data);
1169*4882a593Smuzhiyun
1170*4882a593Smuzhiyun /* Create sysfs interface files */
1171*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(vt1211_in_attr_group); i++) {
1172*4882a593Smuzhiyun if (ISVOLT(i, data->uch_config)) {
1173*4882a593Smuzhiyun err = sysfs_create_group(&dev->kobj,
1174*4882a593Smuzhiyun &vt1211_in_attr_group[i]);
1175*4882a593Smuzhiyun if (err)
1176*4882a593Smuzhiyun goto EXIT_DEV_REMOVE;
1177*4882a593Smuzhiyun }
1178*4882a593Smuzhiyun }
1179*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(vt1211_temp_attr_group); i++) {
1180*4882a593Smuzhiyun if (ISTEMP(i, data->uch_config)) {
1181*4882a593Smuzhiyun err = sysfs_create_group(&dev->kobj,
1182*4882a593Smuzhiyun &vt1211_temp_attr_group[i]);
1183*4882a593Smuzhiyun if (err)
1184*4882a593Smuzhiyun goto EXIT_DEV_REMOVE;
1185*4882a593Smuzhiyun }
1186*4882a593Smuzhiyun }
1187*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(vt1211_sysfs_fan_pwm); i++) {
1188*4882a593Smuzhiyun err = device_create_file(dev,
1189*4882a593Smuzhiyun &vt1211_sysfs_fan_pwm[i].dev_attr);
1190*4882a593Smuzhiyun if (err)
1191*4882a593Smuzhiyun goto EXIT_DEV_REMOVE;
1192*4882a593Smuzhiyun }
1193*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(vt1211_sysfs_misc); i++) {
1194*4882a593Smuzhiyun err = device_create_file(dev,
1195*4882a593Smuzhiyun &vt1211_sysfs_misc[i]);
1196*4882a593Smuzhiyun if (err)
1197*4882a593Smuzhiyun goto EXIT_DEV_REMOVE;
1198*4882a593Smuzhiyun }
1199*4882a593Smuzhiyun
1200*4882a593Smuzhiyun /* Register device */
1201*4882a593Smuzhiyun data->hwmon_dev = hwmon_device_register(dev);
1202*4882a593Smuzhiyun if (IS_ERR(data->hwmon_dev)) {
1203*4882a593Smuzhiyun err = PTR_ERR(data->hwmon_dev);
1204*4882a593Smuzhiyun dev_err(dev, "Class registration failed (%d)\n", err);
1205*4882a593Smuzhiyun goto EXIT_DEV_REMOVE_SILENT;
1206*4882a593Smuzhiyun }
1207*4882a593Smuzhiyun
1208*4882a593Smuzhiyun return 0;
1209*4882a593Smuzhiyun
1210*4882a593Smuzhiyun EXIT_DEV_REMOVE:
1211*4882a593Smuzhiyun dev_err(dev, "Sysfs interface creation failed (%d)\n", err);
1212*4882a593Smuzhiyun EXIT_DEV_REMOVE_SILENT:
1213*4882a593Smuzhiyun vt1211_remove_sysfs(pdev);
1214*4882a593Smuzhiyun return err;
1215*4882a593Smuzhiyun }
1216*4882a593Smuzhiyun
vt1211_remove(struct platform_device * pdev)1217*4882a593Smuzhiyun static int vt1211_remove(struct platform_device *pdev)
1218*4882a593Smuzhiyun {
1219*4882a593Smuzhiyun struct vt1211_data *data = platform_get_drvdata(pdev);
1220*4882a593Smuzhiyun
1221*4882a593Smuzhiyun hwmon_device_unregister(data->hwmon_dev);
1222*4882a593Smuzhiyun vt1211_remove_sysfs(pdev);
1223*4882a593Smuzhiyun
1224*4882a593Smuzhiyun return 0;
1225*4882a593Smuzhiyun }
1226*4882a593Smuzhiyun
1227*4882a593Smuzhiyun static struct platform_driver vt1211_driver = {
1228*4882a593Smuzhiyun .driver = {
1229*4882a593Smuzhiyun .name = DRVNAME,
1230*4882a593Smuzhiyun },
1231*4882a593Smuzhiyun .probe = vt1211_probe,
1232*4882a593Smuzhiyun .remove = vt1211_remove,
1233*4882a593Smuzhiyun };
1234*4882a593Smuzhiyun
vt1211_device_add(unsigned short address)1235*4882a593Smuzhiyun static int __init vt1211_device_add(unsigned short address)
1236*4882a593Smuzhiyun {
1237*4882a593Smuzhiyun struct resource res = {
1238*4882a593Smuzhiyun .start = address,
1239*4882a593Smuzhiyun .end = address + 0x7f,
1240*4882a593Smuzhiyun .flags = IORESOURCE_IO,
1241*4882a593Smuzhiyun };
1242*4882a593Smuzhiyun int err;
1243*4882a593Smuzhiyun
1244*4882a593Smuzhiyun pdev = platform_device_alloc(DRVNAME, address);
1245*4882a593Smuzhiyun if (!pdev) {
1246*4882a593Smuzhiyun err = -ENOMEM;
1247*4882a593Smuzhiyun pr_err("Device allocation failed (%d)\n", err);
1248*4882a593Smuzhiyun goto EXIT;
1249*4882a593Smuzhiyun }
1250*4882a593Smuzhiyun
1251*4882a593Smuzhiyun res.name = pdev->name;
1252*4882a593Smuzhiyun err = acpi_check_resource_conflict(&res);
1253*4882a593Smuzhiyun if (err)
1254*4882a593Smuzhiyun goto EXIT_DEV_PUT;
1255*4882a593Smuzhiyun
1256*4882a593Smuzhiyun err = platform_device_add_resources(pdev, &res, 1);
1257*4882a593Smuzhiyun if (err) {
1258*4882a593Smuzhiyun pr_err("Device resource addition failed (%d)\n", err);
1259*4882a593Smuzhiyun goto EXIT_DEV_PUT;
1260*4882a593Smuzhiyun }
1261*4882a593Smuzhiyun
1262*4882a593Smuzhiyun err = platform_device_add(pdev);
1263*4882a593Smuzhiyun if (err) {
1264*4882a593Smuzhiyun pr_err("Device addition failed (%d)\n", err);
1265*4882a593Smuzhiyun goto EXIT_DEV_PUT;
1266*4882a593Smuzhiyun }
1267*4882a593Smuzhiyun
1268*4882a593Smuzhiyun return 0;
1269*4882a593Smuzhiyun
1270*4882a593Smuzhiyun EXIT_DEV_PUT:
1271*4882a593Smuzhiyun platform_device_put(pdev);
1272*4882a593Smuzhiyun EXIT:
1273*4882a593Smuzhiyun return err;
1274*4882a593Smuzhiyun }
1275*4882a593Smuzhiyun
vt1211_find(int sio_cip,unsigned short * address)1276*4882a593Smuzhiyun static int __init vt1211_find(int sio_cip, unsigned short *address)
1277*4882a593Smuzhiyun {
1278*4882a593Smuzhiyun int err;
1279*4882a593Smuzhiyun int devid;
1280*4882a593Smuzhiyun
1281*4882a593Smuzhiyun err = superio_enter(sio_cip);
1282*4882a593Smuzhiyun if (err)
1283*4882a593Smuzhiyun return err;
1284*4882a593Smuzhiyun
1285*4882a593Smuzhiyun err = -ENODEV;
1286*4882a593Smuzhiyun devid = force_id ? force_id : superio_inb(sio_cip, SIO_VT1211_DEVID);
1287*4882a593Smuzhiyun if (devid != SIO_VT1211_ID)
1288*4882a593Smuzhiyun goto EXIT;
1289*4882a593Smuzhiyun
1290*4882a593Smuzhiyun superio_select(sio_cip, SIO_VT1211_LDN_HWMON);
1291*4882a593Smuzhiyun
1292*4882a593Smuzhiyun if ((superio_inb(sio_cip, SIO_VT1211_ACTIVE) & 1) == 0) {
1293*4882a593Smuzhiyun pr_warn("HW monitor is disabled, skipping\n");
1294*4882a593Smuzhiyun goto EXIT;
1295*4882a593Smuzhiyun }
1296*4882a593Smuzhiyun
1297*4882a593Smuzhiyun *address = ((superio_inb(sio_cip, SIO_VT1211_BADDR) << 8) |
1298*4882a593Smuzhiyun (superio_inb(sio_cip, SIO_VT1211_BADDR + 1))) & 0xff00;
1299*4882a593Smuzhiyun if (*address == 0) {
1300*4882a593Smuzhiyun pr_warn("Base address is not set, skipping\n");
1301*4882a593Smuzhiyun goto EXIT;
1302*4882a593Smuzhiyun }
1303*4882a593Smuzhiyun
1304*4882a593Smuzhiyun err = 0;
1305*4882a593Smuzhiyun pr_info("Found VT1211 chip at 0x%04x, revision %u\n",
1306*4882a593Smuzhiyun *address, superio_inb(sio_cip, SIO_VT1211_DEVREV));
1307*4882a593Smuzhiyun
1308*4882a593Smuzhiyun EXIT:
1309*4882a593Smuzhiyun superio_exit(sio_cip);
1310*4882a593Smuzhiyun return err;
1311*4882a593Smuzhiyun }
1312*4882a593Smuzhiyun
vt1211_init(void)1313*4882a593Smuzhiyun static int __init vt1211_init(void)
1314*4882a593Smuzhiyun {
1315*4882a593Smuzhiyun int err;
1316*4882a593Smuzhiyun unsigned short address = 0;
1317*4882a593Smuzhiyun
1318*4882a593Smuzhiyun err = vt1211_find(SIO_REG_CIP1, &address);
1319*4882a593Smuzhiyun if (err) {
1320*4882a593Smuzhiyun err = vt1211_find(SIO_REG_CIP2, &address);
1321*4882a593Smuzhiyun if (err)
1322*4882a593Smuzhiyun goto EXIT;
1323*4882a593Smuzhiyun }
1324*4882a593Smuzhiyun
1325*4882a593Smuzhiyun if ((uch_config < -1) || (uch_config > 31)) {
1326*4882a593Smuzhiyun err = -EINVAL;
1327*4882a593Smuzhiyun pr_warn("Invalid UCH configuration %d. Choose a value between 0 and 31.\n",
1328*4882a593Smuzhiyun uch_config);
1329*4882a593Smuzhiyun goto EXIT;
1330*4882a593Smuzhiyun }
1331*4882a593Smuzhiyun
1332*4882a593Smuzhiyun if ((int_mode < -1) || (int_mode > 0)) {
1333*4882a593Smuzhiyun err = -EINVAL;
1334*4882a593Smuzhiyun pr_warn("Invalid interrupt mode %d. Only mode 0 is supported.\n",
1335*4882a593Smuzhiyun int_mode);
1336*4882a593Smuzhiyun goto EXIT;
1337*4882a593Smuzhiyun }
1338*4882a593Smuzhiyun
1339*4882a593Smuzhiyun err = platform_driver_register(&vt1211_driver);
1340*4882a593Smuzhiyun if (err)
1341*4882a593Smuzhiyun goto EXIT;
1342*4882a593Smuzhiyun
1343*4882a593Smuzhiyun /* Sets global pdev as a side effect */
1344*4882a593Smuzhiyun err = vt1211_device_add(address);
1345*4882a593Smuzhiyun if (err)
1346*4882a593Smuzhiyun goto EXIT_DRV_UNREGISTER;
1347*4882a593Smuzhiyun
1348*4882a593Smuzhiyun return 0;
1349*4882a593Smuzhiyun
1350*4882a593Smuzhiyun EXIT_DRV_UNREGISTER:
1351*4882a593Smuzhiyun platform_driver_unregister(&vt1211_driver);
1352*4882a593Smuzhiyun EXIT:
1353*4882a593Smuzhiyun return err;
1354*4882a593Smuzhiyun }
1355*4882a593Smuzhiyun
vt1211_exit(void)1356*4882a593Smuzhiyun static void __exit vt1211_exit(void)
1357*4882a593Smuzhiyun {
1358*4882a593Smuzhiyun platform_device_unregister(pdev);
1359*4882a593Smuzhiyun platform_driver_unregister(&vt1211_driver);
1360*4882a593Smuzhiyun }
1361*4882a593Smuzhiyun
1362*4882a593Smuzhiyun MODULE_AUTHOR("Juerg Haefliger <juergh@gmail.com>");
1363*4882a593Smuzhiyun MODULE_DESCRIPTION("VT1211 sensors");
1364*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1365*4882a593Smuzhiyun
1366*4882a593Smuzhiyun module_init(vt1211_init);
1367*4882a593Smuzhiyun module_exit(vt1211_exit);
1368