Home
last modified time | relevance | path

Searched +full:5 +full:vs2 (Results 1 – 25 of 26) sorted by relevance

12

/OK3568_Linux_fs/kernel/drivers/pcmcia/
H A Dbcm63xx_pcmcia.c111 * identity cardtype from VS[12] input, CD[12] input while only VS2 is
120 IN_CD2_VS1H = (1 << 5),
125 /* VS1 float, VS2 float */
128 /* VS1 grounded, VS2 float */
131 /* VS1 grounded, VS2 grounded */
134 /* VS1 tied to CD1, VS2 float */
137 /* VS1 grounded, VS2 tied to CD2 */
140 /* VS1 tied to CD2, VS2 grounded */
143 /* VS1 float, VS2 grounded */
146 /* VS1 float, VS2 tied to CD2 */
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dqcom-pm8941.dtsi41 <0x0 0x10 5 IRQ_TYPE_EDGE_BOTH>,
163 interrupt-names = "ocp-5vs1", "ocp-5vs2";
172 pm8941_5vs1: 5vs1 {
182 pm8941_5vs2: 5vs2 {
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/regulator/
H A Dqcom,smd-rpm-regulator.yaml34 lvs3, 5vs1, 5vs2
55 l20, l21, l22, l23, l24, l25, l26, l27, lvs1, lvs2, lvs3, lvs4, 5vs1
89 "^((s|l|lvs|5vs)[0-9]*)|(boost-bypass)|(bob)$":
H A Dqcom,spmi-regulator.txt211 5vs1, 5vs2
/OK3568_Linux_fs/kernel/arch/arm/mach-pxa/
H A Dpcm990_baseboard.h35 #define PCM990_CTRL_5VOFF 0x0001 /* Disable 5V Regulators */
37 #define PCM990_CTRL_PM_5V 0x0008 /* Read 5V OK */
53 #define PCM990_CTRL_REG5 0x000A /* MMC2 CTRL REGISTER 5 */
124 #define PCM990_IDE_5V 0x0002 /* R IDE Power 5V */
167 #define PCM990_CF_REG4_5_3V 0x0002 /* RW 1 = 5V CF_VCC 0 = 3 V CF_VCC */
168 #define PCM990_CF_REG4_3B 0x0004 /* RW 3.0V Backup from VCC (5_3V=0) */
171 #define PCM990_CF_PLD_REG5 0x100A /* OFFSET CF REGISTER 5 */
175 #define PCM990_CF_REG5_VS2 0x0008 /* R CF /VS2 */
/OK3568_Linux_fs/kernel/drivers/regulator/
H A Dmt6358-regulator.c212 0, 1, 2, 4, 5, 9, 11, 13,
220 3, 4, 5, 6, 7, 9, 12,
228 2, 3, 5,
431 MT6358_BUCK("buck_vs2", VS2, 500000, 2087500, 12500,
H A Dqcom_spmi-regulator.c227 SPMI_COMMON_IDX_MODE = 5,
254 #define SPMI_FTSMPS426_MODE_LPM_MASK 5
303 #define SPMI_FTSMPS_STEP_MARGIN_DEN 5
935 * In case of range 1: voltage_sel is a 5 bit value, bits[7-5] set to in spmi_regulator_ult_lo_smps_set_voltage()
1508 SPMI_VREG(BOOST, 5V_BOOST, 0, INF, BOOST, boost, boost, 0),
1883 { "5vs1", 0x8300, "vin_5vs", "ocp-5vs1", },
1884 { "5vs2", 0x8400, "vin_5vs", "ocp-5vs2", },
H A Dqcom_smd-regulator.c717 { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
733 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
760 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
785 { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
786 { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
796 { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
809 { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
837 { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
854 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" },
880 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8950_ftsmps2p5, "vdd_s5" },
[all …]
/OK3568_Linux_fs/kernel/arch/powerpc/include/asm/
H A Dppc_asm.h170 #define HMT_MEDIUM_HIGH or 5,5,5 # medium high priority
522 #define cr5 5
576 #define fr5 5
611 #define v5 5
643 #define vs2 2
646 #define vs5 5
713 #define evr5 5
/OK3568_Linux_fs/kernel/tools/testing/selftests/powerpc/primitives/asm/
H A Dppc_asm.h170 #define HMT_MEDIUM_HIGH or 5,5,5 # medium high priority
522 #define cr5 5
576 #define fr5 5
611 #define v5 5
643 #define vs2 2
646 #define vs5 5
713 #define evr5 5
/OK3568_Linux_fs/yocto/meta-openembedded/meta-oe/recipes-support/pxaregs/pxaregs-1.14/
H A Dpxaregs.c57 { "ICR_SCLE", 0x40301690, 5, 1, 'x', " master clock enable " },
75 { "ISR_ALD", 0x40301698, 5, 1, 'x', " arbitration loss detected " },
93 { "PSSR_RDH", 0x40F00004, 5, 0x00000001, 'd', "PM receivers of all input GPIO are disabled" },
103 { "PWER_WE5", 0x40F0000C, 5, 0x00000001, 'd', "PM wake up due to GPIO 5 edge detect enabled" },
122 { "PRER_RE5", 0x40F00010, 5, 0x00000001, 'd', "PM wake up due to GPIO 5 rising edge detect enable…
140 { "PFER_FE5", 0x40F00014, 5, 0x00000001, 'd', "PM wake up due to GPIO 5 falling edge detect enabl…
158 { "PEDR_ED5", 0x40F00018, 5, 0x00000001, 'd', "PM wake up due to edge on GPIO 5 detected" },
181 { "PGSR_SS5", 0x40F00020, 5, 0x00000001, 'd', "PM GPIO pin 5 is driven to 1 during sleep" },
215 { "PGSR_SS37", 0x40F00024, 5, 0x00000001, 'd', "PM GPIO pin 37 is driven to 1 during sleep" },
249 { "PGSR_SS69", 0x40F00028, 5, 0x00000001, 'd', "PM GPIO pin 69 is driven to 1 during sleep" },
[all …]
/OK3568_Linux_fs/external/libmali/lib/arm-linux-gnueabihf/
HDlibmali-bifrost-g31-g2p0-only-cl.so ... - . / 0 1 2 ? 3 ? 4 5 6 7 8 9 : ; < = > ? ...
HDlibmali-valhall-g610-g6p0-gbm.so ... - . / 0 1 2 ? 3 ? 4 5 6 7 8 9 : ; < = > ? ...
HDlibmali-bifrost-g31-g2p0-gbm.so ... - . / 0 1 2 ? 3 ? 4 5 6 7 8 9 : ; < = > ? ...
HDlibmali-valhall-g610-g6p0-dummy.so ... - . / 0 1 2 ? 3 ? 4 5 6 7 8 9 : ; < = > ? ...
HDlibmali-bifrost-g52-g2p0-gbm.so ... - . / 0 1 2 ? 3 ? 4 5 6 7 8 9 : ; < = > ? ...
HDlibmali-valhall-g610-g6p0-wayland-gbm.so ... - . / 0 1 2 ? 3 ? 4 5 6 7 8 9 : ; < = > ? ...
HDlibmali-valhall-g610-g6p0-x11-gbm.so ... - . / 0 1 2 ? 3 ? 4 5 6 7 8 9 : ; < = > ? ...
HDlibmali-bifrost-g31-g2p0-x11-gbm.so ... - . / 0 1 2 ? 3 ? 4 5 6 7 8 9 : ; < = > ? ...
HDlibmali-bifrost-g52-g2p0-dummy-gbm.so ... - . / 0 1 2 ? 3 ? 4 5 6 7 8 9 : ; < = > ? ...
HDlibmali-bifrost-g52-g2p0-wayland-gbm.so ... - . / 0 1 2 ? 3 ? 4 5 6 7 8 9 : ; < = > ? ...
HDlibmali-bifrost-g52-g2p0-x11-gbm.so ... - . / 0 1 2 ? 3 ? 4 5 6 7 8 9 : ; < = > ? ...
HDlibmali-bifrost-g31-g2p0-wayland-gbm.so ... - . / 0 1 2 ? 3 ? 4 5 6 7 8 9 : ; < = > ? ...
HDlibmali-bifrost-g52-g2p0-dummy.so ... - . / 0 1 2 ? 3 ? 4 5 6 7 8 9 : ; < = > ? ...
/OK3568_Linux_fs/external/libmali/optimize_s/arm-linux-gnueabihf/
HDlibmali-bifrost-g52-g2p0-dummy-gbm.so ... - . / 0 1 2 ? 3 ? 4 5 6 7 8 9 : ; < = > ? ...

12